2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 * Source file for NIC routines to access the Phantom hardware
34 #include "netxen_nic.h"
35 #include "netxen_nic_hw.h"
36 #include "netxen_nic_phan_reg.h"
40 /* PCI Windowing for DDR regions. */
42 #define ADDR_IN_RANGE(addr, low, high) \
43 (((addr) <= (high)) && ((addr) >= (low)))
45 #define NETXEN_FLASH_BASE (BOOTLD_START)
46 #define NETXEN_PHANTOM_MEM_BASE (NETXEN_FLASH_BASE)
47 #define NETXEN_MAX_MTU 8000 + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE
48 #define NETXEN_MIN_MTU 64
49 #define NETXEN_ETH_FCS_SIZE 4
50 #define NETXEN_ENET_HEADER_SIZE 14
51 #define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */
52 #define NETXEN_FIRMWARE_LEN ((16 * 1024) / 4)
53 #define NETXEN_NIU_HDRSIZE (0x1 << 6)
54 #define NETXEN_NIU_TLRSIZE (0x1 << 5)
56 #define lower32(x) ((u32)((x) & 0xffffffff))
58 ((u32)(((unsigned long long)(x) >> 32) & 0xffffffff))
60 #define NETXEN_NIC_ZERO_PAUSE_ADDR 0ULL
61 #define NETXEN_NIC_UNIT_PAUSE_ADDR 0x200ULL
62 #define NETXEN_NIC_EPG_PAUSE_ADDR1 0x2200010000c28001ULL
63 #define NETXEN_NIC_EPG_PAUSE_ADDR2 0x0100088866554433ULL
65 #define NETXEN_NIC_WINDOW_MARGIN 0x100000
67 unsigned long netxen_nic_pci_set_window(struct netxen_adapter
*adapter
,
68 unsigned long long addr
);
69 void netxen_free_hw_resources(struct netxen_adapter
*adapter
);
71 int netxen_nic_set_mac(struct net_device
*netdev
, void *p
)
73 struct netxen_port
*port
= netdev_priv(netdev
);
74 struct netxen_adapter
*adapter
= port
->adapter
;
75 struct sockaddr
*addr
= p
;
77 if (netif_running(netdev
))
80 if (!is_valid_ether_addr(addr
->sa_data
))
81 return -EADDRNOTAVAIL
;
83 DPRINTK(INFO
, "valid ether addr\n");
84 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
86 if (adapter
->macaddr_set
)
87 adapter
->macaddr_set(port
, addr
->sa_data
);
93 * netxen_nic_set_multi - Multicast
95 void netxen_nic_set_multi(struct net_device
*netdev
)
97 struct netxen_port
*port
= netdev_priv(netdev
);
98 struct netxen_adapter
*adapter
= port
->adapter
;
99 struct dev_mc_list
*mc_ptr
;
100 __u32 netxen_mac_addr_cntl_data
= 0;
102 mc_ptr
= netdev
->mc_list
;
103 if (netdev
->flags
& IFF_PROMISC
) {
104 if (adapter
->set_promisc
)
105 adapter
->set_promisc(adapter
,
107 NETXEN_NIU_PROMISC_MODE
);
109 if (adapter
->unset_promisc
&&
110 adapter
->ahw
.boardcfg
.board_type
111 != NETXEN_BRDTYPE_P2_SB31_10G_IMEZ
)
112 adapter
->unset_promisc(adapter
,
114 NETXEN_NIU_NON_PROMISC_MODE
);
116 if (adapter
->ahw
.board_type
== NETXEN_NIC_XGBE
) {
117 netxen_nic_mcr_set_mode_select(netxen_mac_addr_cntl_data
, 0x03);
118 netxen_nic_mcr_set_id_pool0(netxen_mac_addr_cntl_data
, 0x00);
119 netxen_nic_mcr_set_id_pool1(netxen_mac_addr_cntl_data
, 0x00);
120 netxen_nic_mcr_set_id_pool2(netxen_mac_addr_cntl_data
, 0x00);
121 netxen_nic_mcr_set_id_pool3(netxen_mac_addr_cntl_data
, 0x00);
122 netxen_nic_mcr_set_enable_xtnd0(netxen_mac_addr_cntl_data
);
123 netxen_nic_mcr_set_enable_xtnd1(netxen_mac_addr_cntl_data
);
124 netxen_nic_mcr_set_enable_xtnd2(netxen_mac_addr_cntl_data
);
125 netxen_nic_mcr_set_enable_xtnd3(netxen_mac_addr_cntl_data
);
127 netxen_nic_mcr_set_mode_select(netxen_mac_addr_cntl_data
, 0x00);
128 netxen_nic_mcr_set_id_pool0(netxen_mac_addr_cntl_data
, 0x00);
129 netxen_nic_mcr_set_id_pool1(netxen_mac_addr_cntl_data
, 0x01);
130 netxen_nic_mcr_set_id_pool2(netxen_mac_addr_cntl_data
, 0x02);
131 netxen_nic_mcr_set_id_pool3(netxen_mac_addr_cntl_data
, 0x03);
133 writel(netxen_mac_addr_cntl_data
,
134 NETXEN_CRB_NORMALIZE(adapter
, NETXEN_MAC_ADDR_CNTL_REG
));
135 if (adapter
->ahw
.board_type
== NETXEN_NIC_XGBE
) {
136 writel(netxen_mac_addr_cntl_data
,
137 NETXEN_CRB_NORMALIZE(adapter
,
138 NETXEN_MULTICAST_ADDR_HI_0
));
140 writel(netxen_mac_addr_cntl_data
,
141 NETXEN_CRB_NORMALIZE(adapter
,
142 NETXEN_MULTICAST_ADDR_HI_1
));
144 netxen_mac_addr_cntl_data
= 0;
145 writel(netxen_mac_addr_cntl_data
,
146 NETXEN_CRB_NORMALIZE(adapter
, NETXEN_NIU_GB_DROP_WRONGADDR
));
150 * netxen_nic_change_mtu - Change the Maximum Transfer Unit
151 * @returns 0 on success, negative on failure
153 int netxen_nic_change_mtu(struct net_device
*netdev
, int mtu
)
155 struct netxen_port
*port
= netdev_priv(netdev
);
156 struct netxen_adapter
*adapter
= port
->adapter
;
157 int eff_mtu
= mtu
+ NETXEN_ENET_HEADER_SIZE
+ NETXEN_ETH_FCS_SIZE
;
159 if ((eff_mtu
> NETXEN_MAX_MTU
) || (eff_mtu
< NETXEN_MIN_MTU
)) {
160 printk(KERN_ERR
"%s: %s %d is not supported.\n",
161 netxen_nic_driver_name
, netdev
->name
, mtu
);
165 if (adapter
->set_mtu
)
166 adapter
->set_mtu(port
, mtu
);
173 * check if the firmware has been downloaded and ready to run and
174 * setup the address for the descriptors in the adapter
176 int netxen_nic_hw_resources(struct netxen_adapter
*adapter
)
178 struct netxen_hardware_context
*hw
= &adapter
->ahw
;
181 int loops
= 0, err
= 0;
183 u32 card_cmdring
= 0;
184 struct netxen_recv_context
*recv_ctx
;
185 struct netxen_rcv_desc_ctx
*rcv_desc
;
187 DPRINTK(INFO
, "crb_base: %lx %x", NETXEN_PCI_CRBSPACE
,
188 PCI_OFFSET_SECOND_RANGE(adapter
, NETXEN_PCI_CRBSPACE
));
189 DPRINTK(INFO
, "cam base: %lx %x", NETXEN_CRB_CAM
,
190 pci_base_offset(adapter
, NETXEN_CRB_CAM
));
191 DPRINTK(INFO
, "cam RAM: %lx %x", NETXEN_CAM_RAM_BASE
,
192 pci_base_offset(adapter
, NETXEN_CAM_RAM_BASE
));
195 card_cmdring
= readl(NETXEN_CRB_NORMALIZE(adapter
, CRB_CMDPEG_CMDRING
));
197 DPRINTK(INFO
, "Command Peg sends 0x%x for cmdring base\n",
200 for (ctx
= 0; ctx
< MAX_RCV_CTX
; ++ctx
) {
201 DPRINTK(INFO
, "Command Peg ready..waiting for rcv peg\n");
205 state
= readl(NETXEN_CRB_NORMALIZE(adapter
,
206 recv_crb_registers
[ctx
].
208 while (state
!= PHAN_PEG_RCV_INITIALIZED
&& loops
< 20) {
211 state
= readl(NETXEN_CRB_NORMALIZE(adapter
,
218 printk(KERN_ERR
"Rcv Peg initialization not complete:"
224 DPRINTK(INFO
, "Recieve Peg ready too. starting stuff\n");
226 addr
= netxen_alloc(adapter
->ahw
.pdev
,
227 sizeof(struct netxen_ring_ctx
) +
229 (dma_addr_t
*) & adapter
->ctx_desc_phys_addr
,
230 &adapter
->ctx_desc_pdev
);
232 printk("ctx_desc_phys_addr: 0x%llx\n",
233 (unsigned long long) adapter
->ctx_desc_phys_addr
);
235 DPRINTK(ERR
, "bad return from pci_alloc_consistent\n");
239 memset(addr
, 0, sizeof(struct netxen_ring_ctx
));
240 adapter
->ctx_desc
= (struct netxen_ring_ctx
*)addr
;
241 adapter
->ctx_desc
->cmd_consumer_offset
=
242 cpu_to_le64(adapter
->ctx_desc_phys_addr
+
243 sizeof(struct netxen_ring_ctx
));
244 adapter
->cmd_consumer
= (uint32_t *) (((char *)addr
) +
245 sizeof(struct netxen_ring_ctx
));
247 addr
= netxen_alloc(adapter
->ahw
.pdev
,
248 sizeof(struct cmd_desc_type0
) *
249 adapter
->max_tx_desc_count
,
250 (dma_addr_t
*) & hw
->cmd_desc_phys_addr
,
251 &adapter
->ahw
.cmd_desc_pdev
);
252 printk("cmd_desc_phys_addr: 0x%llx\n",
253 (unsigned long long) hw
->cmd_desc_phys_addr
);
256 DPRINTK(ERR
, "bad return from pci_alloc_consistent\n");
257 netxen_free_hw_resources(adapter
);
261 adapter
->ctx_desc
->cmd_ring_addr
=
262 cpu_to_le64(hw
->cmd_desc_phys_addr
);
263 adapter
->ctx_desc
->cmd_ring_size
=
264 cpu_to_le32(adapter
->max_tx_desc_count
);
266 hw
->cmd_desc_head
= (struct cmd_desc_type0
*)addr
;
268 for (ctx
= 0; ctx
< MAX_RCV_CTX
; ++ctx
) {
269 recv_ctx
= &adapter
->recv_ctx
[ctx
];
271 for (ring
= 0; ring
< NUM_RCV_DESC_RINGS
; ring
++) {
272 rcv_desc
= &recv_ctx
->rcv_desc
[ring
];
273 addr
= netxen_alloc(adapter
->ahw
.pdev
,
275 &rcv_desc
->phys_addr
,
276 &rcv_desc
->phys_pdev
);
278 DPRINTK(ERR
, "bad return from "
279 "pci_alloc_consistent\n");
280 netxen_free_hw_resources(adapter
);
284 rcv_desc
->desc_head
= (struct rcv_desc
*)addr
;
285 adapter
->ctx_desc
->rcv_ctx
[ring
].rcv_ring_addr
=
286 cpu_to_le64(rcv_desc
->phys_addr
);
287 adapter
->ctx_desc
->rcv_ctx
[ring
].rcv_ring_size
=
288 cpu_to_le32(rcv_desc
->max_rx_desc_count
);
291 addr
= netxen_alloc(adapter
->ahw
.pdev
, STATUS_DESC_RINGSIZE
,
292 &recv_ctx
->rcv_status_desc_phys_addr
,
293 &recv_ctx
->rcv_status_desc_pdev
);
295 DPRINTK(ERR
, "bad return from"
296 " pci_alloc_consistent\n");
297 netxen_free_hw_resources(adapter
);
301 recv_ctx
->rcv_status_desc_head
= (struct status_desc
*)addr
;
302 adapter
->ctx_desc
->sts_ring_addr
=
303 cpu_to_le64(recv_ctx
->rcv_status_desc_phys_addr
);
304 adapter
->ctx_desc
->sts_ring_size
=
305 cpu_to_le32(adapter
->max_rx_desc_count
);
310 writel(lower32(adapter
->ctx_desc_phys_addr
),
311 NETXEN_CRB_NORMALIZE(adapter
, CRB_CTX_ADDR_REG_LO
));
312 writel(upper32(adapter
->ctx_desc_phys_addr
),
313 NETXEN_CRB_NORMALIZE(adapter
, CRB_CTX_ADDR_REG_HI
));
314 writel(NETXEN_CTX_SIGNATURE
,
315 NETXEN_CRB_NORMALIZE(adapter
, CRB_CTX_SIGNATURE_REG
));
319 void netxen_free_hw_resources(struct netxen_adapter
*adapter
)
321 struct netxen_recv_context
*recv_ctx
;
322 struct netxen_rcv_desc_ctx
*rcv_desc
;
325 if (adapter
->ctx_desc
!= NULL
) {
326 pci_free_consistent(adapter
->ctx_desc_pdev
,
327 sizeof(struct netxen_ring_ctx
) +
330 adapter
->ctx_desc_phys_addr
);
331 adapter
->ctx_desc
= NULL
;
334 if (adapter
->ahw
.cmd_desc_head
!= NULL
) {
335 pci_free_consistent(adapter
->ahw
.cmd_desc_pdev
,
336 sizeof(struct cmd_desc_type0
) *
337 adapter
->max_tx_desc_count
,
338 adapter
->ahw
.cmd_desc_head
,
339 adapter
->ahw
.cmd_desc_phys_addr
);
340 adapter
->ahw
.cmd_desc_head
= NULL
;
342 /* Special handling: there are 2 ports on this board */
343 if (adapter
->ahw
.boardcfg
.board_type
== NETXEN_BRDTYPE_P2_SB31_10G_IMEZ
) {
344 adapter
->ahw
.max_ports
= 2;
347 for (ctx
= 0; ctx
< MAX_RCV_CTX
; ++ctx
) {
348 recv_ctx
= &adapter
->recv_ctx
[ctx
];
349 for (ring
= 0; ring
< NUM_RCV_DESC_RINGS
; ring
++) {
350 rcv_desc
= &recv_ctx
->rcv_desc
[ring
];
352 if (rcv_desc
->desc_head
!= NULL
) {
353 pci_free_consistent(rcv_desc
->phys_pdev
,
356 rcv_desc
->phys_addr
);
357 rcv_desc
->desc_head
= NULL
;
361 if (recv_ctx
->rcv_status_desc_head
!= NULL
) {
362 pci_free_consistent(recv_ctx
->rcv_status_desc_pdev
,
363 STATUS_DESC_RINGSIZE
,
364 recv_ctx
->rcv_status_desc_head
,
366 rcv_status_desc_phys_addr
);
367 recv_ctx
->rcv_status_desc_head
= NULL
;
372 void netxen_tso_check(struct netxen_adapter
*adapter
,
373 struct cmd_desc_type0
*desc
, struct sk_buff
*skb
)
376 desc
->total_hdr_length
= (sizeof(struct ethhdr
) +
378 skb
->h
.th
->doff
* 4);
379 netxen_set_cmd_desc_opcode(desc
, TX_TCP_LSO
);
380 } else if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
381 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
) {
382 netxen_set_cmd_desc_opcode(desc
, TX_TCP_PKT
);
383 } else if (ip_hdr(skb
)->protocol
== IPPROTO_UDP
) {
384 netxen_set_cmd_desc_opcode(desc
, TX_UDP_PKT
);
389 adapter
->stats
.xmitcsummed
++;
390 desc
->tcp_hdr_offset
= skb
->h
.raw
- skb
->data
;
391 desc
->ip_hdr_offset
= skb_network_offset(skb
);
394 int netxen_is_flash_supported(struct netxen_adapter
*adapter
)
396 const int locs
[] = { 0, 0x4, 0x100, 0x4000, 0x4128 };
397 int addr
, val01
, val02
, i
, j
;
399 /* if the flash size less than 4Mb, make huge war cry and die */
400 for (j
= 1; j
< 4; j
++) {
401 addr
= j
* NETXEN_NIC_WINDOW_MARGIN
;
402 for (i
= 0; i
< (sizeof(locs
) / sizeof(locs
[0])); i
++) {
403 if (netxen_rom_fast_read(adapter
, locs
[i
], &val01
) == 0
404 && netxen_rom_fast_read(adapter
, (addr
+ locs
[i
]),
416 static int netxen_get_flash_block(struct netxen_adapter
*adapter
, int base
,
424 for (i
= 0; i
< size
/ sizeof(u32
); i
++) {
425 if (netxen_rom_fast_read(adapter
, addr
, ptr32
) == -1)
427 *ptr32
= cpu_to_le32(*ptr32
);
431 if ((char *)buf
+ size
> (char *)ptr32
) {
434 if (netxen_rom_fast_read(adapter
, addr
, &local
) == -1)
436 local
= cpu_to_le32(local
);
437 memcpy(ptr32
, &local
, (char *)buf
+ size
- (char *)ptr32
);
443 int netxen_get_flash_mac_addr(struct netxen_adapter
*adapter
, u64 mac
[])
445 u32
*pmac
= (u32
*) & mac
[0];
447 if (netxen_get_flash_block(adapter
,
449 offsetof(struct netxen_new_user_info
,
451 FLASH_NUM_PORTS
* sizeof(u64
), pmac
) == -1) {
455 if (netxen_get_flash_block(adapter
,
457 offsetof(struct netxen_user_old_info
,
459 FLASH_NUM_PORTS
* sizeof(u64
),
469 * Changes the CRB window to the specified window.
471 void netxen_nic_pci_change_crbwindow(struct netxen_adapter
*adapter
, u32 wndw
)
473 void __iomem
*offset
;
477 if (adapter
->curr_window
== wndw
)
481 * Move the CRB window.
482 * We need to write to the "direct access" region of PCI
483 * to avoid a race condition where the window register has
484 * not been successfully written across CRB before the target
485 * register address is received by PCI. The direct region bypasses
489 PCI_OFFSET_SECOND_RANGE(adapter
,
490 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW
));
493 wndw
= NETXEN_WINDOW_ONE
;
495 writel(wndw
, offset
);
497 /* MUST make sure window is set before we forge on... */
498 while ((tmp
= readl(offset
)) != wndw
) {
499 printk(KERN_WARNING
"%s: %s WARNING: CRB window value not "
500 "registered properly: 0x%08x.\n",
501 netxen_nic_driver_name
, __FUNCTION__
, tmp
);
508 adapter
->curr_window
= wndw
;
511 void netxen_load_firmware(struct netxen_adapter
*adapter
)
515 u32 flashaddr
= NETXEN_FLASH_BASE
, memaddr
= NETXEN_PHANTOM_MEM_BASE
;
519 size
= NETXEN_FIRMWARE_LEN
;
520 writel(1, NETXEN_CRB_NORMALIZE(adapter
, NETXEN_ROMUSB_GLB_CAS_RST
));
522 for (i
= 0; i
< size
; i
++) {
523 if (netxen_rom_fast_read(adapter
, flashaddr
, (int *)&data
) != 0) {
525 "Error in netxen_rom_fast_read(). Will skip"
526 "loading flash image\n");
529 off
= netxen_nic_pci_set_window(adapter
, memaddr
);
530 addr
= pci_base_offset(adapter
, off
);
536 /* make sure Casper is powered on */
538 NETXEN_CRB_NORMALIZE(adapter
, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL
));
539 writel(0, NETXEN_CRB_NORMALIZE(adapter
, NETXEN_ROMUSB_GLB_CAS_RST
));
545 netxen_nic_hw_write_wx(struct netxen_adapter
*adapter
, u64 off
, void *data
,
550 if (ADDR_IN_WINDOW1(off
)) {
551 addr
= NETXEN_CRB_NORMALIZE(adapter
, off
);
552 } else { /* Window 0 */
553 addr
= pci_base_offset(adapter
, off
);
554 netxen_nic_pci_change_crbwindow(adapter
, 0);
557 DPRINTK(INFO
, "writing to base %lx offset %llx addr %p"
558 " data %llx len %d\n",
559 pci_base(adapter
, off
), off
, addr
,
560 *(unsigned long long *)data
, len
);
562 netxen_nic_pci_change_crbwindow(adapter
, 1);
568 writeb(*(u8
*) data
, addr
);
571 writew(*(u16
*) data
, addr
);
574 writel(*(u32
*) data
, addr
);
577 writeq(*(u64
*) data
, addr
);
581 "writing data %lx to offset %llx, num words=%d\n",
582 *(unsigned long *)data
, off
, (len
>> 3));
584 netxen_nic_hw_block_write64((u64 __iomem
*) data
, addr
,
588 if (!ADDR_IN_WINDOW1(off
))
589 netxen_nic_pci_change_crbwindow(adapter
, 1);
595 netxen_nic_hw_read_wx(struct netxen_adapter
*adapter
, u64 off
, void *data
,
600 if (ADDR_IN_WINDOW1(off
)) { /* Window 1 */
601 addr
= NETXEN_CRB_NORMALIZE(adapter
, off
);
602 } else { /* Window 0 */
603 addr
= pci_base_offset(adapter
, off
);
604 netxen_nic_pci_change_crbwindow(adapter
, 0);
607 DPRINTK(INFO
, "reading from base %lx offset %llx addr %p\n",
608 pci_base(adapter
, off
), off
, addr
);
610 netxen_nic_pci_change_crbwindow(adapter
, 1);
615 *(u8
*) data
= readb(addr
);
618 *(u16
*) data
= readw(addr
);
621 *(u32
*) data
= readl(addr
);
624 *(u64
*) data
= readq(addr
);
627 netxen_nic_hw_block_read64((u64 __iomem
*) data
, addr
,
631 DPRINTK(INFO
, "read %lx\n", *(unsigned long *)data
);
633 if (!ADDR_IN_WINDOW1(off
))
634 netxen_nic_pci_change_crbwindow(adapter
, 1);
639 void netxen_nic_reg_write(struct netxen_adapter
*adapter
, u64 off
, u32 val
)
640 { /* Only for window 1 */
643 addr
= NETXEN_CRB_NORMALIZE(adapter
, off
);
644 DPRINTK(INFO
, "writing to base %lx offset %llx addr %p data %x\n",
645 pci_base(adapter
, off
), off
, addr
, val
);
650 int netxen_nic_reg_read(struct netxen_adapter
*adapter
, u64 off
)
651 { /* Only for window 1 */
655 addr
= NETXEN_CRB_NORMALIZE(adapter
, off
);
656 DPRINTK(INFO
, "reading from base %lx offset %llx addr %p\n",
657 pci_base(adapter
, off
), off
, addr
);
664 /* Change the window to 0, write and change back to window 1. */
665 void netxen_nic_write_w0(struct netxen_adapter
*adapter
, u32 index
, u32 value
)
669 netxen_nic_pci_change_crbwindow(adapter
, 0);
670 addr
= pci_base_offset(adapter
, index
);
672 netxen_nic_pci_change_crbwindow(adapter
, 1);
675 /* Change the window to 0, read and change back to window 1. */
676 void netxen_nic_read_w0(struct netxen_adapter
*adapter
, u32 index
, u32
* value
)
680 addr
= pci_base_offset(adapter
, index
);
682 netxen_nic_pci_change_crbwindow(adapter
, 0);
683 *value
= readl(addr
);
684 netxen_nic_pci_change_crbwindow(adapter
, 1);
687 int netxen_pci_set_window_warning_count
= 0;
690 netxen_nic_pci_set_window(struct netxen_adapter
*adapter
,
691 unsigned long long addr
)
693 static int ddr_mn_window
= -1;
694 static int qdr_sn_window
= -1;
697 if (ADDR_IN_RANGE(addr
, NETXEN_ADDR_DDR_NET
, NETXEN_ADDR_DDR_NET_MAX
)) {
698 /* DDR network side */
699 addr
-= NETXEN_ADDR_DDR_NET
;
700 window
= (addr
>> 25) & 0x3ff;
701 if (ddr_mn_window
!= window
) {
702 ddr_mn_window
= window
;
703 writel(window
, PCI_OFFSET_SECOND_RANGE(adapter
,
706 /* MUST make sure window is set before we forge on... */
707 readl(PCI_OFFSET_SECOND_RANGE(adapter
,
711 addr
-= (window
* NETXEN_WINDOW_ONE
);
712 addr
+= NETXEN_PCI_DDR_NET
;
713 } else if (ADDR_IN_RANGE(addr
, NETXEN_ADDR_OCM0
, NETXEN_ADDR_OCM0_MAX
)) {
714 addr
-= NETXEN_ADDR_OCM0
;
715 addr
+= NETXEN_PCI_OCM0
;
716 } else if (ADDR_IN_RANGE(addr
, NETXEN_ADDR_OCM1
, NETXEN_ADDR_OCM1_MAX
)) {
717 addr
-= NETXEN_ADDR_OCM1
;
718 addr
+= NETXEN_PCI_OCM1
;
721 (addr
, NETXEN_ADDR_QDR_NET
, NETXEN_ADDR_QDR_NET_MAX
)) {
722 /* QDR network side */
723 addr
-= NETXEN_ADDR_QDR_NET
;
724 window
= (addr
>> 22) & 0x3f;
725 if (qdr_sn_window
!= window
) {
726 qdr_sn_window
= window
;
727 writel((window
<< 22),
728 PCI_OFFSET_SECOND_RANGE(adapter
,
731 /* MUST make sure window is set before we forge on... */
732 readl(PCI_OFFSET_SECOND_RANGE(adapter
,
736 addr
-= (window
* 0x400000);
737 addr
+= NETXEN_PCI_QDR_NET
;
740 * peg gdb frequently accesses memory that doesn't exist,
741 * this limits the chit chat so debugging isn't slowed down.
743 if ((netxen_pci_set_window_warning_count
++ < 8)
744 || (netxen_pci_set_window_warning_count
% 64 == 0))
745 printk("%s: Warning:netxen_nic_pci_set_window()"
746 " Unknown address range!\n",
747 netxen_nic_driver_name
);
753 int netxen_nic_get_board_info(struct netxen_adapter
*adapter
)
756 int addr
= BRDCFG_START
;
757 struct netxen_board_info
*boardinfo
;
761 boardinfo
= &adapter
->ahw
.boardcfg
;
762 ptr32
= (u32
*) boardinfo
;
764 for (index
= 0; index
< sizeof(struct netxen_board_info
) / sizeof(u32
);
766 if (netxen_rom_fast_read(adapter
, addr
, ptr32
) == -1) {
772 if (boardinfo
->magic
!= NETXEN_BDINFO_MAGIC
) {
773 printk("%s: ERROR reading %s board config."
774 " Read %x, expected %x\n", netxen_nic_driver_name
,
775 netxen_nic_driver_name
,
776 boardinfo
->magic
, NETXEN_BDINFO_MAGIC
);
779 if (boardinfo
->header_version
!= NETXEN_BDINFO_VERSION
) {
780 printk("%s: Unknown board config version."
781 " Read %x, expected %x\n", netxen_nic_driver_name
,
782 boardinfo
->header_version
, NETXEN_BDINFO_VERSION
);
786 DPRINTK(INFO
, "Discovered board type:0x%x ", boardinfo
->board_type
);
787 switch ((netxen_brdtype_t
) boardinfo
->board_type
) {
788 case NETXEN_BRDTYPE_P2_SB35_4G
:
789 adapter
->ahw
.board_type
= NETXEN_NIC_GBE
;
791 case NETXEN_BRDTYPE_P2_SB31_10G
:
792 case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ
:
793 case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ
:
794 case NETXEN_BRDTYPE_P2_SB31_10G_CX4
:
795 adapter
->ahw
.board_type
= NETXEN_NIC_XGBE
;
797 case NETXEN_BRDTYPE_P1_BD
:
798 case NETXEN_BRDTYPE_P1_SB
:
799 case NETXEN_BRDTYPE_P1_SMAX
:
800 case NETXEN_BRDTYPE_P1_SOCK
:
801 adapter
->ahw
.board_type
= NETXEN_NIC_GBE
;
804 printk("%s: Unknown(%x)\n", netxen_nic_driver_name
,
805 boardinfo
->board_type
);
812 /* NIU access sections */
814 int netxen_nic_set_mtu_gb(struct netxen_port
*port
, int new_mtu
)
816 struct netxen_adapter
*adapter
= port
->adapter
;
817 netxen_nic_write_w0(adapter
,
818 NETXEN_NIU_GB_MAX_FRAME_SIZE(port
->portnum
),
823 int netxen_nic_set_mtu_xgb(struct netxen_port
*port
, int new_mtu
)
825 struct netxen_adapter
*adapter
= port
->adapter
;
826 new_mtu
+= NETXEN_NIU_HDRSIZE
+ NETXEN_NIU_TLRSIZE
;
827 if (port
->portnum
== 0)
828 netxen_nic_write_w0(adapter
, NETXEN_NIU_XGE_MAX_FRAME_SIZE
, new_mtu
);
829 else if (port
->portnum
== 1)
830 netxen_nic_write_w0(adapter
, NETXEN_NIU_XG1_MAX_FRAME_SIZE
, new_mtu
);
834 void netxen_nic_init_niu_gb(struct netxen_adapter
*adapter
)
837 for (portno
= 0; portno
< NETXEN_NIU_MAX_GBE_PORTS
; portno
++)
838 netxen_niu_gbe_init_port(adapter
, portno
);
841 void netxen_nic_stop_all_ports(struct netxen_adapter
*adapter
)
844 struct netxen_port
*port
;
846 for (port_nr
= 0; port_nr
< adapter
->ahw
.max_ports
; port_nr
++) {
847 port
= adapter
->port
[port_nr
];
848 if (adapter
->stop_port
)
849 adapter
->stop_port(adapter
, port
->portnum
);
854 netxen_crb_writelit_adapter(struct netxen_adapter
*adapter
, unsigned long off
,
859 if (ADDR_IN_WINDOW1(off
)) {
860 writel(data
, NETXEN_CRB_NORMALIZE(adapter
, off
));
862 netxen_nic_pci_change_crbwindow(adapter
, 0);
863 addr
= pci_base_offset(adapter
, off
);
865 netxen_nic_pci_change_crbwindow(adapter
, 1);
869 void netxen_nic_set_link_parameters(struct netxen_port
*port
)
871 struct netxen_adapter
*adapter
= port
->adapter
;
876 netxen_nic_read_w0(adapter
, NETXEN_NIU_MODE
, &mode
);
877 if (netxen_get_niu_enable_ge(mode
)) { /* Gb 10/100/1000 Mbps mode */
878 if (adapter
->phy_read
880 phy_read(adapter
, port
->portnum
,
881 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS
,
883 if (netxen_get_phy_link(status
)) {
884 switch (netxen_get_phy_speed(status
)) {
886 port
->link_speed
= SPEED_10
;
889 port
->link_speed
= SPEED_100
;
892 port
->link_speed
= SPEED_1000
;
895 port
->link_speed
= -1;
898 switch (netxen_get_phy_duplex(status
)) {
900 port
->link_duplex
= DUPLEX_HALF
;
903 port
->link_duplex
= DUPLEX_FULL
;
906 port
->link_duplex
= -1;
909 if (adapter
->phy_read
911 phy_read(adapter
, port
->portnum
,
912 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG
,
914 port
->link_autoneg
= autoneg
;
919 port
->link_speed
= -1;
920 port
->link_duplex
= -1;
925 void netxen_nic_flash_print(struct netxen_adapter
*adapter
)
931 char brd_name
[NETXEN_MAX_SHORT_NAME
];
932 struct netxen_new_user_info user_info
;
933 int i
, addr
= USER_START
;
936 struct netxen_board_info
*board_info
= &(adapter
->ahw
.boardcfg
);
937 if (board_info
->magic
!= NETXEN_BDINFO_MAGIC
) {
939 ("NetXen Unknown board config, Read 0x%x expected as 0x%x\n",
940 board_info
->magic
, NETXEN_BDINFO_MAGIC
);
943 if (board_info
->header_version
!= NETXEN_BDINFO_VERSION
) {
944 printk("NetXen Unknown board config version."
945 " Read %x, expected %x\n",
946 board_info
->header_version
, NETXEN_BDINFO_VERSION
);
950 ptr32
= (u32
*) & user_info
;
952 i
< sizeof(struct netxen_new_user_info
) / sizeof(u32
);
954 if (netxen_rom_fast_read(adapter
, addr
, ptr32
) == -1) {
955 printk("%s: ERROR reading %s board userarea.\n",
956 netxen_nic_driver_name
,
957 netxen_nic_driver_name
);
960 *ptr32
= le32_to_cpu(*ptr32
);
964 get_brd_name_by_type(board_info
->board_type
, brd_name
);
966 printk("NetXen %s Board S/N %s Chip id 0x%x\n",
967 brd_name
, user_info
.serial_num
, board_info
->chip_id
);
969 printk("NetXen %s Board #%d, Chip id 0x%x\n",
970 board_info
->board_type
== 0x0b ? "XGB" : "GBE",
971 board_info
->board_num
, board_info
->chip_id
);
972 fw_major
= readl(NETXEN_CRB_NORMALIZE(adapter
,
973 NETXEN_FW_VERSION_MAJOR
));
974 fw_minor
= readl(NETXEN_CRB_NORMALIZE(adapter
,
975 NETXEN_FW_VERSION_MINOR
));
977 readl(NETXEN_CRB_NORMALIZE(adapter
, NETXEN_FW_VERSION_SUB
));
979 printk("NetXen Firmware version %d.%d.%d\n", fw_major
, fw_minor
,
982 if (fw_major
!= _NETXEN_NIC_LINUX_MAJOR
) {
983 printk(KERN_ERR
"The mismatch in driver version and firmware "
984 "version major number\n"
985 "Driver version major number = %d \t"
986 "Firmware version major number = %d \n",
987 _NETXEN_NIC_LINUX_MAJOR
, fw_major
);
988 adapter
->driver_mismatch
= 1;
990 if (fw_minor
!= _NETXEN_NIC_LINUX_MINOR
&&
991 fw_minor
!= (_NETXEN_NIC_LINUX_MINOR
+ 1)) {
992 printk(KERN_ERR
"The mismatch in driver version and firmware "
993 "version minor number\n"
994 "Driver version minor number = %d \t"
995 "Firmware version minor number = %d \n",
996 _NETXEN_NIC_LINUX_MINOR
, fw_minor
);
997 adapter
->driver_mismatch
= 1;
999 if (adapter
->driver_mismatch
)
1000 printk(KERN_INFO
"Use the driver with version no %d.%d.xxx\n",
1001 fw_major
, fw_minor
);