drivers/mtd/devices/ms02-nv.h

   1 /*
   2  *      Copyright (c) 2001, 2003  Maciej W. Rozycki
   3  *
   4  *      DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
   5  *      DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
   6  *      systems.
   7  *
   8  *      This program is free software; you can redistribute it and/or
   9  *      modify it under the terms of the GNU General Public License
  10  *      as published by the Free Software Foundation; either version
  11  *      2 of the License, or (at your option) any later version.
  12  *
  13  *      $Id: ms02-nv.h,v 1.3 2003/08/19 09:25:36 dwmw2 Exp $
  14  */
  15
  16 #include <linux/ioport.h>
  17 #include <linux/mtd/mtd.h>
  18
  19 /*
  20  * Addresses are decoded as follows:
  21  *
  22  * 0x000000 - 0x3fffff  SRAM
  23  * 0x400000 - 0x7fffff  CSR
  24  *
  25  * Within the SRAM area the following ranges are forced by the system
  26  * firmware:
  27  *
  28  * 0x000000 - 0x0003ff  diagnostic area, destroyed upon a reboot
  29  * 0x000400 - ENDofRAM  storage area, available to operating systems
  30  *
  31  * but we can't really use the available area right from 0x000400 as
  32  * the first word is used by the firmware as a status flag passed
  33  * from an operating system.  If anything but the valid data magic
  34  * ID value is found, the firmware considers the SRAM clean, i.e.
  35  * containing no valid data, and disables the battery resulting in
  36  * data being erased as soon as power is switched off.  So the choice
  37  * for the start address of the user-available is 0x001000 which is
  38  * nicely page aligned.  The area between 0x000404 and 0x000fff may
  39  * be used by the driver for own needs.
  40  *
  41  * The diagnostic area defines two status words to be read by an
  42  * operating system, a magic ID to distinguish a MS02-NV board from
  43  * anything else and a status information providing results of tests
  44  * as well as the size of SRAM available, which can be 1MiB or 2MiB
  45  * (that's what the firmware handles; no idea if 2MiB modules ever
  46  * existed).
  47  *
  48  * The firmware only handles the MS02-NV board if installed in the
  49  * last (15th) slot, so for any other location the status information
  50  * stored in the SRAM cannot be relied upon.  But from the hardware
  51  * point of view there is no problem using up to 14 such boards in a
  52  * system -- only the 1st slot needs to be filled with a DRAM module.
  53  * The MS02-NV board is ECC-protected, like other MS02 memory boards.
  54  *
  55  * The state of the battery as provided by the CSR is reflected on
  56  * the two onboard LEDs.  When facing the battery side of the board,
  57  * with the LEDs at the top left and the battery at the bottom right
  58  * (i.e. looking from the back side of the system box), their meaning
  59  * is as follows (the system has to be powered on):
  60  *
  61  * left LED             battery disable status: lit = enabled
  62  * right LED            battery condition status: lit = OK
  63  */
  64
  65 /* MS02-NV iomem register offsets. */
  66 #define MS02NV_CSR              0x400000        /* control & status register */
  67
  68 /* MS02-NV CSR status bits. */
  69 #define MS02NV_CSR_BATT_OK      0x01            /* battery OK */
  70 #define MS02NV_CSR_BATT_OFF     0x02            /* battery disabled */
  71
  72
  73 /* MS02-NV memory offsets. */
  74 #define MS02NV_DIAG             0x0003f8        /* diagnostic status */
  75 #define MS02NV_MAGIC            0x0003fc        /* MS02-NV magic ID */
  76 #define MS02NV_VALID            0x000400        /* valid data magic ID */
  77 #define MS02NV_RAM              0x001000        /* user-exposed RAM start */
  78
  79 /* MS02-NV diagnostic status bits. */
  80 #define MS02NV_DIAG_TEST        0x01            /* SRAM test done (?) */
  81 #define MS02NV_DIAG_RO          0x02            /* SRAM r/o test done */
  82 #define MS02NV_DIAG_RW          0x04            /* SRAM r/w test done */
  83 #define MS02NV_DIAG_FAIL        0x08            /* SRAM test failed */
  84 #define MS02NV_DIAG_SIZE_MASK   0xf0            /* SRAM size mask */
  85 #define MS02NV_DIAG_SIZE_SHIFT  0x10            /* SRAM size shift (left) */
  86
  87 /* MS02-NV general constants. */
  88 #define MS02NV_ID               0x03021966      /* MS02-NV magic ID value */
  89 #define MS02NV_VALID_ID         0xbd100248      /* valid data magic ID value */
  90 #define MS02NV_SLOT_SIZE        0x800000        /* size of the address space
  91                                                    decoded by the module */
  92
  93
  94 typedef volatile u32 ms02nv_uint;
  95
  96 struct ms02nv_private {
  97         struct mtd_info *next;
  98         struct {
  99                 struct resource *module;
 100                 struct resource *diag_ram;
 101                 struct resource *user_ram;
 102                 struct resource *csr;
 103         } resource;
 104         u_char *addr;
 105         size_t size;
 106         u_char *uaddr;
 107 };