?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[SUNLANCE]: Mark sparc_lance_probe_one as __devinit.
[linux-2.6/verdex.git] / drivers / serial / pxa.c
bloba720953a404ee3be6d6da99484f537b40a116d66
1 /*
2 * linux/drivers/serial/pxa.c
3 *
4 * Based on drivers/serial/8250.c by Russell King.
5 *
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
18 *
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
25 */
26
27
28 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
29 #define SUPPORT_SYSRQ
30 #endif
31
32 #include <linux/module.h>
33 #include <linux/ioport.h>
34 #include <linux/init.h>
35 #include <linux/console.h>
36 #include <linux/sysrq.h>
37 #include <linux/serial_reg.h>
38 #include <linux/circ_buf.h>
39 #include <linux/delay.h>
40 #include <linux/interrupt.h>
41 #include <linux/platform_device.h>
42 #include <linux/tty.h>
43 #include <linux/tty_flip.h>
44 #include <linux/serial_core.h>
45
46 #include <asm/io.h>
47 #include <asm/hardware.h>
48 #include <asm/irq.h>
49 #include <asm/arch/pxa-regs.h>
50
51
52 struct uart_pxa_port {
53 struct uart_port port;
54 unsigned char ier;
55 unsigned char lcr;
56 unsigned char mcr;
57 unsigned int lsr_break_flag;
58 unsigned int cken;
59 char *name;
60 };
61
62 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
63 {
64 offset <<= 2;
65 return readl(up->port.membase + offset);
66 }
67
68 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
69 {
70 offset <<= 2;
71 writel(value, up->port.membase + offset);
72 }
73
74 static void serial_pxa_enable_ms(struct uart_port *port)
75 {
76 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
77
78 up->ier |= UART_IER_MSI;
79 serial_out(up, UART_IER, up->ier);
80 }
81
82 static void serial_pxa_stop_tx(struct uart_port *port)
83 {
84 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
85
86 if (up->ier & UART_IER_THRI) {
87 up->ier &= ~UART_IER_THRI;
88 serial_out(up, UART_IER, up->ier);
89 }
90 }
91
92 static void serial_pxa_stop_rx(struct uart_port *port)
93 {
94 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
95
96 up->ier &= ~UART_IER_RLSI;
97 up->port.read_status_mask &= ~UART_LSR_DR;
98 serial_out(up, UART_IER, up->ier);
99 }
100
101 static inline void
102 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
103 {
104 struct tty_struct *tty = up->port.info->tty;
105 unsigned int ch, flag;
106 int max_count = 256;
107
108 do {
109 ch = serial_in(up, UART_RX);
110 flag = TTY_NORMAL;
111 up->port.icount.rx++;
112
113 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
114 UART_LSR_FE | UART_LSR_OE))) {
115 /*
116 * For statistics only
117 */
118 if (*status & UART_LSR_BI) {
119 *status &= ~(UART_LSR_FE | UART_LSR_PE);
120 up->port.icount.brk++;
121 /*
122 * We do the SysRQ and SAK checking
123 * here because otherwise the break
124 * may get masked by ignore_status_mask
125 * or read_status_mask.
126 */
127 if (uart_handle_break(&up->port))
128 goto ignore_char;
129 } else if (*status & UART_LSR_PE)
130 up->port.icount.parity++;
131 else if (*status & UART_LSR_FE)
132 up->port.icount.frame++;
133 if (*status & UART_LSR_OE)
134 up->port.icount.overrun++;
135
136 /*
137 * Mask off conditions which should be ignored.
138 */
139 *status &= up->port.read_status_mask;
140
141 #ifdef CONFIG_SERIAL_PXA_CONSOLE
142 if (up->port.line == up->port.cons->index) {
143 /* Recover the break flag from console xmit */
144 *status |= up->lsr_break_flag;
145 up->lsr_break_flag = 0;
146 }
147 #endif
148 if (*status & UART_LSR_BI) {
149 flag = TTY_BREAK;
150 } else if (*status & UART_LSR_PE)
151 flag = TTY_PARITY;
152 else if (*status & UART_LSR_FE)
153 flag = TTY_FRAME;
154 }
155
156 if (uart_handle_sysrq_char(&up->port, ch, regs))
157 goto ignore_char;
158
159 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
160
161 ignore_char:
162 *status = serial_in(up, UART_LSR);
163 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
164 tty_flip_buffer_push(tty);
165 }
166
167 static void transmit_chars(struct uart_pxa_port *up)
168 {
169 struct circ_buf *xmit = &up->port.info->xmit;
170 int count;
171
172 if (up->port.x_char) {
173 serial_out(up, UART_TX, up->port.x_char);
174 up->port.icount.tx++;
175 up->port.x_char = 0;
176 return;
177 }
178 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
179 serial_pxa_stop_tx(&up->port);
180 return;
181 }
182
183 count = up->port.fifosize / 2;
184 do {
185 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
186 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
187 up->port.icount.tx++;
188 if (uart_circ_empty(xmit))
189 break;
190 } while (--count > 0);
191
192 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
193 uart_write_wakeup(&up->port);
194
195
196 if (uart_circ_empty(xmit))
197 serial_pxa_stop_tx(&up->port);
198 }
199
200 static void serial_pxa_start_tx(struct uart_port *port)
201 {
202 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
203
204 if (!(up->ier & UART_IER_THRI)) {
205 up->ier |= UART_IER_THRI;
206 serial_out(up, UART_IER, up->ier);
207 }
208 }
209
210 static inline void check_modem_status(struct uart_pxa_port *up)
211 {
212 int status;
213
214 status = serial_in(up, UART_MSR);
215
216 if ((status & UART_MSR_ANY_DELTA) == 0)
217 return;
218
219 if (status & UART_MSR_TERI)
220 up->port.icount.rng++;
221 if (status & UART_MSR_DDSR)
222 up->port.icount.dsr++;
223 if (status & UART_MSR_DDCD)
224 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
225 if (status & UART_MSR_DCTS)
226 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
227
228 wake_up_interruptible(&up->port.info->delta_msr_wait);
229 }
230
231 /*
232 * This handles the interrupt from one port.
233 */
234 static inline irqreturn_t
235 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
236 {
237 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
238 unsigned int iir, lsr;
239
240 iir = serial_in(up, UART_IIR);
241 if (iir & UART_IIR_NO_INT)
242 return IRQ_NONE;
243 lsr = serial_in(up, UART_LSR);
244 if (lsr & UART_LSR_DR)
245 receive_chars(up, &lsr, regs);
246 check_modem_status(up);
247 if (lsr & UART_LSR_THRE)
248 transmit_chars(up);
249 return IRQ_HANDLED;
250 }
251
252 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
253 {
254 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
255 unsigned long flags;
256 unsigned int ret;
257
258 spin_lock_irqsave(&up->port.lock, flags);
259 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
260 spin_unlock_irqrestore(&up->port.lock, flags);
261
262 return ret;
263 }
264
265 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
266 {
267 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
268 unsigned char status;
269 unsigned int ret;
270
271 status = serial_in(up, UART_MSR);
272
273 ret = 0;
274 if (status & UART_MSR_DCD)
275 ret |= TIOCM_CAR;
276 if (status & UART_MSR_RI)
277 ret |= TIOCM_RNG;
278 if (status & UART_MSR_DSR)
279 ret |= TIOCM_DSR;
280 if (status & UART_MSR_CTS)
281 ret |= TIOCM_CTS;
282 return ret;
283 }
284
285 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
286 {
287 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
288 unsigned char mcr = 0;
289
290 if (mctrl & TIOCM_RTS)
291 mcr |= UART_MCR_RTS;
292 if (mctrl & TIOCM_DTR)
293 mcr |= UART_MCR_DTR;
294 if (mctrl & TIOCM_OUT1)
295 mcr |= UART_MCR_OUT1;
296 if (mctrl & TIOCM_OUT2)
297 mcr |= UART_MCR_OUT2;
298 if (mctrl & TIOCM_LOOP)
299 mcr |= UART_MCR_LOOP;
300
301 mcr |= up->mcr;
302
303 serial_out(up, UART_MCR, mcr);
304 }
305
306 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
307 {
308 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
309 unsigned long flags;
310
311 spin_lock_irqsave(&up->port.lock, flags);
312 if (break_state == -1)
313 up->lcr |= UART_LCR_SBC;
314 else
315 up->lcr &= ~UART_LCR_SBC;
316 serial_out(up, UART_LCR, up->lcr);
317 spin_unlock_irqrestore(&up->port.lock, flags);
318 }
319
320 #if 0
321 static void serial_pxa_dma_init(struct pxa_uart *up)
322 {
323 up->rxdma =
324 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
325 if (up->rxdma < 0)
326 goto out;
327 up->txdma =
328 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
329 if (up->txdma < 0)
330 goto err_txdma;
331 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
332 if (!up->dmadesc)
333 goto err_alloc;
334
335 /* ... */
336 err_alloc:
337 pxa_free_dma(up->txdma);
338 err_rxdma:
339 pxa_free_dma(up->rxdma);
340 out:
341 return;
342 }
343 #endif
344
345 static int serial_pxa_startup(struct uart_port *port)
346 {
347 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
348 unsigned long flags;
349 int retval;
350
351 if (port->line == 3) /* HWUART */
352 up->mcr |= UART_MCR_AFE;
353 else
354 up->mcr = 0;
355
356 /*
357 * Allocate the IRQ
358 */
359 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
360 if (retval)
361 return retval;
362
363 /*
364 * Clear the FIFO buffers and disable them.
365 * (they will be reenabled in set_termios())
366 */
367 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
368 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
369 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
370 serial_out(up, UART_FCR, 0);
371
372 /*
373 * Clear the interrupt registers.
374 */
375 (void) serial_in(up, UART_LSR);
376 (void) serial_in(up, UART_RX);
377 (void) serial_in(up, UART_IIR);
378 (void) serial_in(up, UART_MSR);
379
380 /*
381 * Now, initialize the UART
382 */
383 serial_out(up, UART_LCR, UART_LCR_WLEN8);
384
385 spin_lock_irqsave(&up->port.lock, flags);
386 up->port.mctrl |= TIOCM_OUT2;
387 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
388 spin_unlock_irqrestore(&up->port.lock, flags);
389
390 /*
391 * Finally, enable interrupts. Note: Modem status interrupts
392 * are set via set_termios(), which will be occurring imminently
393 * anyway, so we don't enable them here.
394 */
395 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
396 serial_out(up, UART_IER, up->ier);
397
398 /*
399 * And clear the interrupt registers again for luck.
400 */
401 (void) serial_in(up, UART_LSR);
402 (void) serial_in(up, UART_RX);
403 (void) serial_in(up, UART_IIR);
404 (void) serial_in(up, UART_MSR);
405
406 return 0;
407 }
408
409 static void serial_pxa_shutdown(struct uart_port *port)
410 {
411 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
412 unsigned long flags;
413
414 free_irq(up->port.irq, up);
415
416 /*
417 * Disable interrupts from this port
418 */
419 up->ier = 0;
420 serial_out(up, UART_IER, 0);
421
422 spin_lock_irqsave(&up->port.lock, flags);
423 up->port.mctrl &= ~TIOCM_OUT2;
424 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
425 spin_unlock_irqrestore(&up->port.lock, flags);
426
427 /*
428 * Disable break condition and FIFOs
429 */
430 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
431 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
432 UART_FCR_CLEAR_RCVR |
433 UART_FCR_CLEAR_XMIT);
434 serial_out(up, UART_FCR, 0);
435 }
436
437 static void
438 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
439 struct termios *old)
440 {
441 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
442 unsigned char cval, fcr = 0;
443 unsigned long flags;
444 unsigned int baud, quot;
445
446 switch (termios->c_cflag & CSIZE) {
447 case CS5:
448 cval = UART_LCR_WLEN5;
449 break;
450 case CS6:
451 cval = UART_LCR_WLEN6;
452 break;
453 case CS7:
454 cval = UART_LCR_WLEN7;
455 break;
456 default:
457 case CS8:
458 cval = UART_LCR_WLEN8;
459 break;
460 }
461
462 if (termios->c_cflag & CSTOPB)
463 cval |= UART_LCR_STOP;
464 if (termios->c_cflag & PARENB)
465 cval |= UART_LCR_PARITY;
466 if (!(termios->c_cflag & PARODD))
467 cval |= UART_LCR_EPAR;
468
469 /*
470 * Ask the core to calculate the divisor for us.
471 */
472 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
473 quot = uart_get_divisor(port, baud);
474
475 if ((up->port.uartclk / quot) < (2400 * 16))
476 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
477 else if ((up->port.uartclk / quot) < (230400 * 16))
478 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
479 else
480 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
481
482 /*
483 * Ok, we're now changing the port state. Do it with
484 * interrupts disabled.
485 */
486 spin_lock_irqsave(&up->port.lock, flags);
487
488 /*
489 * Ensure the port will be enabled.
490 * This is required especially for serial console.
491 */
492 up->ier |= IER_UUE;
493
494 /*
495 * Update the per-port timeout.
496 */
497 uart_update_timeout(port, termios->c_cflag, baud);
498
499 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
500 if (termios->c_iflag & INPCK)
501 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
502 if (termios->c_iflag & (BRKINT | PARMRK))
503 up->port.read_status_mask |= UART_LSR_BI;
504
505 /*
506 * Characters to ignore
507 */
508 up->port.ignore_status_mask = 0;
509 if (termios->c_iflag & IGNPAR)
510 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
511 if (termios->c_iflag & IGNBRK) {
512 up->port.ignore_status_mask |= UART_LSR_BI;
513 /*
514 * If we're ignoring parity and break indicators,
515 * ignore overruns too (for real raw support).
516 */
517 if (termios->c_iflag & IGNPAR)
518 up->port.ignore_status_mask |= UART_LSR_OE;
519 }
520
521 /*
522 * ignore all characters if CREAD is not set
523 */
524 if ((termios->c_cflag & CREAD) == 0)
525 up->port.ignore_status_mask |= UART_LSR_DR;
526
527 /*
528 * CTS flow control flag and modem status interrupts
529 */
530 up->ier &= ~UART_IER_MSI;
531 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
532 up->ier |= UART_IER_MSI;
533
534 serial_out(up, UART_IER, up->ier);
535
536 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
537 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
538 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
539 serial_out(up, UART_LCR, cval); /* reset DLAB */
540 up->lcr = cval; /* Save LCR */
541 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
542 serial_out(up, UART_FCR, fcr);
543 spin_unlock_irqrestore(&up->port.lock, flags);
544 }
545
546 static void
547 serial_pxa_pm(struct uart_port *port, unsigned int state,
548 unsigned int oldstate)
549 {
550 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
551 pxa_set_cken(up->cken, !state);
552 if (!state)
553 udelay(1);
554 }
555
556 static void serial_pxa_release_port(struct uart_port *port)
557 {
558 }
559
560 static int serial_pxa_request_port(struct uart_port *port)
561 {
562 return 0;
563 }
564
565 static void serial_pxa_config_port(struct uart_port *port, int flags)
566 {
567 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
568 up->port.type = PORT_PXA;
569 }
570
571 static int
572 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
573 {
574 /* we don't want the core code to modify any port params */
575 return -EINVAL;
576 }
577
578 static const char *
579 serial_pxa_type(struct uart_port *port)
580 {
581 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
582 return up->name;
583 }
584
585 #ifdef CONFIG_SERIAL_PXA_CONSOLE
586
587 static struct uart_pxa_port serial_pxa_ports[];
588 static struct uart_driver serial_pxa_reg;
589
590 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
591
592 /*
593 * Wait for transmitter & holding register to empty
594 */
595 static inline void wait_for_xmitr(struct uart_pxa_port *up)
596 {
597 unsigned int status, tmout = 10000;
598
599 /* Wait up to 10ms for the character(s) to be sent. */
600 do {
601 status = serial_in(up, UART_LSR);
602
603 if (status & UART_LSR_BI)
604 up->lsr_break_flag = UART_LSR_BI;
605
606 if (--tmout == 0)
607 break;
608 udelay(1);
609 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
610
611 /* Wait up to 1s for flow control if necessary */
612 if (up->port.flags & UPF_CONS_FLOW) {
613 tmout = 1000000;
614 while (--tmout &&
615 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
616 udelay(1);
617 }
618 }
619
620 static void serial_pxa_console_putchar(struct uart_port *port, int ch)
621 {
622 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
623
624 wait_for_xmitr(up);
625 serial_out(up, UART_TX, ch);
626 }
627
628 /*
629 * Print a string to the serial port trying not to disturb
630 * any possible real use of the port...
631 *
632 * The console_lock must be held when we get here.
633 */
634 static void
635 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
636 {
637 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
638 unsigned int ier;
639
640 /*
641 * First save the IER then disable the interrupts
642 */
643 ier = serial_in(up, UART_IER);
644 serial_out(up, UART_IER, UART_IER_UUE);
645
646 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
647
648 /*
649 * Finally, wait for transmitter to become empty
650 * and restore the IER
651 */
652 wait_for_xmitr(up);
653 serial_out(up, UART_IER, ier);
654 }
655
656 static int __init
657 serial_pxa_console_setup(struct console *co, char *options)
658 {
659 struct uart_pxa_port *up;
660 int baud = 9600;
661 int bits = 8;
662 int parity = 'n';
663 int flow = 'n';
664
665 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
666 co->index = 0;
667 up = &serial_pxa_ports[co->index];
668
669 if (options)
670 uart_parse_options(options, &baud, &parity, &bits, &flow);
671
672 return uart_set_options(&up->port, co, baud, parity, bits, flow);
673 }
674
675 static struct console serial_pxa_console = {
676 .name = "ttyS",
677 .write = serial_pxa_console_write,
678 .device = uart_console_device,
679 .setup = serial_pxa_console_setup,
680 .flags = CON_PRINTBUFFER,
681 .index = -1,
682 .data = &serial_pxa_reg,
683 };
684
685 static int __init
686 serial_pxa_console_init(void)
687 {
688 register_console(&serial_pxa_console);
689 return 0;
690 }
691
692 console_initcall(serial_pxa_console_init);
693
694 #define PXA_CONSOLE &serial_pxa_console
695 #else
696 #define PXA_CONSOLE NULL
697 #endif
698
699 struct uart_ops serial_pxa_pops = {
700 .tx_empty = serial_pxa_tx_empty,
701 .set_mctrl = serial_pxa_set_mctrl,
702 .get_mctrl = serial_pxa_get_mctrl,
703 .stop_tx = serial_pxa_stop_tx,
704 .start_tx = serial_pxa_start_tx,
705 .stop_rx = serial_pxa_stop_rx,
706 .enable_ms = serial_pxa_enable_ms,
707 .break_ctl = serial_pxa_break_ctl,
708 .startup = serial_pxa_startup,
709 .shutdown = serial_pxa_shutdown,
710 .set_termios = serial_pxa_set_termios,
711 .pm = serial_pxa_pm,
712 .type = serial_pxa_type,
713 .release_port = serial_pxa_release_port,
714 .request_port = serial_pxa_request_port,
715 .config_port = serial_pxa_config_port,
716 .verify_port = serial_pxa_verify_port,
717 };
718
719 static struct uart_pxa_port serial_pxa_ports[] = {
720 { /* FFUART */
721 .name = "FFUART",
722 .cken = CKEN6_FFUART,
723 .port = {
724 .type = PORT_PXA,
725 .iotype = UPIO_MEM,
726 .membase = (void *)&FFUART,
727 .mapbase = __PREG(FFUART),
728 .irq = IRQ_FFUART,
729 .uartclk = 921600 * 16,
730 .fifosize = 64,
731 .ops = &serial_pxa_pops,
732 .line = 0,
733 },
734 }, { /* BTUART */
735 .name = "BTUART",
736 .cken = CKEN7_BTUART,
737 .port = {
738 .type = PORT_PXA,
739 .iotype = UPIO_MEM,
740 .membase = (void *)&BTUART,
741 .mapbase = __PREG(BTUART),
742 .irq = IRQ_BTUART,
743 .uartclk = 921600 * 16,
744 .fifosize = 64,
745 .ops = &serial_pxa_pops,
746 .line = 1,
747 },
748 }, { /* STUART */
749 .name = "STUART",
750 .cken = CKEN5_STUART,
751 .port = {
752 .type = PORT_PXA,
753 .iotype = UPIO_MEM,
754 .membase = (void *)&STUART,
755 .mapbase = __PREG(STUART),
756 .irq = IRQ_STUART,
757 .uartclk = 921600 * 16,
758 .fifosize = 64,
759 .ops = &serial_pxa_pops,
760 .line = 2,
761 },
762 }, { /* HWUART */
763 .name = "HWUART",
764 .cken = CKEN4_HWUART,
765 .port = {
766 .type = PORT_PXA,
767 .iotype = UPIO_MEM,
768 .membase = (void *)&HWUART,
769 .mapbase = __PREG(HWUART),
770 .irq = IRQ_HWUART,
771 .uartclk = 921600 * 16,
772 .fifosize = 64,
773 .ops = &serial_pxa_pops,
774 .line = 3,
775 },
776 }
777 };
778
779 static struct uart_driver serial_pxa_reg = {
780 .owner = THIS_MODULE,
781 .driver_name = "PXA serial",
782 .dev_name = "ttyS",
783 .major = TTY_MAJOR,
784 .minor = 64,
785 .nr = ARRAY_SIZE(serial_pxa_ports),
786 .cons = PXA_CONSOLE,
787 };
788
789 static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
790 {
791 struct uart_pxa_port *sport = platform_get_drvdata(dev);
792
793 if (sport)
794 uart_suspend_port(&serial_pxa_reg, &sport->port);
795
796 return 0;
797 }
798
799 static int serial_pxa_resume(struct platform_device *dev)
800 {
801 struct uart_pxa_port *sport = platform_get_drvdata(dev);
802
803 if (sport)
804 uart_resume_port(&serial_pxa_reg, &sport->port);
805
806 return 0;
807 }
808
809 static int serial_pxa_probe(struct platform_device *dev)
810 {
811 serial_pxa_ports[dev->id].port.dev = &dev->dev;
812 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
813 platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
814 return 0;
815 }
816
817 static int serial_pxa_remove(struct platform_device *dev)
818 {
819 struct uart_pxa_port *sport = platform_get_drvdata(dev);
820
821 platform_set_drvdata(dev, NULL);
822
823 if (sport)
824 uart_remove_one_port(&serial_pxa_reg, &sport->port);
825
826 return 0;
827 }
828
829 static struct platform_driver serial_pxa_driver = {
830 .probe = serial_pxa_probe,
831 .remove = serial_pxa_remove,
832
833 .suspend = serial_pxa_suspend,
834 .resume = serial_pxa_resume,
835 .driver = {
836 .name = "pxa2xx-uart",
837 },
838 };
839
840 int __init serial_pxa_init(void)
841 {
842 int ret;
843
844 ret = uart_register_driver(&serial_pxa_reg);
845 if (ret != 0)
846 return ret;
847
848 ret = platform_driver_register(&serial_pxa_driver);
849 if (ret != 0)
850 uart_unregister_driver(&serial_pxa_reg);
851
852 return ret;
853 }
854
855 void __exit serial_pxa_exit(void)
856 {
857 platform_driver_unregister(&serial_pxa_driver);
858 uart_unregister_driver(&serial_pxa_reg);
859 }
860
861 module_init(serial_pxa_init);
862 module_exit(serial_pxa_exit);
863
864 MODULE_LICENSE("GPL");
865
Verdex Pro support