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[NETFILTER]: Move ip6_masked_addrcmp to include/net/ipv6.h
[linux-2.6/verdex.git] / drivers / media / video / tvaudio.c
blobc8e5ad0e8185a0c2f3cea24be094148db2b928a4
1 /*
2 * experimental driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * This code is placed under the terms of the GNU General Public License
11 *
12 * OPTIONS:
13 * debug - set to 1 if you'd like to see debug messages
14 *
15 */
16
17 #include <linux/config.h>
18 #include <linux/module.h>
19 #include <linux/moduleparam.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/string.h>
23 #include <linux/timer.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/slab.h>
27 #include <linux/videodev.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c-algo-bit.h>
30 #include <linux/init.h>
31 #include <linux/smp_lock.h>
32
33 #include <media/audiochip.h>
34 #include <media/v4l2-common.h>
35
36 #include "tvaudio.h"
37
38 /* ---------------------------------------------------------------------- */
39 /* insmod args */
40
41 static int debug = 0; /* insmod parameter */
42 module_param(debug, int, 0644);
43
44 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46 MODULE_LICENSE("GPL");
47
48 #define UNSET (-1U)
49
50 /* ---------------------------------------------------------------------- */
51 /* our structs */
52
53 #define MAXREGS 64
54
55 struct CHIPSTATE;
56 typedef int (*getvalue)(int);
57 typedef int (*checkit)(struct CHIPSTATE*);
58 typedef int (*initialize)(struct CHIPSTATE*);
59 typedef int (*getmode)(struct CHIPSTATE*);
60 typedef void (*setmode)(struct CHIPSTATE*, int mode);
61 typedef void (*checkmode)(struct CHIPSTATE*);
62
63 /* i2c command */
64 typedef struct AUDIOCMD {
65 int count; /* # of bytes to send */
66 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
67 } audiocmd;
68
69 /* chip description */
70 struct CHIPDESC {
71 char *name; /* chip name */
72 int id; /* ID */
73 int addr_lo, addr_hi; /* i2c address range */
74 int registers; /* # of registers */
75
76 int *insmodopt;
77 checkit checkit;
78 initialize initialize;
79 int flags;
80 #define CHIP_HAS_VOLUME 1
81 #define CHIP_HAS_BASSTREBLE 2
82 #define CHIP_HAS_INPUTSEL 4
83
84 /* various i2c command sequences */
85 audiocmd init;
86
87 /* which register has which value */
88 int leftreg,rightreg,treblereg,bassreg;
89
90 /* initialize with (defaults to 65535/65535/32768/32768 */
91 int leftinit,rightinit,trebleinit,bassinit;
92
93 /* functions to convert the values (v4l -> chip) */
94 getvalue volfunc,treblefunc,bassfunc;
95
96 /* get/set mode */
97 getmode getmode;
98 setmode setmode;
99
100 /* check / autoswitch audio after channel switches */
101 checkmode checkmode;
102
103 /* input switch register + values for v4l inputs */
104 int inputreg;
105 int inputmap[8];
106 int inputmute;
107 int inputmask;
108 };
109 static struct CHIPDESC chiplist[];
110
111 /* current state of the chip */
112 struct CHIPSTATE {
113 struct i2c_client c;
114
115 /* index into CHIPDESC array */
116 int type;
117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
122 __u16 left,right,treble,bass,mode;
123 int prevmode;
124 int radio;
125
126 /* thread */
127 pid_t tpid;
128 struct completion texit;
129 wait_queue_head_t wq;
130 struct timer_list wt;
131 int done;
132 int watch_stereo;
133 };
134
135 /* ---------------------------------------------------------------------- */
136 /* i2c addresses */
137
138 static unsigned short normal_i2c[] = {
139 I2C_TDA8425 >> 1,
140 I2C_TEA6300 >> 1,
141 I2C_TEA6420 >> 1,
142 I2C_TDA9840 >> 1,
143 I2C_TDA985x_L >> 1,
144 I2C_TDA985x_H >> 1,
145 I2C_TDA9874 >> 1,
146 I2C_PIC16C54 >> 1,
147 I2C_CLIENT_END };
148 I2C_CLIENT_INSMOD;
149
150 static struct i2c_driver driver;
151 static struct i2c_client client_template;
152
153
154 /* ---------------------------------------------------------------------- */
155 /* i2c I/O functions */
156
157 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
158 {
159 unsigned char buffer[2];
160
161 if (-1 == subaddr) {
162 v4l_dbg(1, debug, &chip->c, "%s: chip_write: 0x%x\n",
163 chip->c.name, val);
164 chip->shadow.bytes[1] = val;
165 buffer[0] = val;
166 if (1 != i2c_master_send(&chip->c,buffer,1)) {
167 v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
168 chip->c.name, val);
169 return -1;
170 }
171 } else {
172 v4l_dbg(1, debug, &chip->c, "%s: chip_write: reg%d=0x%x\n",
173 chip->c.name, subaddr, val);
174 chip->shadow.bytes[subaddr+1] = val;
175 buffer[0] = subaddr;
176 buffer[1] = val;
177 if (2 != i2c_master_send(&chip->c,buffer,2)) {
178 v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
179 chip->c.name, subaddr, val);
180 return -1;
181 }
182 }
183 return 0;
184 }
185
186 static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
187 {
188 if (mask != 0) {
189 if (-1 == subaddr) {
190 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
191 } else {
192 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
193 }
194 }
195 return chip_write(chip, subaddr, val);
196 }
197
198 static int chip_read(struct CHIPSTATE *chip)
199 {
200 unsigned char buffer;
201
202 if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
203 v4l_warn(&chip->c, "%s: I/O error (read)\n",
204 chip->c.name);
205 return -1;
206 }
207 v4l_dbg(1, debug, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
208 return buffer;
209 }
210
211 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
212 {
213 unsigned char write[1];
214 unsigned char read[1];
215 struct i2c_msg msgs[2] = {
216 { chip->c.addr, 0, 1, write },
217 { chip->c.addr, I2C_M_RD, 1, read }
218 };
219 write[0] = subaddr;
220
221 if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
222 v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
223 return -1;
224 }
225 v4l_dbg(1, debug, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
226 chip->c.name, subaddr,read[0]);
227 return read[0];
228 }
229
230 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
231 {
232 int i;
233
234 if (0 == cmd->count)
235 return 0;
236
237 /* update our shadow register set; print bytes if (debug > 0) */
238 v4l_dbg(1, debug, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
239 chip->c.name, name,cmd->bytes[0]);
240 for (i = 1; i < cmd->count; i++) {
241 if (debug)
242 printk(" 0x%x",cmd->bytes[i]);
243 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
244 }
245 if (debug)
246 printk("\n");
247
248 /* send data to the chip */
249 if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
250 v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
251 return -1;
252 }
253 return 0;
254 }
255
256 /* ---------------------------------------------------------------------- */
257 /* kernel thread for doing i2c stuff asyncronly
258 * right now it is used only to check the audio mode (mono/stereo/whatever)
259 * some time after switching to another TV channel, then turn on stereo
260 * if available, ...
261 */
262
263 static void chip_thread_wake(unsigned long data)
264 {
265 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
266 wake_up_interruptible(&chip->wq);
267 }
268
269 static int chip_thread(void *data)
270 {
271 DECLARE_WAITQUEUE(wait, current);
272 struct CHIPSTATE *chip = data;
273 struct CHIPDESC *desc = chiplist + chip->type;
274
275 daemonize("%s", chip->c.name);
276 allow_signal(SIGTERM);
277 v4l_dbg(1, debug, &chip->c, "%s: thread started\n", chip->c.name);
278
279 for (;;) {
280 add_wait_queue(&chip->wq, &wait);
281 if (!chip->done) {
282 set_current_state(TASK_INTERRUPTIBLE);
283 schedule();
284 }
285 remove_wait_queue(&chip->wq, &wait);
286 try_to_freeze();
287 if (chip->done || signal_pending(current))
288 break;
289 v4l_dbg(1, debug, &chip->c, "%s: thread wakeup\n", chip->c.name);
290
291 /* don't do anything for radio or if mode != auto */
292 if (chip->radio || chip->mode != 0)
293 continue;
294
295 /* have a look what's going on */
296 desc->checkmode(chip);
297
298 /* schedule next check */
299 mod_timer(&chip->wt, jiffies+2*HZ);
300 }
301
302 v4l_dbg(1, debug, &chip->c, "%s: thread exiting\n", chip->c.name);
303 complete_and_exit(&chip->texit, 0);
304 return 0;
305 }
306
307 static void generic_checkmode(struct CHIPSTATE *chip)
308 {
309 struct CHIPDESC *desc = chiplist + chip->type;
310 int mode = desc->getmode(chip);
311
312 if (mode == chip->prevmode)
313 return;
314
315 v4l_dbg(1, debug, &chip->c, "%s: thread checkmode\n", chip->c.name);
316 chip->prevmode = mode;
317
318 if (mode & VIDEO_SOUND_STEREO)
319 desc->setmode(chip,VIDEO_SOUND_STEREO);
320 else if (mode & VIDEO_SOUND_LANG1)
321 desc->setmode(chip,VIDEO_SOUND_LANG1);
322 else if (mode & VIDEO_SOUND_LANG2)
323 desc->setmode(chip,VIDEO_SOUND_LANG2);
324 else
325 desc->setmode(chip,VIDEO_SOUND_MONO);
326 }
327
328 /* ---------------------------------------------------------------------- */
329 /* audio chip descriptions - defines+functions for tda9840 */
330
331 #define TDA9840_SW 0x00
332 #define TDA9840_LVADJ 0x02
333 #define TDA9840_STADJ 0x03
334 #define TDA9840_TEST 0x04
335
336 #define TDA9840_MONO 0x10
337 #define TDA9840_STEREO 0x2a
338 #define TDA9840_DUALA 0x12
339 #define TDA9840_DUALB 0x1e
340 #define TDA9840_DUALAB 0x1a
341 #define TDA9840_DUALBA 0x16
342 #define TDA9840_EXTERNAL 0x7a
343
344 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
345 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
346 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
347
348 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
349 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
350
351 static int tda9840_getmode(struct CHIPSTATE *chip)
352 {
353 int val, mode;
354
355 val = chip_read(chip);
356 mode = VIDEO_SOUND_MONO;
357 if (val & TDA9840_DS_DUAL)
358 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
359 if (val & TDA9840_ST_STEREO)
360 mode |= VIDEO_SOUND_STEREO;
361
362 v4l_dbg(1, debug, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
363 val, mode);
364 return mode;
365 }
366
367 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
368 {
369 int update = 1;
370 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
371
372 switch (mode) {
373 case VIDEO_SOUND_MONO:
374 t |= TDA9840_MONO;
375 break;
376 case VIDEO_SOUND_STEREO:
377 t |= TDA9840_STEREO;
378 break;
379 case VIDEO_SOUND_LANG1:
380 t |= TDA9840_DUALA;
381 break;
382 case VIDEO_SOUND_LANG2:
383 t |= TDA9840_DUALB;
384 break;
385 default:
386 update = 0;
387 }
388
389 if (update)
390 chip_write(chip, TDA9840_SW, t);
391 }
392
393 static int tda9840_checkit(struct CHIPSTATE *chip)
394 {
395 int rc;
396 rc = chip_read(chip);
397 /* lower 5 bits should be 0 */
398 return ((rc & 0x1f) == 0) ? 1 : 0;
399 }
400
401 /* ---------------------------------------------------------------------- */
402 /* audio chip descriptions - defines+functions for tda985x */
403
404 /* subaddresses for TDA9855 */
405 #define TDA9855_VR 0x00 /* Volume, right */
406 #define TDA9855_VL 0x01 /* Volume, left */
407 #define TDA9855_BA 0x02 /* Bass */
408 #define TDA9855_TR 0x03 /* Treble */
409 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
410
411 /* subaddresses for TDA9850 */
412 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
413
414 /* subaddesses for both chips */
415 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
416 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
417 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
418 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
419 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
420 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
421
422 /* Masks for bits in TDA9855 subaddresses */
423 /* 0x00 - VR in TDA9855 */
424 /* 0x01 - VL in TDA9855 */
425 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
426 * in 1dB steps - mute is 0x27 */
427
428
429 /* 0x02 - BA in TDA9855 */
430 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
431 * in .5dB steps - 0 is 0x0E */
432
433
434 /* 0x03 - TR in TDA9855 */
435 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
436 * in 3dB steps - 0 is 0x7 */
437
438 /* Masks for bits in both chips' subaddresses */
439 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
440 /* Unique to TDA9855: */
441 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
442 * in 3dB steps - mute is 0x0 */
443
444 /* Unique to TDA9850: */
445 /* lower 4 bits control stereo noise threshold, over which stereo turns off
446 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
447
448
449 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
450 /* Unique to TDA9855: */
451 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
452 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
453 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
454 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
455 /* Bits 0 to 3 select various combinations
456 * of line in and line out, only the
457 * interesting ones are defined */
458 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
459 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
460
461 /* Unique to TDA9850: */
462 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
463 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
464
465
466 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
467 /* Common to TDA9855 and TDA9850: */
468 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
469 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
470 #define TDA985x_MONO 0 /* Forces Mono output */
471 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
472
473 /* Unique to TDA9855: */
474 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
475 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
476 #define TDA9855_LINEAR 0 /* Linear Stereo */
477 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
478 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
479 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
480 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
481
482 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
483 /* Common to both TDA9855 and TDA9850: */
484 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
485 * in .5dB steps - 0dB is 0x7 */
486
487 /* 0x08, 0x09 - A1 and A2 (read/write) */
488 /* Common to both TDA9855 and TDA9850: */
489 /* lower 5 bites are wideband and spectral expander alignment
490 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
491 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
492 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
493 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
494
495 /* 0x0a - A3 */
496 /* Common to both TDA9855 and TDA9850: */
497 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
498 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
499 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
500
501 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
502 static int tda9855_bass(int val) { return val/0xccc+0x06; }
503 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
504
505 static int tda985x_getmode(struct CHIPSTATE *chip)
506 {
507 int mode;
508
509 mode = ((TDA985x_STP | TDA985x_SAPP) &
510 chip_read(chip)) >> 4;
511 /* Add mono mode regardless of SAP and stereo */
512 /* Allows forced mono */
513 return mode | VIDEO_SOUND_MONO;
514 }
515
516 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
517 {
518 int update = 1;
519 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
520
521 switch (mode) {
522 case VIDEO_SOUND_MONO:
523 c6 |= TDA985x_MONO;
524 break;
525 case VIDEO_SOUND_STEREO:
526 c6 |= TDA985x_STEREO;
527 break;
528 case VIDEO_SOUND_LANG1:
529 c6 |= TDA985x_SAP;
530 break;
531 default:
532 update = 0;
533 }
534 if (update)
535 chip_write(chip,TDA985x_C6,c6);
536 }
537
538
539 /* ---------------------------------------------------------------------- */
540 /* audio chip descriptions - defines+functions for tda9873h */
541
542 /* Subaddresses for TDA9873H */
543
544 #define TDA9873_SW 0x00 /* Switching */
545 #define TDA9873_AD 0x01 /* Adjust */
546 #define TDA9873_PT 0x02 /* Port */
547
548 /* Subaddress 0x00: Switching Data
549 * B7..B0:
550 *
551 * B1, B0: Input source selection
552 * 0, 0 internal
553 * 1, 0 external stereo
554 * 0, 1 external mono
555 */
556 #define TDA9873_INP_MASK 3
557 #define TDA9873_INTERNAL 0
558 #define TDA9873_EXT_STEREO 2
559 #define TDA9873_EXT_MONO 1
560
561 /* B3, B2: output signal select
562 * B4 : transmission mode
563 * 0, 0, 1 Mono
564 * 1, 0, 0 Stereo
565 * 1, 1, 1 Stereo (reversed channel)
566 * 0, 0, 0 Dual AB
567 * 0, 0, 1 Dual AA
568 * 0, 1, 0 Dual BB
569 * 0, 1, 1 Dual BA
570 */
571
572 #define TDA9873_TR_MASK (7 << 2)
573 #define TDA9873_TR_MONO 4
574 #define TDA9873_TR_STEREO 1 << 4
575 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
576 #define TDA9873_TR_DUALA 1 << 2
577 #define TDA9873_TR_DUALB 1 << 3
578
579 /* output level controls
580 * B5: output level switch (0 = reduced gain, 1 = normal gain)
581 * B6: mute (1 = muted)
582 * B7: auto-mute (1 = auto-mute enabled)
583 */
584
585 #define TDA9873_GAIN_NORMAL 1 << 5
586 #define TDA9873_MUTE 1 << 6
587 #define TDA9873_AUTOMUTE 1 << 7
588
589 /* Subaddress 0x01: Adjust/standard */
590
591 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
592 * Recommended value is +0 dB
593 */
594
595 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
596
597 /* Bits C6..C4 control FM stantard
598 * C6, C5, C4
599 * 0, 0, 0 B/G (PAL FM)
600 * 0, 0, 1 M
601 * 0, 1, 0 D/K(1)
602 * 0, 1, 1 D/K(2)
603 * 1, 0, 0 D/K(3)
604 * 1, 0, 1 I
605 */
606 #define TDA9873_BG 0
607 #define TDA9873_M 1
608 #define TDA9873_DK1 2
609 #define TDA9873_DK2 3
610 #define TDA9873_DK3 4
611 #define TDA9873_I 5
612
613 /* C7 controls identification response time (1=fast/0=normal)
614 */
615 #define TDA9873_IDR_NORM 0
616 #define TDA9873_IDR_FAST 1 << 7
617
618
619 /* Subaddress 0x02: Port data */
620
621 /* E1, E0 free programmable ports P1/P2
622 0, 0 both ports low
623 0, 1 P1 high
624 1, 0 P2 high
625 1, 1 both ports high
626 */
627
628 #define TDA9873_PORTS 3
629
630 /* E2: test port */
631 #define TDA9873_TST_PORT 1 << 2
632
633 /* E5..E3 control mono output channel (together with transmission mode bit B4)
634 *
635 * E5 E4 E3 B4 OUTM
636 * 0 0 0 0 mono
637 * 0 0 1 0 DUAL B
638 * 0 1 0 1 mono (from stereo decoder)
639 */
640 #define TDA9873_MOUT_MONO 0
641 #define TDA9873_MOUT_FMONO 0
642 #define TDA9873_MOUT_DUALA 0
643 #define TDA9873_MOUT_DUALB 1 << 3
644 #define TDA9873_MOUT_ST 1 << 4
645 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
646 #define TDA9873_MOUT_EXTL 1 << 5
647 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
648 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
649 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
650
651 /* Status bits: (chip read) */
652 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
653 #define TDA9873_STEREO 2 /* Stereo sound is identified */
654 #define TDA9873_DUAL 4 /* Dual sound is identified */
655
656 static int tda9873_getmode(struct CHIPSTATE *chip)
657 {
658 int val,mode;
659
660 val = chip_read(chip);
661 mode = VIDEO_SOUND_MONO;
662 if (val & TDA9873_STEREO)
663 mode |= VIDEO_SOUND_STEREO;
664 if (val & TDA9873_DUAL)
665 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
666 v4l_dbg(1, debug, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
667 val, mode);
668 return mode;
669 }
670
671 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
672 {
673 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
674 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
675
676 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
677 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): external input\n");
678 return;
679 }
680
681 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
682 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
683
684 switch (mode) {
685 case VIDEO_SOUND_MONO:
686 sw_data |= TDA9873_TR_MONO;
687 break;
688 case VIDEO_SOUND_STEREO:
689 sw_data |= TDA9873_TR_STEREO;
690 break;
691 case VIDEO_SOUND_LANG1:
692 sw_data |= TDA9873_TR_DUALA;
693 break;
694 case VIDEO_SOUND_LANG2:
695 sw_data |= TDA9873_TR_DUALB;
696 break;
697 default:
698 chip->mode = 0;
699 return;
700 }
701
702 chip_write(chip, TDA9873_SW, sw_data);
703 v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
704 mode, sw_data);
705 }
706
707 static int tda9873_checkit(struct CHIPSTATE *chip)
708 {
709 int rc;
710
711 if (-1 == (rc = chip_read2(chip,254)))
712 return 0;
713 return (rc & ~0x1f) == 0x80;
714 }
715
716
717 /* ---------------------------------------------------------------------- */
718 /* audio chip description - defines+functions for tda9874h and tda9874a */
719 /* Dariusz Kowalewski <darekk@automex.pl> */
720
721 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
722 #define TDA9874A_AGCGR 0x00 /* AGC gain */
723 #define TDA9874A_GCONR 0x01 /* general config */
724 #define TDA9874A_MSR 0x02 /* monitor select */
725 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
726 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
727 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
728 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
729 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
730 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
731 #define TDA9874A_DCR 0x09 /* demodulator config */
732 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
733 #define TDA9874A_FMMR 0x0b /* FM dematrix */
734 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
735 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
736 #define TDA9874A_NCONR 0x0e /* NICAM config */
737 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
738 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
739 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
740 #define TDA9874A_AMCONR 0x12 /* audio mute control */
741 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
742 #define TDA9874A_AOSR 0x14 /* analog output select */
743 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
744 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
745 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
746 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
747 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
748
749 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
750 #define TDA9874A_DSR 0x00 /* device status */
751 #define TDA9874A_NSR 0x01 /* NICAM status */
752 #define TDA9874A_NECR 0x02 /* NICAM error count */
753 #define TDA9874A_DR1 0x03 /* add. data LSB */
754 #define TDA9874A_DR2 0x04 /* add. data MSB */
755 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
756 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
757 #define TDA9874A_SIFLR 0x07 /* SIF level */
758 #define TDA9874A_TR2 252 /* test reg. 2 */
759 #define TDA9874A_TR1 253 /* test reg. 1 */
760 #define TDA9874A_DIC 254 /* device id. code */
761 #define TDA9874A_SIC 255 /* software id. code */
762
763
764 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
765 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
766 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
767 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
768 static int tda9874a_dic = -1; /* device id. code */
769
770 /* insmod options for tda9874a */
771 static unsigned int tda9874a_SIF = UNSET;
772 static unsigned int tda9874a_AMSEL = UNSET;
773 static unsigned int tda9874a_STD = UNSET;
774 module_param(tda9874a_SIF, int, 0444);
775 module_param(tda9874a_AMSEL, int, 0444);
776 module_param(tda9874a_STD, int, 0444);
777
778 /*
779 * initialization table for tda9874 decoder:
780 * - carrier 1 freq. registers (3 bytes)
781 * - carrier 2 freq. registers (3 bytes)
782 * - demudulator config register
783 * - FM de-emphasis register (slow identification mode)
784 * Note: frequency registers must be written in single i2c transfer.
785 */
786 static struct tda9874a_MODES {
787 char *name;
788 audiocmd cmd;
789 } tda9874a_modelist[9] = {
790 { "A2, B/G",
791 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
792 { "A2, M (Korea)",
793 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
794 { "A2, D/K (1)",
795 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
796 { "A2, D/K (2)",
797 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
798 { "A2, D/K (3)",
799 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
800 { "NICAM, I",
801 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
802 { "NICAM, B/G",
803 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
804 { "NICAM, D/K", /* default */
805 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
806 { "NICAM, L",
807 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
808 };
809
810 static int tda9874a_setup(struct CHIPSTATE *chip)
811 {
812 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
813 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
814 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
815 if(tda9874a_dic == 0x11) {
816 chip_write(chip, TDA9874A_FMMR, 0x80);
817 } else { /* dic == 0x07 */
818 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
819 chip_write(chip, TDA9874A_FMMR, 0x00);
820 }
821 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
822 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
823 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
824 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
825 /* Note: If signal quality is poor you may want to change NICAM */
826 /* error limit registers (NLELR and NUELR) to some greater values. */
827 /* Then the sound would remain stereo, but won't be so clear. */
828 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
829 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
830
831 if(tda9874a_dic == 0x11) {
832 chip_write(chip, TDA9874A_AMCONR, 0xf9);
833 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
834 chip_write(chip, TDA9874A_AOSR, 0x80);
835 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
836 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
837 } else { /* dic == 0x07 */
838 chip_write(chip, TDA9874A_AMCONR, 0xfb);
839 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
840 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
841 }
842 v4l_dbg(1, debug, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
843 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
844 return 1;
845 }
846
847 static int tda9874a_getmode(struct CHIPSTATE *chip)
848 {
849 int dsr,nsr,mode;
850 int necr; /* just for debugging */
851
852 mode = VIDEO_SOUND_MONO;
853
854 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
855 return mode;
856 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
857 return mode;
858 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
859 return mode;
860
861 /* need to store dsr/nsr somewhere */
862 chip->shadow.bytes[MAXREGS-2] = dsr;
863 chip->shadow.bytes[MAXREGS-1] = nsr;
864
865 if(tda9874a_mode) {
866 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
867 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
868 * that sound has (temporarily) switched from NICAM to
869 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
870 * error count. So in fact there is no stereo in this case :-(
871 * But changing the mode to VIDEO_SOUND_MONO would switch
872 * external 4052 multiplexer in audio_hook().
873 */
874 if(nsr & 0x02) /* NSR.S/MB=1 */
875 mode |= VIDEO_SOUND_STEREO;
876 if(nsr & 0x01) /* NSR.D/SB=1 */
877 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
878 } else {
879 if(dsr & 0x02) /* DSR.IDSTE=1 */
880 mode |= VIDEO_SOUND_STEREO;
881 if(dsr & 0x04) /* DSR.IDDUA=1 */
882 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
883 }
884
885 v4l_dbg(1, debug, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
886 dsr, nsr, necr, mode);
887 return mode;
888 }
889
890 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
891 {
892 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
893 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
894 if(tda9874a_mode) {
895 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
896 tda9874a_NCONR &= 0xfe; /* enable */
897 else
898 tda9874a_NCONR |= 0x01; /* disable */
899 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
900 }
901
902 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
903 * and has auto-select function for audio output (AOSR register).
904 * Old TDA9874H doesn't support these features.
905 * TDA9874A also has additional mono output pin (OUTM), which
906 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
907 */
908 if(tda9874a_dic == 0x11) {
909 int aosr = 0x80;
910 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
911
912 switch(mode) {
913 case VIDEO_SOUND_MONO:
914 case VIDEO_SOUND_STEREO:
915 break;
916 case VIDEO_SOUND_LANG1:
917 aosr = 0x80; /* auto-select, dual A/A */
918 mdacosr = (tda9874a_mode) ? 0x82:0x80;
919 break;
920 case VIDEO_SOUND_LANG2:
921 aosr = 0xa0; /* auto-select, dual B/B */
922 mdacosr = (tda9874a_mode) ? 0x83:0x81;
923 break;
924 default:
925 chip->mode = 0;
926 return;
927 }
928 chip_write(chip, TDA9874A_AOSR, aosr);
929 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
930
931 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
932 mode, aosr, mdacosr);
933
934 } else { /* dic == 0x07 */
935 int fmmr,aosr;
936
937 switch(mode) {
938 case VIDEO_SOUND_MONO:
939 fmmr = 0x00; /* mono */
940 aosr = 0x10; /* A/A */
941 break;
942 case VIDEO_SOUND_STEREO:
943 if(tda9874a_mode) {
944 fmmr = 0x00;
945 aosr = 0x00; /* handled by NICAM auto-mute */
946 } else {
947 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
948 aosr = 0x00;
949 }
950 break;
951 case VIDEO_SOUND_LANG1:
952 fmmr = 0x02; /* dual */
953 aosr = 0x10; /* dual A/A */
954 break;
955 case VIDEO_SOUND_LANG2:
956 fmmr = 0x02; /* dual */
957 aosr = 0x20; /* dual B/B */
958 break;
959 default:
960 chip->mode = 0;
961 return;
962 }
963 chip_write(chip, TDA9874A_FMMR, fmmr);
964 chip_write(chip, TDA9874A_AOSR, aosr);
965
966 v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
967 mode, fmmr, aosr);
968 }
969 }
970
971 static int tda9874a_checkit(struct CHIPSTATE *chip)
972 {
973 int dic,sic; /* device id. and software id. codes */
974
975 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
976 return 0;
977 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
978 return 0;
979
980 v4l_dbg(1, debug, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
981
982 if((dic == 0x11)||(dic == 0x07)) {
983 v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
984 tda9874a_dic = dic; /* remember device id. */
985 return 1;
986 }
987 return 0; /* not found */
988 }
989
990 static int tda9874a_initialize(struct CHIPSTATE *chip)
991 {
992 if (tda9874a_SIF > 2)
993 tda9874a_SIF = 1;
994 if (tda9874a_STD > 8)
995 tda9874a_STD = 0;
996 if(tda9874a_AMSEL > 1)
997 tda9874a_AMSEL = 0;
998
999 if(tda9874a_SIF == 1)
1000 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1001 else
1002 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1003
1004 tda9874a_ESP = tda9874a_STD;
1005 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1006
1007 if(tda9874a_AMSEL == 0)
1008 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1009 else
1010 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1011
1012 tda9874a_setup(chip);
1013 return 0;
1014 }
1015
1016
1017 /* ---------------------------------------------------------------------- */
1018 /* audio chip descriptions - defines+functions for tea6420 */
1019
1020 #define TEA6300_VL 0x00 /* volume left */
1021 #define TEA6300_VR 0x01 /* volume right */
1022 #define TEA6300_BA 0x02 /* bass */
1023 #define TEA6300_TR 0x03 /* treble */
1024 #define TEA6300_FA 0x04 /* fader control */
1025 #define TEA6300_S 0x05 /* switch register */
1026 /* values for those registers: */
1027 #define TEA6300_S_SA 0x01 /* stereo A input */
1028 #define TEA6300_S_SB 0x02 /* stereo B */
1029 #define TEA6300_S_SC 0x04 /* stereo C */
1030 #define TEA6300_S_GMU 0x80 /* general mute */
1031
1032 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1033 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1034 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1035 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1036 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1037 #define TEA6320_BA 0x05 /* bass (0-4) */
1038 #define TEA6320_TR 0x06 /* treble (0-4) */
1039 #define TEA6320_S 0x07 /* switch register */
1040 /* values for those registers: */
1041 #define TEA6320_S_SA 0x07 /* stereo A input */
1042 #define TEA6320_S_SB 0x06 /* stereo B */
1043 #define TEA6320_S_SC 0x05 /* stereo C */
1044 #define TEA6320_S_SD 0x04 /* stereo D */
1045 #define TEA6320_S_GMU 0x80 /* general mute */
1046
1047 #define TEA6420_S_SA 0x00 /* stereo A input */
1048 #define TEA6420_S_SB 0x01 /* stereo B */
1049 #define TEA6420_S_SC 0x02 /* stereo C */
1050 #define TEA6420_S_SD 0x03 /* stereo D */
1051 #define TEA6420_S_SE 0x04 /* stereo E */
1052 #define TEA6420_S_GMU 0x05 /* general mute */
1053
1054 static int tea6300_shift10(int val) { return val >> 10; }
1055 static int tea6300_shift12(int val) { return val >> 12; }
1056
1057 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1058 /* 0x0c mirror those immediately higher) */
1059 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1060 static int tea6320_shift11(int val) { return val >> 11; }
1061 static int tea6320_initialize(struct CHIPSTATE * chip)
1062 {
1063 chip_write(chip, TEA6320_FFR, 0x3f);
1064 chip_write(chip, TEA6320_FFL, 0x3f);
1065 chip_write(chip, TEA6320_FRR, 0x3f);
1066 chip_write(chip, TEA6320_FRL, 0x3f);
1067
1068 return 0;
1069 }
1070
1071
1072 /* ---------------------------------------------------------------------- */
1073 /* audio chip descriptions - defines+functions for tda8425 */
1074
1075 #define TDA8425_VL 0x00 /* volume left */
1076 #define TDA8425_VR 0x01 /* volume right */
1077 #define TDA8425_BA 0x02 /* bass */
1078 #define TDA8425_TR 0x03 /* treble */
1079 #define TDA8425_S1 0x08 /* switch functions */
1080 /* values for those registers: */
1081 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1082 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1083 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1084 #define TDA8425_S1_MU 0x20 /* mute bit */
1085 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1086 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1087 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1088 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1089 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1090 #define TDA8425_S1_ML 0x06 /* language selector */
1091 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1092 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1093 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1094 #define TDA8425_S1_IS 0x01 /* channel selector */
1095
1096
1097 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1098 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1099
1100 static int tda8425_initialize(struct CHIPSTATE *chip)
1101 {
1102 struct CHIPDESC *desc = chiplist + chip->type;
1103 int inputmap[8] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1104 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF,
1105 /* off */ TDA8425_S1_OFF, /* on */ TDA8425_S1_CH2};
1106
1107 if (chip->c.adapter->id == I2C_HW_B_RIVA) {
1108 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1109 }
1110 return 0;
1111 }
1112
1113 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1114 {
1115 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1116
1117 if (mode & VIDEO_SOUND_LANG1) {
1118 s1 |= TDA8425_S1_ML_SOUND_A;
1119 s1 |= TDA8425_S1_STEREO_PSEUDO;
1120
1121 } else if (mode & VIDEO_SOUND_LANG2) {
1122 s1 |= TDA8425_S1_ML_SOUND_B;
1123 s1 |= TDA8425_S1_STEREO_PSEUDO;
1124
1125 } else {
1126 s1 |= TDA8425_S1_ML_STEREO;
1127
1128 if (mode & VIDEO_SOUND_MONO)
1129 s1 |= TDA8425_S1_STEREO_MONO;
1130 if (mode & VIDEO_SOUND_STEREO)
1131 s1 |= TDA8425_S1_STEREO_SPATIAL;
1132 }
1133 chip_write(chip,TDA8425_S1,s1);
1134 }
1135
1136
1137 /* ---------------------------------------------------------------------- */
1138 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1139
1140 /* the registers of 16C54, I2C sub address. */
1141 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1142 #define PIC16C54_REG_MISC 0x02
1143
1144 /* bit definition of the RESET register, I2C data. */
1145 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1146 /* code of remote controller */
1147 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1148 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1149 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1150 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1151 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1152 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1153 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1154
1155 /* ---------------------------------------------------------------------- */
1156 /* audio chip descriptions - defines+functions for TA8874Z */
1157
1158 /* write 1st byte */
1159 #define TA8874Z_LED_STE 0x80
1160 #define TA8874Z_LED_BIL 0x40
1161 #define TA8874Z_LED_EXT 0x20
1162 #define TA8874Z_MONO_SET 0x10
1163 #define TA8874Z_MUTE 0x08
1164 #define TA8874Z_F_MONO 0x04
1165 #define TA8874Z_MODE_SUB 0x02
1166 #define TA8874Z_MODE_MAIN 0x01
1167
1168 /* write 2nd byte */
1169 /*#define TA8874Z_TI 0x80 */ /* test mode */
1170 #define TA8874Z_SEPARATION 0x3f
1171 #define TA8874Z_SEPARATION_DEFAULT 0x10
1172
1173 /* read */
1174 #define TA8874Z_B1 0x80
1175 #define TA8874Z_B0 0x40
1176 #define TA8874Z_CHAG_FLAG 0x20
1177
1178 /*
1179 * B1 B0
1180 * mono L H
1181 * stereo L L
1182 * BIL H L
1183 */
1184 static int ta8874z_getmode(struct CHIPSTATE *chip)
1185 {
1186 int val, mode;
1187
1188 val = chip_read(chip);
1189 mode = VIDEO_SOUND_MONO;
1190 if (val & TA8874Z_B1){
1191 mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
1192 }else if (!(val & TA8874Z_B0)){
1193 mode |= VIDEO_SOUND_STEREO;
1194 }
1195 /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1196 return mode;
1197 }
1198
1199 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1200 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1201 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1202 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1203
1204 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1205 {
1206 int update = 1;
1207 audiocmd *t = NULL;
1208 v4l_dbg(1, debug, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1209
1210 switch(mode){
1211 case VIDEO_SOUND_MONO:
1212 t = &ta8874z_mono;
1213 break;
1214 case VIDEO_SOUND_STEREO:
1215 t = &ta8874z_stereo;
1216 break;
1217 case VIDEO_SOUND_LANG1:
1218 t = &ta8874z_main;
1219 break;
1220 case VIDEO_SOUND_LANG2:
1221 t = &ta8874z_sub;
1222 break;
1223 default:
1224 update = 0;
1225 }
1226
1227 if(update)
1228 chip_cmd(chip, "TA8874Z", t);
1229 }
1230
1231 static int ta8874z_checkit(struct CHIPSTATE *chip)
1232 {
1233 int rc;
1234 rc = chip_read(chip);
1235 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1236 }
1237
1238 /* ---------------------------------------------------------------------- */
1239 /* audio chip descriptions - struct CHIPDESC */
1240
1241 /* insmod options to enable/disable individual audio chips */
1242 static int tda8425 = 1;
1243 static int tda9840 = 1;
1244 static int tda9850 = 1;
1245 static int tda9855 = 1;
1246 static int tda9873 = 1;
1247 static int tda9874a = 1;
1248 static int tea6300 = 0; /* address clash with msp34xx */
1249 static int tea6320 = 0; /* address clash with msp34xx */
1250 static int tea6420 = 1;
1251 static int pic16c54 = 1;
1252 static int ta8874z = 0; /* address clash with tda9840 */
1253
1254 module_param(tda8425, int, 0444);
1255 module_param(tda9840, int, 0444);
1256 module_param(tda9850, int, 0444);
1257 module_param(tda9855, int, 0444);
1258 module_param(tda9873, int, 0444);
1259 module_param(tda9874a, int, 0444);
1260 module_param(tea6300, int, 0444);
1261 module_param(tea6320, int, 0444);
1262 module_param(tea6420, int, 0444);
1263 module_param(pic16c54, int, 0444);
1264 module_param(ta8874z, int, 0444);
1265
1266 static struct CHIPDESC chiplist[] = {
1267 {
1268 .name = "tda9840",
1269 .id = I2C_DRIVERID_TDA9840,
1270 .insmodopt = &tda9840,
1271 .addr_lo = I2C_TDA9840 >> 1,
1272 .addr_hi = I2C_TDA9840 >> 1,
1273 .registers = 5,
1274
1275 .checkit = tda9840_checkit,
1276 .getmode = tda9840_getmode,
1277 .setmode = tda9840_setmode,
1278 .checkmode = generic_checkmode,
1279
1280 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1281 /* ,TDA9840_SW, TDA9840_MONO */} }
1282 },
1283 {
1284 .name = "tda9873h",
1285 .id = I2C_DRIVERID_TDA9873,
1286 .checkit = tda9873_checkit,
1287 .insmodopt = &tda9873,
1288 .addr_lo = I2C_TDA985x_L >> 1,
1289 .addr_hi = I2C_TDA985x_H >> 1,
1290 .registers = 3,
1291 .flags = CHIP_HAS_INPUTSEL,
1292
1293 .getmode = tda9873_getmode,
1294 .setmode = tda9873_setmode,
1295 .checkmode = generic_checkmode,
1296
1297 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1298 .inputreg = TDA9873_SW,
1299 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1300 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0, 0xc0},
1301 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1302
1303 },
1304 {
1305 .name = "tda9874h/a",
1306 .id = I2C_DRIVERID_TDA9874,
1307 .checkit = tda9874a_checkit,
1308 .initialize = tda9874a_initialize,
1309 .insmodopt = &tda9874a,
1310 .addr_lo = I2C_TDA9874 >> 1,
1311 .addr_hi = I2C_TDA9874 >> 1,
1312
1313 .getmode = tda9874a_getmode,
1314 .setmode = tda9874a_setmode,
1315 .checkmode = generic_checkmode,
1316 },
1317 {
1318 .name = "tda9850",
1319 .id = I2C_DRIVERID_TDA9850,
1320 .insmodopt = &tda9850,
1321 .addr_lo = I2C_TDA985x_L >> 1,
1322 .addr_hi = I2C_TDA985x_H >> 1,
1323 .registers = 11,
1324
1325 .getmode = tda985x_getmode,
1326 .setmode = tda985x_setmode,
1327
1328 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1329 },
1330 {
1331 .name = "tda9855",
1332 .id = I2C_DRIVERID_TDA9855,
1333 .insmodopt = &tda9855,
1334 .addr_lo = I2C_TDA985x_L >> 1,
1335 .addr_hi = I2C_TDA985x_H >> 1,
1336 .registers = 11,
1337 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1338
1339 .leftreg = TDA9855_VL,
1340 .rightreg = TDA9855_VR,
1341 .bassreg = TDA9855_BA,
1342 .treblereg = TDA9855_TR,
1343 .volfunc = tda9855_volume,
1344 .bassfunc = tda9855_bass,
1345 .treblefunc = tda9855_treble,
1346
1347 .getmode = tda985x_getmode,
1348 .setmode = tda985x_setmode,
1349
1350 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1351 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1352 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1353 0x07, 0x10, 0x10, 0x03 }}
1354 },
1355 {
1356 .name = "tea6300",
1357 .id = I2C_DRIVERID_TEA6300,
1358 .insmodopt = &tea6300,
1359 .addr_lo = I2C_TEA6300 >> 1,
1360 .addr_hi = I2C_TEA6300 >> 1,
1361 .registers = 6,
1362 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1363
1364 .leftreg = TEA6300_VR,
1365 .rightreg = TEA6300_VL,
1366 .bassreg = TEA6300_BA,
1367 .treblereg = TEA6300_TR,
1368 .volfunc = tea6300_shift10,
1369 .bassfunc = tea6300_shift12,
1370 .treblefunc = tea6300_shift12,
1371
1372 .inputreg = TEA6300_S,
1373 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1374 .inputmute = TEA6300_S_GMU,
1375 },
1376 {
1377 .name = "tea6320",
1378 .id = I2C_DRIVERID_TEA6300,
1379 .initialize = tea6320_initialize,
1380 .insmodopt = &tea6320,
1381 .addr_lo = I2C_TEA6300 >> 1,
1382 .addr_hi = I2C_TEA6300 >> 1,
1383 .registers = 8,
1384 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1385
1386 .leftreg = TEA6320_V,
1387 .rightreg = TEA6320_V,
1388 .bassreg = TEA6320_BA,
1389 .treblereg = TEA6320_TR,
1390 .volfunc = tea6320_volume,
1391 .bassfunc = tea6320_shift11,
1392 .treblefunc = tea6320_shift11,
1393
1394 .inputreg = TEA6320_S,
1395 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1396 .inputmute = TEA6300_S_GMU,
1397 },
1398 {
1399 .name = "tea6420",
1400 .id = I2C_DRIVERID_TEA6420,
1401 .insmodopt = &tea6420,
1402 .addr_lo = I2C_TEA6420 >> 1,
1403 .addr_hi = I2C_TEA6420 >> 1,
1404 .registers = 1,
1405 .flags = CHIP_HAS_INPUTSEL,
1406
1407 .inputreg = -1,
1408 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1409 .inputmute = TEA6300_S_GMU,
1410 },
1411 {
1412 .name = "tda8425",
1413 .id = I2C_DRIVERID_TDA8425,
1414 .insmodopt = &tda8425,
1415 .addr_lo = I2C_TDA8425 >> 1,
1416 .addr_hi = I2C_TDA8425 >> 1,
1417 .registers = 9,
1418 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1419
1420 .leftreg = TDA8425_VL,
1421 .rightreg = TDA8425_VR,
1422 .bassreg = TDA8425_BA,
1423 .treblereg = TDA8425_TR,
1424 .volfunc = tda8425_shift10,
1425 .bassfunc = tda8425_shift12,
1426 .treblefunc = tda8425_shift12,
1427
1428 .inputreg = TDA8425_S1,
1429 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1430 .inputmute = TDA8425_S1_OFF,
1431
1432 .setmode = tda8425_setmode,
1433 .initialize = tda8425_initialize,
1434 },
1435 {
1436 .name = "pic16c54 (PV951)",
1437 .id = I2C_DRIVERID_PIC16C54_PV9,
1438 .insmodopt = &pic16c54,
1439 .addr_lo = I2C_PIC16C54 >> 1,
1440 .addr_hi = I2C_PIC16C54>> 1,
1441 .registers = 2,
1442 .flags = CHIP_HAS_INPUTSEL,
1443
1444 .inputreg = PIC16C54_REG_MISC,
1445 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1446 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1447 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1448 PIC16C54_MISC_SND_MUTE,PIC16C54_MISC_SND_MUTE,
1449 PIC16C54_MISC_SND_NOTMUTE},
1450 .inputmute = PIC16C54_MISC_SND_MUTE,
1451 },
1452 {
1453 .name = "ta8874z",
1454 .id = -1,
1455 /*.id = I2C_DRIVERID_TA8874Z, */
1456 .checkit = ta8874z_checkit,
1457 .insmodopt = &ta8874z,
1458 .addr_lo = I2C_TDA9840 >> 1,
1459 .addr_hi = I2C_TDA9840 >> 1,
1460 .registers = 2,
1461
1462 .getmode = ta8874z_getmode,
1463 .setmode = ta8874z_setmode,
1464 .checkmode = generic_checkmode,
1465
1466 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1467 },
1468 { .name = NULL } /* EOF */
1469 };
1470
1471
1472 /* ---------------------------------------------------------------------- */
1473 /* i2c registration */
1474
1475 static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
1476 {
1477 struct CHIPSTATE *chip;
1478 struct CHIPDESC *desc;
1479
1480 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1481 if (!chip)
1482 return -ENOMEM;
1483 memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
1484 chip->c.adapter = adap;
1485 chip->c.addr = addr;
1486 i2c_set_clientdata(&chip->c, chip);
1487
1488 /* find description for the chip */
1489 v4l_dbg(1, debug, &chip->c, "chip found @ 0x%x\n", addr<<1);
1490 for (desc = chiplist; desc->name != NULL; desc++) {
1491 if (0 == *(desc->insmodopt))
1492 continue;
1493 if (addr < desc->addr_lo ||
1494 addr > desc->addr_hi)
1495 continue;
1496 if (desc->checkit && !desc->checkit(chip))
1497 continue;
1498 break;
1499 }
1500 if (desc->name == NULL) {
1501 v4l_dbg(1, debug, &chip->c, "no matching chip description found\n");
1502 return -EIO;
1503 }
1504 v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
1505 if (desc->flags) {
1506 v4l_dbg(1, debug, &chip->c, "matches:%s%s%s.\n",
1507 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1508 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1509 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1510 }
1511
1512 /* fill required data structures */
1513 strcpy(chip->c.name, desc->name);
1514 chip->type = desc-chiplist;
1515 chip->shadow.count = desc->registers+1;
1516 chip->prevmode = -1;
1517 /* register */
1518 i2c_attach_client(&chip->c);
1519
1520 /* initialization */
1521 if (desc->initialize != NULL)
1522 desc->initialize(chip);
1523 else
1524 chip_cmd(chip,"init",&desc->init);
1525
1526 if (desc->flags & CHIP_HAS_VOLUME) {
1527 chip->left = desc->leftinit ? desc->leftinit : 65535;
1528 chip->right = desc->rightinit ? desc->rightinit : 65535;
1529 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1530 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1531 }
1532 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1533 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1534 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1535 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1536 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1537 }
1538
1539 chip->tpid = -1;
1540 if (desc->checkmode) {
1541 /* start async thread */
1542 init_timer(&chip->wt);
1543 chip->wt.function = chip_thread_wake;
1544 chip->wt.data = (unsigned long)chip;
1545 init_waitqueue_head(&chip->wq);
1546 init_completion(&chip->texit);
1547 chip->tpid = kernel_thread(chip_thread,(void *)chip,0);
1548 if (chip->tpid < 0)
1549 v4l_warn(&chip->c, "%s: kernel_thread() failed\n",
1550 chip->c.name);
1551 wake_up_interruptible(&chip->wq);
1552 }
1553 return 0;
1554 }
1555
1556 static int chip_probe(struct i2c_adapter *adap)
1557 {
1558 /* don't attach on saa7146 based cards,
1559 because dedicated drivers are used */
1560 if ((adap->id == I2C_HW_SAA7146))
1561 return 0;
1562 if (adap->class & I2C_CLASS_TV_ANALOG)
1563 return i2c_probe(adap, &addr_data, chip_attach);
1564 return 0;
1565 }
1566
1567 static int chip_detach(struct i2c_client *client)
1568 {
1569 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1570
1571 del_timer_sync(&chip->wt);
1572 if (chip->tpid >= 0) {
1573 /* shutdown async thread */
1574 chip->done = 1;
1575 wake_up_interruptible(&chip->wq);
1576 wait_for_completion(&chip->texit);
1577 }
1578
1579 i2c_detach_client(&chip->c);
1580 kfree(chip);
1581 return 0;
1582 }
1583
1584 /* ---------------------------------------------------------------------- */
1585 /* video4linux interface */
1586
1587 static int chip_command(struct i2c_client *client,
1588 unsigned int cmd, void *arg)
1589 {
1590 __u16 *sarg = arg;
1591 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1592 struct CHIPDESC *desc = chiplist + chip->type;
1593
1594 v4l_dbg(1, debug, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
1595
1596 switch (cmd) {
1597 case AUDC_SET_INPUT:
1598 if (desc->flags & CHIP_HAS_INPUTSEL) {
1599 if (*sarg & 0x80)
1600 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1601 else
1602 chip_write_masked(chip,desc->inputreg,desc->inputmap[*sarg],desc->inputmask);
1603 }
1604 break;
1605
1606 case AUDC_SET_RADIO:
1607 chip->radio = 1;
1608 chip->watch_stereo = 0;
1609 /* del_timer(&chip->wt); */
1610 break;
1611
1612 /* --- v4l ioctls --- */
1613 /* take care: bttv does userspace copying, we'll get a
1614 kernel pointer here... */
1615 case VIDIOCGAUDIO:
1616 {
1617 struct video_audio *va = arg;
1618
1619 if (desc->flags & CHIP_HAS_VOLUME) {
1620 va->flags |= VIDEO_AUDIO_VOLUME;
1621 va->volume = max(chip->left,chip->right);
1622 if (va->volume)
1623 va->balance = (32768*min(chip->left,chip->right))/
1624 va->volume;
1625 else
1626 va->balance = 32768;
1627 }
1628 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1629 va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
1630 va->bass = chip->bass;
1631 va->treble = chip->treble;
1632 }
1633 if (!chip->radio) {
1634 if (desc->getmode)
1635 va->mode = desc->getmode(chip);
1636 else
1637 va->mode = VIDEO_SOUND_MONO;
1638 }
1639 break;
1640 }
1641
1642 case VIDIOCSAUDIO:
1643 {
1644 struct video_audio *va = arg;
1645
1646 if (desc->flags & CHIP_HAS_VOLUME) {
1647 chip->left = (min(65536 - va->balance,32768) *
1648 va->volume) / 32768;
1649 chip->right = (min(va->balance,(__u16)32768) *
1650 va->volume) / 32768;
1651 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1652 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1653 }
1654 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1655 chip->bass = va->bass;
1656 chip->treble = va->treble;
1657 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1658 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1659 }
1660 if (desc->setmode && va->mode) {
1661 chip->watch_stereo = 0;
1662 /* del_timer(&chip->wt); */
1663 chip->mode = va->mode;
1664 desc->setmode(chip,va->mode);
1665 }
1666 break;
1667 }
1668
1669 case VIDIOC_S_TUNER:
1670 {
1671 struct v4l2_tuner *vt = arg;
1672 int mode = 0;
1673
1674 switch (vt->audmode) {
1675 case V4L2_TUNER_MODE_MONO:
1676 mode = VIDEO_SOUND_MONO;
1677 break;
1678 case V4L2_TUNER_MODE_STEREO:
1679 mode = VIDEO_SOUND_STEREO;
1680 break;
1681 case V4L2_TUNER_MODE_LANG1:
1682 mode = VIDEO_SOUND_LANG1;
1683 break;
1684 case V4L2_TUNER_MODE_LANG2:
1685 mode = VIDEO_SOUND_LANG2;
1686 break;
1687 default:
1688 break;
1689 }
1690
1691 if (desc->setmode && mode) {
1692 chip->watch_stereo = 0;
1693 /* del_timer(&chip->wt); */
1694 chip->mode = mode;
1695 desc->setmode(chip, mode);
1696 }
1697 break;
1698 }
1699
1700 case VIDIOC_G_TUNER:
1701 {
1702 struct v4l2_tuner *vt = arg;
1703 int mode = VIDEO_SOUND_MONO;
1704
1705 if (chip->radio)
1706 break;
1707 vt->audmode = 0;
1708 vt->rxsubchans = 0;
1709 vt->capability = V4L2_TUNER_CAP_STEREO |
1710 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1711
1712 if (desc->getmode)
1713 mode = desc->getmode(chip);
1714
1715 if (mode & VIDEO_SOUND_MONO)
1716 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1717 if (mode & VIDEO_SOUND_STEREO)
1718 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1719 if (mode & VIDEO_SOUND_LANG1)
1720 vt->rxsubchans |= V4L2_TUNER_SUB_LANG1 |
1721 V4L2_TUNER_SUB_LANG2;
1722
1723 mode = chip->mode;
1724 if (mode & VIDEO_SOUND_MONO)
1725 vt->audmode = V4L2_TUNER_MODE_MONO;
1726 if (mode & VIDEO_SOUND_STEREO)
1727 vt->audmode = V4L2_TUNER_MODE_STEREO;
1728 if (mode & VIDEO_SOUND_LANG1)
1729 vt->audmode = V4L2_TUNER_MODE_LANG1;
1730 if (mode & VIDEO_SOUND_LANG2)
1731 vt->audmode = V4L2_TUNER_MODE_LANG2;
1732 break;
1733 }
1734
1735 case VIDIOCSCHAN:
1736 case VIDIOC_S_STD:
1737 chip->radio = 0;
1738 break;
1739
1740 case VIDIOCSFREQ:
1741 case VIDIOC_S_FREQUENCY:
1742 chip->mode = 0; /* automatic */
1743 if (desc->checkmode) {
1744 desc->setmode(chip,VIDEO_SOUND_MONO);
1745 if (chip->prevmode != VIDEO_SOUND_MONO)
1746 chip->prevmode = -1; /* reset previous mode */
1747 mod_timer(&chip->wt, jiffies+2*HZ);
1748 /* the thread will call checkmode() later */
1749 }
1750 break;
1751 }
1752 return 0;
1753 }
1754
1755 static struct i2c_driver driver = {
1756 .driver = {
1757 .name = "tvaudio",
1758 },
1759 .id = I2C_DRIVERID_TVAUDIO,
1760 .attach_adapter = chip_probe,
1761 .detach_client = chip_detach,
1762 .command = chip_command,
1763 };
1764
1765 static struct i2c_client client_template =
1766 {
1767 .name = "(unset)",
1768 .driver = &driver,
1769 };
1770
1771 static int __init audiochip_init_module(void)
1772 {
1773 struct CHIPDESC *desc;
1774
1775 if (debug) {
1776 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1777 printk(KERN_INFO "tvaudio: known chips: ");
1778 for (desc = chiplist; desc->name != NULL; desc++)
1779 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1780 printk("\n");
1781 }
1782
1783 return i2c_add_driver(&driver);
1784 }
1785
1786 static void __exit audiochip_cleanup_module(void)
1787 {
1788 i2c_del_driver(&driver);
1789 }
1790
1791 module_init(audiochip_init_module);
1792 module_exit(audiochip_cleanup_module);
1793
1794 /*
1795 * Local variables:
1796 * c-basic-offset: 8
1797 * End:
1798 */
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