drivers/net/fs_enet/mac-fcc.c

   1 /*
   2  * FCC driver for Motorola MPC82xx (PQ2).
   3  *
   4  * Copyright (c) 2003 Intracom S.A.
   5  *  by Pantelis Antoniou <panto@intracom.gr>
   6  *
   7  * 2005 (c) MontaVista Software, Inc.
   8  * Vitaly Bordug <vbordug@ru.mvista.com>
   9  *
  10  * This file is licensed under the terms of the GNU General Public License
  11  * version 2. This program is licensed "as is" without any warranty of any
  12  * kind, whether express or implied.
  13  */
  14
  15 #include <linux/config.h>
  16 #include <linux/module.h>
  17 #include <linux/kernel.h>
  18 #include <linux/types.h>
  19 #include <linux/sched.h>
  20 #include <linux/string.h>
  21 #include <linux/ptrace.h>
  22 #include <linux/errno.h>
  23 #include <linux/ioport.h>
  24 #include <linux/slab.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/pci.h>
  27 #include <linux/init.h>
  28 #include <linux/delay.h>
  29 #include <linux/netdevice.h>
  30 #include <linux/etherdevice.h>
  31 #include <linux/skbuff.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/mii.h>
  34 #include <linux/ethtool.h>
  35 #include <linux/bitops.h>
  36 #include <linux/fs.h>
  37 #include <linux/platform_device.h>
  38
  39 #include <asm/immap_cpm2.h>
  40 #include <asm/mpc8260.h>
  41 #include <asm/cpm2.h>
  42
  43 #include <asm/pgtable.h>
  44 #include <asm/irq.h>
  45 #include <asm/uaccess.h>
  46
  47 #include "fs_enet.h"
  48
  49 /*************************************************/
  50
  51 /* FCC access macros */
  52
  53 #define __fcc_out32(addr, x)    out_be32((unsigned *)addr, x)
  54 #define __fcc_out16(addr, x)    out_be16((unsigned short *)addr, x)
  55 #define __fcc_out8(addr, x)     out_8((unsigned char *)addr, x)
  56 #define __fcc_in32(addr)        in_be32((unsigned *)addr)
  57 #define __fcc_in16(addr)        in_be16((unsigned short *)addr)
  58 #define __fcc_in8(addr)         in_8((unsigned char *)addr)
  59
  60 /* parameter space */
  61
  62 /* write, read, set bits, clear bits */
  63 #define W32(_p, _m, _v) __fcc_out32(&(_p)->_m, (_v))
  64 #define R32(_p, _m)     __fcc_in32(&(_p)->_m)
  65 #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  66 #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  67
  68 #define W16(_p, _m, _v) __fcc_out16(&(_p)->_m, (_v))
  69 #define R16(_p, _m)     __fcc_in16(&(_p)->_m)
  70 #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  71 #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  72
  73 #define W8(_p, _m, _v)  __fcc_out8(&(_p)->_m, (_v))
  74 #define R8(_p, _m)      __fcc_in8(&(_p)->_m)
  75 #define S8(_p, _m, _v)  W8(_p, _m, R8(_p, _m) | (_v))
  76 #define C8(_p, _m, _v)  W8(_p, _m, R8(_p, _m) & ~(_v))
  77
  78 /*************************************************/
  79
  80 #define FCC_MAX_MULTICAST_ADDRS 64
  81
  82 #define mk_mii_read(REG)        (0x60020000 | ((REG & 0x1f) << 18))
  83 #define mk_mii_write(REG, VAL)  (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
  84 #define mk_mii_end              0
  85
  86 #define MAX_CR_CMD_LOOPS        10000
  87
  88 static inline int fcc_cr_cmd(struct fs_enet_private *fep, u32 mcn, u32 op)
  89 {
  90         const struct fs_platform_info *fpi = fep->fpi;
  91
  92         cpm2_map_t *immap = fs_enet_immap;
  93         cpm_cpm2_t *cpmp = &immap->im_cpm;
  94         u32 v;
  95         int i;
  96
  97         /* Currently I don't know what feature call will look like. But
  98            I guess there'd be something like do_cpm_cmd() which will require page & sblock */
  99         v = mk_cr_cmd(fpi->cp_page, fpi->cp_block, mcn, op);
 100         W32(cpmp, cp_cpcr, v | CPM_CR_FLG);
 101         for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
 102                 if ((R32(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
 103                         break;
 104
 105         if (i >= MAX_CR_CMD_LOOPS) {
 106                 printk(KERN_ERR "%s(): Not able to issue CPM command\n",
 107                        __FUNCTION__);
 108                 return 1;
 109         }
 110
 111         return 0;
 112 }
 113
 114 static int do_pd_setup(struct fs_enet_private *fep)
 115 {
 116         struct platform_device *pdev = to_platform_device(fep->dev);
 117         struct resource *r;
 118
 119         /* Fill out IRQ field */
 120         fep->interrupt = platform_get_irq(pdev, 0);
 121         if (fep->interrupt < 0)
 122                 return -EINVAL;
 123
 124         /* Attach the memory for the FCC Parameter RAM */
 125         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_pram");
 126         fep->fcc.ep = (void *)r->start;
 127
 128         if (fep->fcc.ep == NULL)
 129                 return -EINVAL;
 130
 131         r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "fcc_regs");
 132         fep->fcc.fccp = (void *)r->start;
 133
 134         if (fep->fcc.fccp == NULL)
 135                 return -EINVAL;
 136
 137         fep->fcc.fcccp = (void *)fep->fpi->fcc_regs_c;
 138
 139         if (fep->fcc.fcccp == NULL)
 140                 return -EINVAL;
 141
 142         return 0;
 143 }
 144
 145 #define FCC_NAPI_RX_EVENT_MSK   (FCC_ENET_RXF | FCC_ENET_RXB)
 146 #define FCC_RX_EVENT            (FCC_ENET_RXF)
 147 #define FCC_TX_EVENT            (FCC_ENET_TXB)
 148 #define FCC_ERR_EVENT_MSK       (FCC_ENET_TXE | FCC_ENET_BSY)
 149
 150 static int setup_data(struct net_device *dev)
 151 {
 152         struct fs_enet_private *fep = netdev_priv(dev);
 153         const struct fs_platform_info *fpi = fep->fpi;
 154
 155         fep->fcc.idx = fs_get_fcc_index(fpi->fs_no);
 156         if ((unsigned int)fep->fcc.idx >= 3)    /* max 3 FCCs */
 157                 return -EINVAL;
 158
 159         fep->fcc.mem = (void *)fpi->mem_offset;
 160
 161         if (do_pd_setup(fep) != 0)
 162                 return -EINVAL;
 163
 164         fep->ev_napi_rx = FCC_NAPI_RX_EVENT_MSK;
 165         fep->ev_rx = FCC_RX_EVENT;
 166         fep->ev_tx = FCC_TX_EVENT;
 167         fep->ev_err = FCC_ERR_EVENT_MSK;
 168
 169         return 0;
 170 }
 171
 172 static int allocate_bd(struct net_device *dev)
 173 {
 174         struct fs_enet_private *fep = netdev_priv(dev);
 175         const struct fs_platform_info *fpi = fep->fpi;
 176
 177         fep->ring_base = dma_alloc_coherent(fep->dev,
 178                                             (fpi->tx_ring + fpi->rx_ring) *
 179                                             sizeof(cbd_t), &fep->ring_mem_addr,
 180                                             GFP_KERNEL);
 181         if (fep->ring_base == NULL)
 182                 return -ENOMEM;
 183
 184         return 0;
 185 }
 186
 187 static void free_bd(struct net_device *dev)
 188 {
 189         struct fs_enet_private *fep = netdev_priv(dev);
 190         const struct fs_platform_info *fpi = fep->fpi;
 191
 192         if (fep->ring_base)
 193                 dma_free_coherent(fep->dev,
 194                         (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
 195                         fep->ring_base, fep->ring_mem_addr);
 196 }
 197
 198 static void cleanup_data(struct net_device *dev)
 199 {
 200         /* nothing */
 201 }
 202
 203 static void set_promiscuous_mode(struct net_device *dev)
 204 {
 205         struct fs_enet_private *fep = netdev_priv(dev);
 206         fcc_t *fccp = fep->fcc.fccp;
 207
 208         S32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
 209 }
 210
 211 static void set_multicast_start(struct net_device *dev)
 212 {
 213         struct fs_enet_private *fep = netdev_priv(dev);
 214         fcc_enet_t *ep = fep->fcc.ep;
 215
 216         W32(ep, fen_gaddrh, 0);
 217         W32(ep, fen_gaddrl, 0);
 218 }
 219
 220 static void set_multicast_one(struct net_device *dev, const u8 *mac)
 221 {
 222         struct fs_enet_private *fep = netdev_priv(dev);
 223         fcc_enet_t *ep = fep->fcc.ep;
 224         u16 taddrh, taddrm, taddrl;
 225
 226         taddrh = ((u16)mac[5] << 8) | mac[4];
 227         taddrm = ((u16)mac[3] << 8) | mac[2];
 228         taddrl = ((u16)mac[1] << 8) | mac[0];
 229
 230         W16(ep, fen_taddrh, taddrh);
 231         W16(ep, fen_taddrm, taddrm);
 232         W16(ep, fen_taddrl, taddrl);
 233         fcc_cr_cmd(fep, 0x0C, CPM_CR_SET_GADDR);
 234 }
 235
 236 static void set_multicast_finish(struct net_device *dev)
 237 {
 238         struct fs_enet_private *fep = netdev_priv(dev);
 239         fcc_t *fccp = fep->fcc.fccp;
 240         fcc_enet_t *ep = fep->fcc.ep;
 241
 242         /* clear promiscuous always */
 243         C32(fccp, fcc_fpsmr, FCC_PSMR_PRO);
 244
 245         /* if all multi or too many multicasts; just enable all */
 246         if ((dev->flags & IFF_ALLMULTI) != 0 ||
 247             dev->mc_count > FCC_MAX_MULTICAST_ADDRS) {
 248
 249                 W32(ep, fen_gaddrh, 0xffffffff);
 250                 W32(ep, fen_gaddrl, 0xffffffff);
 251         }
 252
 253         /* read back */
 254         fep->fcc.gaddrh = R32(ep, fen_gaddrh);
 255         fep->fcc.gaddrl = R32(ep, fen_gaddrl);
 256 }
 257
 258 static void set_multicast_list(struct net_device *dev)
 259 {
 260         struct dev_mc_list *pmc;
 261
 262         if ((dev->flags & IFF_PROMISC) == 0) {
 263                 set_multicast_start(dev);
 264                 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
 265                         set_multicast_one(dev, pmc->dmi_addr);
 266                 set_multicast_finish(dev);
 267         } else
 268                 set_promiscuous_mode(dev);
 269 }
 270
 271 static void restart(struct net_device *dev)
 272 {
 273         struct fs_enet_private *fep = netdev_priv(dev);
 274         const struct fs_platform_info *fpi = fep->fpi;
 275         fcc_t *fccp = fep->fcc.fccp;
 276         fcc_c_t *fcccp = fep->fcc.fcccp;
 277         fcc_enet_t *ep = fep->fcc.ep;
 278         dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
 279         u16 paddrh, paddrm, paddrl;
 280         u16 mem_addr;
 281         const unsigned char *mac;
 282         int i;
 283
 284         C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
 285
 286         /* clear everything (slow & steady does it) */
 287         for (i = 0; i < sizeof(*ep); i++)
 288                 __fcc_out8((char *)ep + i, 0);
 289
 290         /* get physical address */
 291         rx_bd_base_phys = fep->ring_mem_addr;
 292         tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
 293
 294         /* point to bds */
 295         W32(ep, fen_genfcc.fcc_rbase, rx_bd_base_phys);
 296         W32(ep, fen_genfcc.fcc_tbase, tx_bd_base_phys);
 297
 298         /* Set maximum bytes per receive buffer.
 299          * It must be a multiple of 32.
 300          */
 301         W16(ep, fen_genfcc.fcc_mrblr, PKT_MAXBLR_SIZE);
 302
 303         W32(ep, fen_genfcc.fcc_rstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
 304         W32(ep, fen_genfcc.fcc_tstate, (CPMFCR_GBL | CPMFCR_EB) << 24);
 305
 306         /* Allocate space in the reserved FCC area of DPRAM for the
 307          * internal buffers.  No one uses this space (yet), so we
 308          * can do this.  Later, we will add resource management for
 309          * this area.
 310          */
 311
 312         mem_addr = (u32) fep->fcc.mem;  /* de-fixup dpram offset */
 313
 314         W16(ep, fen_genfcc.fcc_riptr, (mem_addr & 0xffff));
 315         W16(ep, fen_genfcc.fcc_tiptr, ((mem_addr + 32) & 0xffff));
 316         W16(ep, fen_padptr, mem_addr + 64);
 317
 318         /* fill with special symbol...  */
 319         memset(fep->fcc.mem + fpi->dpram_offset + 64, 0x88, 32);
 320
 321         W32(ep, fen_genfcc.fcc_rbptr, 0);
 322         W32(ep, fen_genfcc.fcc_tbptr, 0);
 323         W32(ep, fen_genfcc.fcc_rcrc, 0);
 324         W32(ep, fen_genfcc.fcc_tcrc, 0);
 325         W16(ep, fen_genfcc.fcc_res1, 0);
 326         W32(ep, fen_genfcc.fcc_res2, 0);
 327
 328         /* no CAM */
 329         W32(ep, fen_camptr, 0);
 330
 331         /* Set CRC preset and mask */
 332         W32(ep, fen_cmask, 0xdebb20e3);
 333         W32(ep, fen_cpres, 0xffffffff);
 334
 335         W32(ep, fen_crcec, 0);          /* CRC Error counter       */
 336         W32(ep, fen_alec, 0);           /* alignment error counter */
 337         W32(ep, fen_disfc, 0);          /* discard frame counter   */
 338         W16(ep, fen_retlim, 15);        /* Retry limit threshold   */
 339         W16(ep, fen_pper, 0);           /* Normal persistence      */
 340
 341         /* set group address */
 342         W32(ep, fen_gaddrh, fep->fcc.gaddrh);
 343         W32(ep, fen_gaddrl, fep->fcc.gaddrh);
 344
 345         /* Clear hash filter tables */
 346         W32(ep, fen_iaddrh, 0);
 347         W32(ep, fen_iaddrl, 0);
 348
 349         /* Clear the Out-of-sequence TxBD  */
 350         W16(ep, fen_tfcstat, 0);
 351         W16(ep, fen_tfclen, 0);
 352         W32(ep, fen_tfcptr, 0);
 353
 354         W16(ep, fen_mflr, PKT_MAXBUF_SIZE);     /* maximum frame length register */
 355         W16(ep, fen_minflr, PKT_MINBUF_SIZE);   /* minimum frame length register */
 356
 357         /* set address */
 358         mac = dev->dev_addr;
 359         paddrh = ((u16)mac[5] << 8) | mac[4];
 360         paddrm = ((u16)mac[3] << 8) | mac[2];
 361         paddrl = ((u16)mac[1] << 8) | mac[0];
 362
 363         W16(ep, fen_paddrh, paddrh);
 364         W16(ep, fen_paddrm, paddrm);
 365         W16(ep, fen_paddrl, paddrl);
 366
 367         W16(ep, fen_taddrh, 0);
 368         W16(ep, fen_taddrm, 0);
 369         W16(ep, fen_taddrl, 0);
 370
 371         W16(ep, fen_maxd1, 1520);       /* maximum DMA1 length */
 372         W16(ep, fen_maxd2, 1520);       /* maximum DMA2 length */
 373
 374         /* Clear stat counters, in case we ever enable RMON */
 375         W32(ep, fen_octc, 0);
 376         W32(ep, fen_colc, 0);
 377         W32(ep, fen_broc, 0);
 378         W32(ep, fen_mulc, 0);
 379         W32(ep, fen_uspc, 0);
 380         W32(ep, fen_frgc, 0);
 381         W32(ep, fen_ospc, 0);
 382         W32(ep, fen_jbrc, 0);
 383         W32(ep, fen_p64c, 0);
 384         W32(ep, fen_p65c, 0);
 385         W32(ep, fen_p128c, 0);
 386         W32(ep, fen_p256c, 0);
 387         W32(ep, fen_p512c, 0);
 388         W32(ep, fen_p1024c, 0);
 389
 390         W16(ep, fen_rfthr, 0);  /* Suggested by manual */
 391         W16(ep, fen_rfcnt, 0);
 392         W16(ep, fen_cftype, 0);
 393
 394         fs_init_bds(dev);
 395
 396         /* adjust to speed (for RMII mode) */
 397         if (fpi->use_rmii) {
 398                 if (fep->speed == 100)
 399                         C8(fcccp, fcc_gfemr, 0x20);
 400                 else
 401                         S8(fcccp, fcc_gfemr, 0x20);
 402         }
 403
 404         fcc_cr_cmd(fep, 0x0c, CPM_CR_INIT_TRX);
 405
 406         /* clear events */
 407         W16(fccp, fcc_fcce, 0xffff);
 408
 409         /* Enable interrupts we wish to service */
 410         W16(fccp, fcc_fccm, FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
 411
 412         /* Set GFMR to enable Ethernet operating mode */
 413         W32(fccp, fcc_gfmr, FCC_GFMR_TCI | FCC_GFMR_MODE_ENET);
 414
 415         /* set sync/delimiters */
 416         W16(fccp, fcc_fdsr, 0xd555);
 417
 418         W32(fccp, fcc_fpsmr, FCC_PSMR_ENCRC);
 419
 420         if (fpi->use_rmii)
 421                 S32(fccp, fcc_fpsmr, FCC_PSMR_RMII);
 422
 423         /* adjust to duplex mode */
 424         if (fep->duplex)
 425                 S32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
 426         else
 427                 C32(fccp, fcc_fpsmr, FCC_PSMR_FDE | FCC_PSMR_LPB);
 428
 429         S32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
 430 }
 431
 432 static void stop(struct net_device *dev)
 433 {
 434         struct fs_enet_private *fep = netdev_priv(dev);
 435         fcc_t *fccp = fep->fcc.fccp;
 436
 437         /* stop ethernet */
 438         C32(fccp, fcc_gfmr, FCC_GFMR_ENR | FCC_GFMR_ENT);
 439
 440         /* clear events */
 441         W16(fccp, fcc_fcce, 0xffff);
 442
 443         /* clear interrupt mask */
 444         W16(fccp, fcc_fccm, 0);
 445
 446         fs_cleanup_bds(dev);
 447 }
 448
 449 static void pre_request_irq(struct net_device *dev, int irq)
 450 {
 451         /* nothing */
 452 }
 453
 454 static void post_free_irq(struct net_device *dev, int irq)
 455 {
 456         /* nothing */
 457 }
 458
 459 static void napi_clear_rx_event(struct net_device *dev)
 460 {
 461         struct fs_enet_private *fep = netdev_priv(dev);
 462         fcc_t *fccp = fep->fcc.fccp;
 463
 464         W16(fccp, fcc_fcce, FCC_NAPI_RX_EVENT_MSK);
 465 }
 466
 467 static void napi_enable_rx(struct net_device *dev)
 468 {
 469         struct fs_enet_private *fep = netdev_priv(dev);
 470         fcc_t *fccp = fep->fcc.fccp;
 471
 472         S16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
 473 }
 474
 475 static void napi_disable_rx(struct net_device *dev)
 476 {
 477         struct fs_enet_private *fep = netdev_priv(dev);
 478         fcc_t *fccp = fep->fcc.fccp;
 479
 480         C16(fccp, fcc_fccm, FCC_NAPI_RX_EVENT_MSK);
 481 }
 482
 483 static void rx_bd_done(struct net_device *dev)
 484 {
 485         /* nothing */
 486 }
 487
 488 static void tx_kickstart(struct net_device *dev)
 489 {
 490         /* nothing */
 491 }
 492
 493 static u32 get_int_events(struct net_device *dev)
 494 {
 495         struct fs_enet_private *fep = netdev_priv(dev);
 496         fcc_t *fccp = fep->fcc.fccp;
 497
 498         return (u32)R16(fccp, fcc_fcce);
 499 }
 500
 501 static void clear_int_events(struct net_device *dev, u32 int_events)
 502 {
 503         struct fs_enet_private *fep = netdev_priv(dev);
 504         fcc_t *fccp = fep->fcc.fccp;
 505
 506         W16(fccp, fcc_fcce, int_events & 0xffff);
 507 }
 508
 509 static void ev_error(struct net_device *dev, u32 int_events)
 510 {
 511         printk(KERN_WARNING DRV_MODULE_NAME
 512                ": %s FS_ENET ERROR(s) 0x%x\n", dev->name, int_events);
 513 }
 514
 515 int get_regs(struct net_device *dev, void *p, int *sizep)
 516 {
 517         struct fs_enet_private *fep = netdev_priv(dev);
 518
 519         if (*sizep < sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t))
 520                 return -EINVAL;
 521
 522         memcpy_fromio(p, fep->fcc.fccp, sizeof(fcc_t));
 523         p = (char *)p + sizeof(fcc_t);
 524
 525         memcpy_fromio(p, fep->fcc.fcccp, sizeof(fcc_c_t));
 526         p = (char *)p + sizeof(fcc_c_t);
 527
 528         memcpy_fromio(p, fep->fcc.ep, sizeof(fcc_enet_t));
 529
 530         return 0;
 531 }
 532
 533 int get_regs_len(struct net_device *dev)
 534 {
 535         return sizeof(fcc_t) + sizeof(fcc_c_t) + sizeof(fcc_enet_t);
 536 }
 537
 538 /* Some transmit errors cause the transmitter to shut
 539  * down.  We now issue a restart transmit.  Since the
 540  * errors close the BD and update the pointers, the restart
 541  * _should_ pick up without having to reset any of our
 542  * pointers either.  Also, To workaround 8260 device erratum
 543  * CPM37, we must disable and then re-enable the transmitter
 544  * following a Late Collision, Underrun, or Retry Limit error.
 545  */
 546 void tx_restart(struct net_device *dev)
 547 {
 548         struct fs_enet_private *fep = netdev_priv(dev);
 549         fcc_t *fccp = fep->fcc.fccp;
 550
 551         C32(fccp, fcc_gfmr, FCC_GFMR_ENT);
 552         udelay(10);
 553         S32(fccp, fcc_gfmr, FCC_GFMR_ENT);
 554
 555         fcc_cr_cmd(fep, 0x0C, CPM_CR_RESTART_TX);
 556 }
 557
 558 /*************************************************************************/
 559
 560 const struct fs_ops fs_fcc_ops = {
 561         .setup_data             = setup_data,
 562         .cleanup_data           = cleanup_data,
 563         .set_multicast_list     = set_multicast_list,
 564         .restart                = restart,
 565         .stop                   = stop,
 566         .pre_request_irq        = pre_request_irq,
 567         .post_free_irq          = post_free_irq,
 568         .napi_clear_rx_event    = napi_clear_rx_event,
 569         .napi_enable_rx         = napi_enable_rx,
 570         .napi_disable_rx        = napi_disable_rx,
 571         .rx_bd_done             = rx_bd_done,
 572         .tx_kickstart           = tx_kickstart,
 573         .get_int_events         = get_int_events,
 574         .clear_int_events       = clear_int_events,
 575         .ev_error               = ev_error,
 576         .get_regs               = get_regs,
 577         .get_regs_len           = get_regs_len,
 578         .tx_restart             = tx_restart,
 579         .allocate_bd            = allocate_bd,
 580         .free_bd                = free_bd,
 581 };