drivers/isdn/hisax/hisax.h

   1 /* $Id: hisax.h,v 2.64.2.4 2004/02/11 13:21:33 keil Exp $
   2  *
   3  * Basic declarations, defines and prototypes
   4  *
   5  * This software may be used and distributed according to the terms
   6  * of the GNU General Public License, incorporated herein by reference.
   7  *
   8  */
   9 #include <linux/config.h>
  10 #include <linux/errno.h>
  11 #include <linux/fs.h>
  12 #include <linux/major.h>
  13 #include <asm/segment.h>
  14 #include <asm/io.h>
  15 #include <linux/delay.h>
  16 #include <linux/kernel.h>
  17 #include <linux/signal.h>
  18 #include <linux/slab.h>
  19 #include <linux/mm.h>
  20 #include <linux/mman.h>
  21 #include <linux/ioport.h>
  22 #include <linux/timer.h>
  23 #include <linux/wait.h>
  24 #include <linux/isdnif.h>
  25 #include <linux/tty.h>
  26 #include <linux/serial_reg.h>
  27 #include <linux/netdevice.h>
  28
  29 #define ERROR_STATISTIC
  30
  31 #define REQUEST         0
  32 #define CONFIRM         1
  33 #define INDICATION      2
  34 #define RESPONSE        3
  35
  36 #define HW_ENABLE       0x0000
  37 #define HW_RESET        0x0004
  38 #define HW_POWERUP      0x0008
  39 #define HW_ACTIVATE     0x0010
  40 #define HW_DEACTIVATE   0x0018
  41
  42 #define HW_INFO1        0x0010
  43 #define HW_INFO2        0x0020
  44 #define HW_INFO3        0x0030
  45 #define HW_INFO4        0x0040
  46 #define HW_INFO4_P8     0x0040
  47 #define HW_INFO4_P10    0x0048
  48 #define HW_RSYNC        0x0060
  49 #define HW_TESTLOOP     0x0070
  50 #define CARD_RESET      0x00F0
  51 #define CARD_INIT       0x00F2
  52 #define CARD_RELEASE    0x00F3
  53 #define CARD_TEST       0x00F4
  54 #define CARD_AUX_IND    0x00F5
  55
  56 #define PH_ACTIVATE     0x0100
  57 #define PH_DEACTIVATE   0x0110
  58 #define PH_DATA         0x0120
  59 #define PH_PULL         0x0130
  60 #define PH_TESTLOOP     0x0140
  61 #define PH_PAUSE        0x0150
  62 #define MPH_ACTIVATE    0x0180
  63 #define MPH_DEACTIVATE  0x0190
  64 #define MPH_INFORMATION 0x01A0
  65
  66 #define DL_ESTABLISH    0x0200
  67 #define DL_RELEASE      0x0210
  68 #define DL_DATA         0x0220
  69 #define DL_FLUSH        0x0224
  70 #define DL_UNIT_DATA    0x0230
  71
  72 #define MDL_BC_RELEASE  0x0278  // Formula-n enter:now
  73 #define MDL_BC_ASSIGN   0x027C  // Formula-n enter:now
  74 #define MDL_ASSIGN      0x0280
  75 #define MDL_REMOVE      0x0284
  76 #define MDL_ERROR       0x0288
  77 #define MDL_INFO_SETUP  0x02E0
  78 #define MDL_INFO_CONN   0x02E4
  79 #define MDL_INFO_REL    0x02E8
  80
  81 #define CC_SETUP        0x0300
  82 #define CC_RESUME       0x0304
  83 #define CC_MORE_INFO    0x0310
  84 #define CC_IGNORE       0x0320
  85 #define CC_REJECT       0x0324
  86 #define CC_SETUP_COMPL  0x0330
  87 #define CC_PROCEEDING   0x0340
  88 #define CC_ALERTING     0x0344
  89 #define CC_PROGRESS     0x0348
  90 #define CC_CONNECT      0x0350
  91 #define CC_CHARGE       0x0354
  92 #define CC_NOTIFY       0x0358
  93 #define CC_DISCONNECT   0x0360
  94 #define CC_RELEASE      0x0368
  95 #define CC_SUSPEND      0x0370
  96 #define CC_PROCEED_SEND 0x0374
  97 #define CC_REDIR        0x0378
  98 #define CC_T302         0x0382
  99 #define CC_T303         0x0383
 100 #define CC_T304         0x0384
 101 #define CC_T305         0x0385
 102 #define CC_T308_1       0x0388
 103 #define CC_T308_2       0x038A
 104 #define CC_T309         0x0309
 105 #define CC_T310         0x0390
 106 #define CC_T313         0x0393
 107 #define CC_T318         0x0398
 108 #define CC_T319         0x0399
 109 #define CC_TSPID        0x03A0
 110 #define CC_NOSETUP_RSP  0x03E0
 111 #define CC_SETUP_ERR    0x03E1
 112 #define CC_SUSPEND_ERR  0x03E2
 113 #define CC_RESUME_ERR   0x03E3
 114 #define CC_CONNECT_ERR  0x03E4
 115 #define CC_RELEASE_ERR  0x03E5
 116 #define CC_RESTART      0x03F4
 117 #define CC_TDSS1_IO     0x13F4    /* DSS1 IO user timer */
 118 #define CC_TNI1_IO      0x13F5    /* NI1 IO user timer */
 119
 120 /* define maximum number of possible waiting incoming calls */
 121 #define MAX_WAITING_CALLS 2
 122
 123
 124 #ifdef __KERNEL__
 125
 126 /* include l3dss1 & ni1 specific process structures, but no other defines */
 127 #ifdef CONFIG_HISAX_EURO
 128   #define l3dss1_process
 129   #include "l3dss1.h"
 130   #undef  l3dss1_process
 131 #endif /* CONFIG_HISAX_EURO */
 132
 133 #ifdef CONFIG_HISAX_NI1
 134   #define l3ni1_process
 135   #include "l3ni1.h"
 136   #undef  l3ni1_process
 137 #endif /* CONFIG_HISAX_NI1 */
 138
 139 #define MAX_DFRAME_LEN  260
 140 #define MAX_DFRAME_LEN_L1       300
 141 #define HSCX_BUFMAX     4096
 142 #define MAX_DATA_SIZE   (HSCX_BUFMAX - 4)
 143 #define MAX_DATA_MEM    (HSCX_BUFMAX + 64)
 144 #define RAW_BUFMAX      (((HSCX_BUFMAX*6)/5) + 5)
 145 #define MAX_HEADER_LEN  4
 146 #define MAX_WINDOW      8
 147 #define MAX_MON_FRAME   32
 148 #define MAX_DLOG_SPACE  2048
 149 #define MAX_BLOG_SPACE  256
 150
 151 /* #define I4L_IRQ_FLAG SA_INTERRUPT */
 152 #define I4L_IRQ_FLAG    0
 153
 154 /*
 155  * Statemachine
 156  */
 157
 158 struct FsmInst;
 159
 160 typedef void (* FSMFNPTR)(struct FsmInst *, int, void *);
 161
 162 struct Fsm {
 163         FSMFNPTR *jumpmatrix;
 164         int state_count, event_count;
 165         char **strEvent, **strState;
 166 };
 167
 168 struct FsmInst {
 169         struct Fsm *fsm;
 170         int state;
 171         int debug;
 172         void *userdata;
 173         int userint;
 174         void (*printdebug) (struct FsmInst *, char *, ...);
 175 };
 176
 177 struct FsmNode {
 178         int state, event;
 179         void (*routine) (struct FsmInst *, int, void *);
 180 };
 181
 182 struct FsmTimer {
 183         struct FsmInst *fi;
 184         struct timer_list tl;
 185         int event;
 186         void *arg;
 187 };
 188
 189 struct L3Timer {
 190         struct l3_process *pc;
 191         struct timer_list tl;
 192         int event;
 193 };
 194
 195 #define FLG_L1_ACTIVATING       1
 196 #define FLG_L1_ACTIVATED        2
 197 #define FLG_L1_DEACTTIMER       3
 198 #define FLG_L1_ACTTIMER         4
 199 #define FLG_L1_T3RUN            5
 200 #define FLG_L1_PULL_REQ         6
 201 #define FLG_L1_UINT             7
 202
 203 struct Layer1 {
 204         void *hardware;
 205         struct BCState *bcs;
 206         struct PStack **stlistp;
 207         long Flags;
 208         struct FsmInst l1m;
 209         struct FsmTimer timer;
 210         void (*l1l2) (struct PStack *, int, void *);
 211         void (*l1hw) (struct PStack *, int, void *);
 212         void (*l1tei) (struct PStack *, int, void *);
 213         int mode, bc;
 214         int delay;
 215 };
 216
 217 #define GROUP_TEI       127
 218 #define TEI_SAPI        63
 219 #define CTRL_SAPI       0
 220 #define PACKET_NOACK    250
 221
 222 /* Layer2 Flags */
 223
 224 #define FLG_LAPB        0
 225 #define FLG_LAPD        1
 226 #define FLG_ORIG        2
 227 #define FLG_MOD128      3
 228 #define FLG_PEND_REL    4
 229 #define FLG_L3_INIT     5
 230 #define FLG_T200_RUN    6
 231 #define FLG_ACK_PEND    7
 232 #define FLG_REJEXC      8
 233 #define FLG_OWN_BUSY    9
 234 #define FLG_PEER_BUSY   10
 235 #define FLG_DCHAN_BUSY  11
 236 #define FLG_L1_ACTIV    12
 237 #define FLG_ESTAB_PEND  13
 238 #define FLG_PTP         14
 239 #define FLG_FIXED_TEI   15
 240 #define FLG_L2BLOCK     16
 241
 242 struct Layer2 {
 243         int tei;
 244         int sap;
 245         int maxlen;
 246         u_long flag;
 247         spinlock_t lock;
 248         u_int vs, va, vr;
 249         int rc;
 250         unsigned int window;
 251         unsigned int sow;
 252         struct sk_buff *windowar[MAX_WINDOW];
 253         struct sk_buff_head i_queue;
 254         struct sk_buff_head ui_queue;
 255         void (*l2l1) (struct PStack *, int, void *);
 256         void (*l2l3) (struct PStack *, int, void *);
 257         void (*l2tei) (struct PStack *, int, void *);
 258         struct FsmInst l2m;
 259         struct FsmTimer t200, t203;
 260         int T200, N200, T203;
 261         int debug;
 262         char debug_id[16];
 263 };
 264
 265 struct Layer3 {
 266         void (*l3l4) (struct PStack *, int, void *);
 267         void (*l3ml3) (struct PStack *, int, void *);
 268         void (*l3l2) (struct PStack *, int, void *);
 269         struct FsmInst l3m;
 270         struct FsmTimer l3m_timer;
 271         struct sk_buff_head squeue;
 272         struct l3_process *proc;
 273         struct l3_process *global;
 274         int N303;
 275         int debug;
 276         char debug_id[8];
 277 };
 278
 279 struct LLInterface {
 280         void (*l4l3) (struct PStack *, int, void *);
 281         int  (*l4l3_proto) (struct PStack *, isdn_ctrl *);
 282         void *userdata;
 283         u_long flag;
 284 };
 285
 286 #define FLG_LLI_L1WAKEUP        1
 287 #define FLG_LLI_L2WAKEUP        2
 288
 289 struct Management {
 290         int     ri;
 291         struct FsmInst tei_m;
 292         struct FsmTimer t202;
 293         int T202, N202, debug;
 294         void (*layer) (struct PStack *, int, void *);
 295 };
 296
 297 #define NO_CAUSE 254
 298
 299 struct Param {
 300         u_char cause;
 301         u_char loc;
 302         u_char diag[6];
 303         int bchannel;
 304         int chargeinfo;
 305         int spv;                /* SPV Flag */
 306         setup_parm setup;       /* from isdnif.h numbers and Serviceindicator */
 307         u_char moderate;        /* transfer mode and rate (bearer octet 4) */
 308 };
 309
 310
 311 struct PStack {
 312         struct PStack *next;
 313         struct Layer1 l1;
 314         struct Layer2 l2;
 315         struct Layer3 l3;
 316         struct LLInterface lli;
 317         struct Management ma;
 318         int protocol;           /* EDSS1, 1TR6 or NI1 */
 319
 320         /* protocol specific data fields */
 321         union
 322          { u_char uuuu; /* only as dummy */
 323 #ifdef CONFIG_HISAX_EURO
 324            dss1_stk_priv dss1; /* private dss1 data */
 325 #endif /* CONFIG_HISAX_EURO */
 326 #ifdef CONFIG_HISAX_NI1
 327            ni1_stk_priv ni1; /* private ni1 data */
 328 #endif /* CONFIG_HISAX_NI1 */
 329          } prot;
 330 };
 331
 332 struct l3_process {
 333         int callref;
 334         int state;
 335         struct L3Timer timer;
 336         int N303;
 337         int debug;
 338         struct Param para;
 339         struct Channel *chan;
 340         struct PStack *st;
 341         struct l3_process *next;
 342         ulong redir_result;
 343
 344         /* protocol specific data fields */
 345         union
 346          { u_char uuuu; /* only when euro not defined, avoiding empty union */
 347 #ifdef CONFIG_HISAX_EURO
 348            dss1_proc_priv dss1; /* private dss1 data */
 349 #endif /* CONFIG_HISAX_EURO */
 350 #ifdef CONFIG_HISAX_NI1
 351            ni1_proc_priv ni1; /* private ni1 data */
 352 #endif /* CONFIG_HISAX_NI1 */
 353          } prot;
 354 };
 355
 356 struct hscx_hw {
 357         int hscx;
 358         int rcvidx;
 359         int count;              /* Current skb sent count */
 360         u_char *rcvbuf;         /* B-Channel receive Buffer */
 361         u_char tsaxr0;
 362         u_char tsaxr1;
 363 };
 364
 365 struct w6692B_hw {
 366         int bchan;
 367         int rcvidx;
 368         int count;              /* Current skb sent count */
 369         u_char *rcvbuf;         /* B-Channel receive Buffer */
 370 };
 371
 372 struct isar_reg {
 373         unsigned long Flags;
 374         volatile u_char bstat;
 375         volatile u_char iis;
 376         volatile u_char cmsb;
 377         volatile u_char clsb;
 378         volatile u_char par[8];
 379 };
 380
 381 struct isar_hw {
 382         int dpath;
 383         int rcvidx;
 384         int txcnt;
 385         int mml;
 386         u_char state;
 387         u_char cmd;
 388         u_char mod;
 389         u_char newcmd;
 390         u_char newmod;
 391         char try_mod;
 392         struct timer_list ftimer;
 393         u_char *rcvbuf;         /* B-Channel receive Buffer */
 394         u_char conmsg[16];
 395         struct isar_reg *reg;
 396 };
 397
 398 struct hdlc_stat_reg {
 399 #ifdef __BIG_ENDIAN
 400         u_char fill __attribute__((packed));
 401         u_char mode __attribute__((packed));
 402         u_char xml  __attribute__((packed));
 403         u_char cmd  __attribute__((packed));
 404 #else
 405         u_char cmd  __attribute__((packed));
 406         u_char xml  __attribute__((packed));
 407         u_char mode __attribute__((packed));
 408         u_char fill __attribute__((packed));
 409 #endif
 410 };
 411
 412 struct hdlc_hw {
 413         union {
 414                 u_int ctrl;
 415                 struct hdlc_stat_reg sr;
 416         } ctrl;
 417         u_int stat;
 418         int rcvidx;
 419         int count;              /* Current skb sent count */
 420         u_char *rcvbuf;         /* B-Channel receive Buffer */
 421 };
 422
 423 struct hfcB_hw {
 424         unsigned int *send;
 425         int f1;
 426         int f2;
 427 };
 428
 429 struct tiger_hw {
 430         u_int *send;
 431         u_int *s_irq;
 432         u_int *s_end;
 433         u_int *sendp;
 434         u_int *rec;
 435         int free;
 436         u_char *rcvbuf;
 437         u_char *sendbuf;
 438         u_char *sp;
 439         int sendcnt;
 440         u_int s_tot;
 441         u_int r_bitcnt;
 442         u_int r_tot;
 443         u_int r_err;
 444         u_int r_fcs;
 445         u_char r_state;
 446         u_char r_one;
 447         u_char r_val;
 448         u_char s_state;
 449 };
 450
 451 struct amd7930_hw {
 452         u_char *tx_buff;
 453         u_char *rv_buff;
 454         int rv_buff_in;
 455         int rv_buff_out;
 456         struct sk_buff *rv_skb;
 457         struct hdlc_state *hdlc_state;
 458         struct work_struct tq_rcv;
 459         struct work_struct tq_xmt;
 460 };
 461
 462 #define BC_FLG_INIT     1
 463 #define BC_FLG_ACTIV    2
 464 #define BC_FLG_BUSY     3
 465 #define BC_FLG_NOFRAME  4
 466 #define BC_FLG_HALF     5
 467 #define BC_FLG_EMPTY    6
 468 #define BC_FLG_ORIG     7
 469 #define BC_FLG_DLEETX   8
 470 #define BC_FLG_LASTDLE  9
 471 #define BC_FLG_FIRST    10
 472 #define BC_FLG_LASTDATA 11
 473 #define BC_FLG_NMD_DATA 12
 474 #define BC_FLG_FTI_RUN  13
 475 #define BC_FLG_LL_OK    14
 476 #define BC_FLG_LL_CONN  15
 477 #define BC_FLG_FTI_FTS  16
 478 #define BC_FLG_FRH_WAIT 17
 479
 480 #define L1_MODE_NULL    0
 481 #define L1_MODE_TRANS   1
 482 #define L1_MODE_HDLC    2
 483 #define L1_MODE_EXTRN   3
 484 #define L1_MODE_HDLC_56K 4
 485 #define L1_MODE_MODEM   7
 486 #define L1_MODE_V32     8
 487 #define L1_MODE_FAX     9
 488
 489 struct BCState {
 490         int channel;
 491         int mode;
 492         u_long Flag;
 493         struct IsdnCardState *cs;
 494         int tx_cnt;             /* B-Channel transmit counter */
 495         struct sk_buff *tx_skb; /* B-Channel transmit Buffer */
 496         struct sk_buff_head rqueue;     /* B-Channel receive Queue */
 497         struct sk_buff_head squeue;     /* B-Channel send Queue */
 498         int ackcnt;
 499         spinlock_t aclock;
 500         struct PStack *st;
 501         u_char *blog;
 502         u_char *conmsg;
 503         struct timer_list transbusy;
 504         struct work_struct tqueue;
 505         u_long event;
 506         int  (*BC_SetStack) (struct PStack *, struct BCState *);
 507         void (*BC_Close) (struct BCState *);
 508 #ifdef ERROR_STATISTIC
 509         int err_crc;
 510         int err_tx;
 511         int err_rdo;
 512         int err_inv;
 513 #endif
 514         union {
 515                 struct hscx_hw hscx;
 516                 struct hdlc_hw hdlc;
 517                 struct isar_hw isar;
 518                 struct hfcB_hw hfc;
 519                 struct tiger_hw tiger;
 520                 struct amd7930_hw  amd7930;
 521                 struct w6692B_hw w6692;
 522                 struct hisax_b_if *b_if;
 523         } hw;
 524 };
 525
 526 struct Channel {
 527         struct PStack *b_st, *d_st;
 528         struct IsdnCardState *cs;
 529         struct BCState *bcs;
 530         int chan;
 531         int incoming;
 532         struct FsmInst fi;
 533         struct FsmTimer drel_timer, dial_timer;
 534         int debug;
 535         int l2_protocol, l2_active_protocol;
 536         int l3_protocol;
 537         int data_open;
 538         struct l3_process *proc;
 539         setup_parm setup;       /* from isdnif.h numbers and Serviceindicator */
 540         u_long Flags;           /* for remembering action done in l4 */
 541         int leased;
 542 };
 543
 544 struct elsa_hw {
 545         struct pci_dev *dev;
 546         unsigned long base;
 547         unsigned int cfg;
 548         unsigned int ctrl;
 549         unsigned int ale;
 550         unsigned int isac;
 551         unsigned int itac;
 552         unsigned int hscx;
 553         unsigned int trig;
 554         unsigned int timer;
 555         unsigned int counter;
 556         unsigned int status;
 557         struct timer_list tl;
 558         unsigned int MFlag;
 559         struct BCState *bcs;
 560         u_char *transbuf;
 561         u_char *rcvbuf;
 562         unsigned int transp;
 563         unsigned int rcvp;
 564         unsigned int transcnt;
 565         unsigned int rcvcnt;
 566         u_char IER;
 567         u_char FCR;
 568         u_char LCR;
 569         u_char MCR;
 570         u_char ctrl_reg;
 571 };
 572
 573 struct teles3_hw {
 574         unsigned int cfg_reg;
 575         signed   int isac;
 576         signed   int hscx[2];
 577         signed   int isacfifo;
 578         signed   int hscxfifo[2];
 579 };
 580
 581 struct teles0_hw {
 582         unsigned int cfg_reg;
 583         void __iomem *membase;
 584         unsigned long phymem;
 585 };
 586
 587 struct avm_hw {
 588         unsigned int cfg_reg;
 589         unsigned int isac;
 590         unsigned int hscx[2];
 591         unsigned int isacfifo;
 592         unsigned int hscxfifo[2];
 593         unsigned int counter;
 594         struct pci_dev *dev;
 595 };
 596
 597 struct ix1_hw {
 598         unsigned int cfg_reg;
 599         unsigned int isac_ale;
 600         unsigned int isac;
 601         unsigned int hscx_ale;
 602         unsigned int hscx;
 603 };
 604
 605 struct diva_hw {
 606         unsigned long cfg_reg;
 607         unsigned long pci_cfg;
 608         unsigned int ctrl;
 609         unsigned long isac_adr;
 610         unsigned int isac;
 611         unsigned long hscx_adr;
 612         unsigned int hscx;
 613         unsigned int status;
 614         struct timer_list tl;
 615         u_char ctrl_reg;
 616         struct pci_dev *dev;
 617 };
 618
 619 struct asus_hw {
 620         unsigned int cfg_reg;
 621         unsigned int adr;
 622         unsigned int isac;
 623         unsigned int hscx;
 624         unsigned int u7;
 625         unsigned int pots;
 626 };
 627
 628
 629 struct hfc_hw {
 630         unsigned int addr;
 631         unsigned int fifosize;
 632         unsigned char cirm;
 633         unsigned char ctmt;
 634         unsigned char cip;
 635         u_char isac_spcr;
 636         struct timer_list timer;
 637 };
 638
 639 struct sedl_hw {
 640         unsigned int cfg_reg;
 641         unsigned int adr;
 642         unsigned int isac;
 643         unsigned int hscx;
 644         unsigned int reset_on;
 645         unsigned int reset_off;
 646         struct isar_reg isar;
 647         unsigned int chip;
 648         unsigned int bus;
 649         struct pci_dev *dev;
 650 };
 651
 652 struct spt_hw {
 653         unsigned int cfg_reg;
 654         unsigned int isac;
 655         unsigned int hscx[2];
 656         unsigned char res_irq;
 657 };
 658
 659 struct mic_hw {
 660         unsigned int cfg_reg;
 661         unsigned int adr;
 662         unsigned int isac;
 663         unsigned int hscx;
 664 };
 665
 666 struct njet_hw {
 667         unsigned long base;
 668         unsigned int isac;
 669         unsigned int auxa;
 670         unsigned char auxd;
 671         unsigned char dmactrl;
 672         unsigned char ctrl_reg;
 673         unsigned char irqmask0;
 674         unsigned char irqstat0;
 675         unsigned char last_is0;
 676         struct pci_dev *dev;
 677 };
 678
 679 struct hfcPCI_hw {
 680         unsigned char cirm;
 681         unsigned char ctmt;
 682         unsigned char conn;
 683         unsigned char mst_m;
 684         unsigned char int_m1;
 685         unsigned char int_m2;
 686         unsigned char int_s1;
 687         unsigned char sctrl;
 688         unsigned char sctrl_r;
 689         unsigned char sctrl_e;
 690         unsigned char trm;
 691         unsigned char stat;
 692         unsigned char fifo;
 693         unsigned char fifo_en;
 694         unsigned char bswapped;
 695         unsigned char nt_mode;
 696         int nt_timer;
 697         struct pci_dev *dev;
 698         unsigned char *pci_io; /* start of PCI IO memory */
 699         void *share_start; /* shared memory for Fifos start */
 700         void *fifos; /* FIFO memory */
 701         int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */
 702         struct timer_list timer;
 703 };
 704
 705 struct hfcSX_hw {
 706         unsigned long base;
 707         unsigned char cirm;
 708         unsigned char ctmt;
 709         unsigned char conn;
 710         unsigned char mst_m;
 711         unsigned char int_m1;
 712         unsigned char int_m2;
 713         unsigned char int_s1;
 714         unsigned char sctrl;
 715         unsigned char sctrl_r;
 716         unsigned char sctrl_e;
 717         unsigned char trm;
 718         unsigned char stat;
 719         unsigned char fifo;
 720         unsigned char bswapped;
 721         unsigned char nt_mode;
 722         unsigned char chip;
 723         int b_fifo_size;
 724         unsigned char last_fifo;
 725         void *extra;
 726         int nt_timer;
 727         struct timer_list timer;
 728 };
 729
 730 struct hfcD_hw {
 731         unsigned int addr;
 732         unsigned int bfifosize;
 733         unsigned int dfifosize;
 734         unsigned char cirm;
 735         unsigned char ctmt;
 736         unsigned char cip;
 737         unsigned char conn;
 738         unsigned char mst_m;
 739         unsigned char int_m1;
 740         unsigned char int_m2;
 741         unsigned char int_s1;
 742         unsigned char sctrl;
 743         unsigned char stat;
 744         unsigned char fifo;
 745         unsigned char f1;
 746         unsigned char f2;
 747         unsigned int *send;
 748         struct timer_list timer;
 749 };
 750
 751 struct isurf_hw {
 752         unsigned int reset;
 753         unsigned long phymem;
 754         void __iomem *isac;
 755         void __iomem *isar;
 756         struct isar_reg isar_r;
 757 };
 758
 759 struct saphir_hw {
 760         struct pci_dev *dev;
 761         unsigned int cfg_reg;
 762         unsigned int ale;
 763         unsigned int isac;
 764         unsigned int hscx;
 765         struct timer_list timer;
 766 };
 767
 768 struct bkm_hw {
 769         struct pci_dev *dev;
 770         unsigned long base;
 771         /* A4T stuff */
 772         unsigned long isac_adr;
 773         unsigned int isac_ale;
 774         unsigned long jade_adr;
 775         unsigned int jade_ale;
 776         /* Scitel Quadro stuff */
 777         unsigned long plx_adr;
 778         unsigned long data_adr;
 779 };
 780
 781 struct gazel_hw {
 782         struct pci_dev *dev;
 783         unsigned int cfg_reg;
 784         unsigned int pciaddr[2];
 785         signed   int ipac;
 786         signed   int isac;
 787         signed   int hscx[2];
 788         signed   int isacfifo;
 789         signed   int hscxfifo[2];
 790         unsigned char timeslot;
 791         unsigned char iom2;
 792 };
 793
 794 struct w6692_hw {
 795         struct pci_dev *dev;
 796         unsigned int iobase;
 797         struct timer_list timer;
 798 };
 799
 800 #ifdef  CONFIG_HISAX_TESTEMU
 801 struct te_hw {
 802         unsigned char *sfifo;
 803         unsigned char *sfifo_w;
 804         unsigned char *sfifo_r;
 805         unsigned char *sfifo_e;
 806         int sfifo_cnt;
 807         unsigned int stat;
 808         wait_queue_head_t rwaitq;
 809         wait_queue_head_t swaitq;
 810 };
 811 #endif
 812
 813 struct arcofi_msg {
 814         struct arcofi_msg *next;
 815         u_char receive;
 816         u_char len;
 817         u_char msg[10];
 818 };
 819
 820 struct isac_chip {
 821         int ph_state;
 822         u_char *mon_tx;
 823         u_char *mon_rx;
 824         int mon_txp;
 825         int mon_txc;
 826         int mon_rxp;
 827         struct arcofi_msg *arcofi_list;
 828         struct timer_list arcofitimer;
 829         wait_queue_head_t arcofi_wait;
 830         u_char arcofi_bc;
 831         u_char arcofi_state;
 832         u_char mocr;
 833         u_char adf2;
 834 };
 835
 836 struct hfcd_chip {
 837         int ph_state;
 838 };
 839
 840 struct hfcpci_chip {
 841         int ph_state;
 842 };
 843
 844 struct hfcsx_chip {
 845         int ph_state;
 846 };
 847
 848 struct w6692_chip {
 849         int ph_state;
 850 };
 851
 852 struct amd7930_chip {
 853         u_char lmr1;
 854         u_char ph_state;
 855         u_char old_state;
 856         u_char flg_t3;
 857         unsigned int tx_xmtlen;
 858         struct timer_list timer3;
 859         void (*ph_command) (struct IsdnCardState *, u_char, char *);
 860         void (*setIrqMask) (struct IsdnCardState *, u_char);
 861 };
 862
 863 struct icc_chip {
 864         int ph_state;
 865         u_char *mon_tx;
 866         u_char *mon_rx;
 867         int mon_txp;
 868         int mon_txc;
 869         int mon_rxp;
 870         struct arcofi_msg *arcofi_list;
 871         struct timer_list arcofitimer;
 872         wait_queue_head_t arcofi_wait;
 873         u_char arcofi_bc;
 874         u_char arcofi_state;
 875         u_char mocr;
 876         u_char adf2;
 877 };
 878
 879 #define HW_IOM1                 0
 880 #define HW_IPAC                 1
 881 #define HW_ISAR                 2
 882 #define HW_ARCOFI               3
 883 #define FLG_TWO_DCHAN           4
 884 #define FLG_L1_DBUSY            5
 885 #define FLG_DBUSY_TIMER         6
 886 #define FLG_LOCK_ATOMIC         7
 887 #define FLG_ARCOFI_TIMER        8
 888 #define FLG_ARCOFI_ERROR        9
 889 #define FLG_HW_L1_UINT          10
 890
 891 struct IsdnCardState {
 892         spinlock_t      lock;
 893         u_char          typ;
 894         u_char          subtyp;
 895         int             protocol;
 896         u_int           irq;
 897         u_long          irq_flags;
 898         u_long          HW_Flags;
 899         int             *busy_flag;
 900         int             chanlimit; /* limited number of B-chans to use */
 901         int             logecho; /* log echo if supported by card */
 902         union {
 903                 struct elsa_hw elsa;
 904                 struct teles0_hw teles0;
 905                 struct teles3_hw teles3;
 906                 struct avm_hw avm;
 907                 struct ix1_hw ix1;
 908                 struct diva_hw diva;
 909                 struct asus_hw asus;
 910                 struct hfc_hw hfc;
 911                 struct sedl_hw sedl;
 912                 struct spt_hw spt;
 913                 struct mic_hw mic;
 914                 struct njet_hw njet;
 915                 struct hfcD_hw hfcD;
 916                 struct hfcPCI_hw hfcpci;
 917                 struct hfcSX_hw hfcsx;
 918                 struct ix1_hw niccy;
 919                 struct isurf_hw isurf;
 920                 struct saphir_hw saphir;
 921 #ifdef CONFIG_HISAX_TESTEMU
 922                 struct te_hw te;
 923 #endif
 924                 struct bkm_hw ax;
 925                 struct gazel_hw gazel;
 926                 struct w6692_hw w6692;
 927                 struct hisax_d_if *hisax_d_if;
 928         } hw;
 929         int             myid;
 930         isdn_if         iif;
 931         spinlock_t      statlock;
 932         u_char          *status_buf;
 933         u_char          *status_read;
 934         u_char          *status_write;
 935         u_char          *status_end;
 936         u_char          (*readisac) (struct IsdnCardState *, u_char);
 937         void            (*writeisac) (struct IsdnCardState *, u_char, u_char);
 938         void            (*readisacfifo) (struct IsdnCardState *, u_char *, int);
 939         void            (*writeisacfifo) (struct IsdnCardState *, u_char *, int);
 940         u_char          (*BC_Read_Reg) (struct IsdnCardState *, int, u_char);
 941         void            (*BC_Write_Reg) (struct IsdnCardState *, int, u_char, u_char);
 942         void            (*BC_Send_Data) (struct BCState *);
 943         int             (*cardmsg) (struct IsdnCardState *, int, void *);
 944         void            (*setstack_d) (struct PStack *, struct IsdnCardState *);
 945         void            (*DC_Close) (struct IsdnCardState *);
 946         int             (*irq_func) (int, void *, struct pt_regs *);
 947         int             (*auxcmd) (struct IsdnCardState *, isdn_ctrl *);
 948         struct Channel  channel[2+MAX_WAITING_CALLS];
 949         struct BCState  bcs[2+MAX_WAITING_CALLS];
 950         struct PStack   *stlist;
 951         struct sk_buff_head rq, sq; /* D-channel queues */
 952         int             cardnr;
 953         char            *dlog;
 954         int             debug;
 955         union {
 956                 struct isac_chip isac;
 957                 struct hfcd_chip hfcd;
 958                 struct hfcpci_chip hfcpci;
 959                 struct hfcsx_chip hfcsx;
 960                 struct w6692_chip w6692;
 961                 struct amd7930_chip amd7930;
 962                 struct icc_chip icc;
 963         } dc;
 964         u_char          *rcvbuf;
 965         int             rcvidx;
 966         struct sk_buff  *tx_skb;
 967         int             tx_cnt;
 968         u_long          event;
 969         struct work_struct tqueue;
 970         struct timer_list dbusytimer;
 971 #ifdef ERROR_STATISTIC
 972         int             err_crc;
 973         int             err_tx;
 974         int             err_rx;
 975 #endif
 976 };
 977
 978
 979 #define  schedule_event(s, ev)  do {test_and_set_bit(ev, &s->event);schedule_work(&s->tqueue); } while(0)
 980
 981 #define  MON0_RX        1
 982 #define  MON1_RX        2
 983 #define  MON0_TX        4
 984 #define  MON1_TX        8
 985
 986
 987 #ifdef ISDN_CHIP_ISAC
 988 #undef ISDN_CHIP_ISAC
 989 #endif
 990
 991 #ifdef  CONFIG_HISAX_16_0
 992 #define  CARD_TELES0 1
 993 #ifndef ISDN_CHIP_ISAC
 994 #define ISDN_CHIP_ISAC 1
 995 #endif
 996 #else
 997 #define  CARD_TELES0  0
 998 #endif
 999
1000 #ifdef  CONFIG_HISAX_16_3
1001 #define  CARD_TELES3 1
1002 #ifndef ISDN_CHIP_ISAC
1003 #define ISDN_CHIP_ISAC 1
1004 #endif
1005 #else
1006 #define  CARD_TELES3  0
1007 #endif
1008
1009 #ifdef  CONFIG_HISAX_TELESPCI
1010 #define  CARD_TELESPCI 1
1011 #ifndef ISDN_CHIP_ISAC
1012 #define ISDN_CHIP_ISAC 1
1013 #endif
1014 #else
1015 #define  CARD_TELESPCI  0
1016 #endif
1017
1018 #ifdef  CONFIG_HISAX_AVM_A1
1019 #define  CARD_AVM_A1 1
1020 #ifndef ISDN_CHIP_ISAC
1021 #define ISDN_CHIP_ISAC 1
1022 #endif
1023 #else
1024 #define  CARD_AVM_A1  0
1025 #endif
1026
1027 #ifdef  CONFIG_HISAX_AVM_A1_PCMCIA
1028 #define  CARD_AVM_A1_PCMCIA 1
1029 #ifndef ISDN_CHIP_ISAC
1030 #define ISDN_CHIP_ISAC 1
1031 #endif
1032 #else
1033 #define  CARD_AVM_A1_PCMCIA  0
1034 #endif
1035
1036 #ifdef  CONFIG_HISAX_FRITZPCI
1037 #define  CARD_FRITZPCI 1
1038 #ifndef ISDN_CHIP_ISAC
1039 #define ISDN_CHIP_ISAC 1
1040 #endif
1041 #else
1042 #define  CARD_FRITZPCI  0
1043 #endif
1044
1045 #ifdef  CONFIG_HISAX_ELSA
1046 #define  CARD_ELSA 1
1047 #ifndef ISDN_CHIP_ISAC
1048 #define ISDN_CHIP_ISAC 1
1049 #endif
1050 #else
1051 #define  CARD_ELSA  0
1052 #endif
1053
1054 #ifdef  CONFIG_HISAX_IX1MICROR2
1055 #define CARD_IX1MICROR2 1
1056 #ifndef ISDN_CHIP_ISAC
1057 #define ISDN_CHIP_ISAC 1
1058 #endif
1059 #else
1060 #define CARD_IX1MICROR2 0
1061 #endif
1062
1063 #ifdef  CONFIG_HISAX_DIEHLDIVA
1064 #define CARD_DIEHLDIVA 1
1065 #ifndef ISDN_CHIP_ISAC
1066 #define ISDN_CHIP_ISAC 1
1067 #endif
1068 #else
1069 #define CARD_DIEHLDIVA 0
1070 #endif
1071
1072 #ifdef  CONFIG_HISAX_ASUSCOM
1073 #define CARD_ASUSCOM 1
1074 #ifndef ISDN_CHIP_ISAC
1075 #define ISDN_CHIP_ISAC 1
1076 #endif
1077 #else
1078 #define CARD_ASUSCOM 0
1079 #endif
1080
1081 #ifdef  CONFIG_HISAX_TELEINT
1082 #define CARD_TELEINT 1
1083 #ifndef ISDN_CHIP_ISAC
1084 #define ISDN_CHIP_ISAC 1
1085 #endif
1086 #else
1087 #define CARD_TELEINT 0
1088 #endif
1089
1090 #ifdef  CONFIG_HISAX_SEDLBAUER
1091 #define CARD_SEDLBAUER 1
1092 #ifndef ISDN_CHIP_ISAC
1093 #define ISDN_CHIP_ISAC 1
1094 #endif
1095 #else
1096 #define CARD_SEDLBAUER 0
1097 #endif
1098
1099 #ifdef  CONFIG_HISAX_SPORTSTER
1100 #define CARD_SPORTSTER 1
1101 #ifndef ISDN_CHIP_ISAC
1102 #define ISDN_CHIP_ISAC 1
1103 #endif
1104 #else
1105 #define CARD_SPORTSTER 0
1106 #endif
1107
1108 #ifdef  CONFIG_HISAX_MIC
1109 #define CARD_MIC 1
1110 #ifndef ISDN_CHIP_ISAC
1111 #define ISDN_CHIP_ISAC 1
1112 #endif
1113 #else
1114 #define CARD_MIC 0
1115 #endif
1116
1117 #ifdef  CONFIG_HISAX_NETJET
1118 #define CARD_NETJET_S 1
1119 #ifndef ISDN_CHIP_ISAC
1120 #define ISDN_CHIP_ISAC 1
1121 #endif
1122 #else
1123 #define CARD_NETJET_S 0
1124 #endif
1125
1126 #ifdef  CONFIG_HISAX_HFCS
1127 #define  CARD_HFCS 1
1128 #else
1129 #define  CARD_HFCS 0
1130 #endif
1131
1132 #ifdef  CONFIG_HISAX_HFC_PCI
1133 #define  CARD_HFC_PCI 1
1134 #else
1135 #define  CARD_HFC_PCI 0
1136 #endif
1137
1138 #ifdef  CONFIG_HISAX_HFC_SX
1139 #define  CARD_HFC_SX 1
1140 #else
1141 #define  CARD_HFC_SX 0
1142 #endif
1143
1144 #ifdef  CONFIG_HISAX_AMD7930
1145 #define CARD_AMD7930 1
1146 #else
1147 #define CARD_AMD7930 0
1148 #endif
1149
1150 #ifdef  CONFIG_HISAX_NICCY
1151 #define CARD_NICCY 1
1152 #ifndef ISDN_CHIP_ISAC
1153 #define ISDN_CHIP_ISAC 1
1154 #endif
1155 #else
1156 #define CARD_NICCY 0
1157 #endif
1158
1159 #ifdef  CONFIG_HISAX_ISURF
1160 #define CARD_ISURF 1
1161 #ifndef ISDN_CHIP_ISAC
1162 #define ISDN_CHIP_ISAC 1
1163 #endif
1164 #else
1165 #define CARD_ISURF 0
1166 #endif
1167
1168 #ifdef  CONFIG_HISAX_S0BOX
1169 #define CARD_S0BOX 1
1170 #ifndef ISDN_CHIP_ISAC
1171 #define ISDN_CHIP_ISAC 1
1172 #endif
1173 #else
1174 #define CARD_S0BOX 0
1175 #endif
1176
1177 #ifdef  CONFIG_HISAX_HSTSAPHIR
1178 #define CARD_HSTSAPHIR 1
1179 #ifndef ISDN_CHIP_ISAC
1180 #define ISDN_CHIP_ISAC 1
1181 #endif
1182 #else
1183 #define CARD_HSTSAPHIR 0
1184 #endif
1185
1186 #ifdef  CONFIG_HISAX_TESTEMU
1187 #define CARD_TESTEMU 1
1188 #define ISDN_CTYPE_TESTEMU 99
1189 #undef ISDN_CTYPE_COUNT
1190 #define  ISDN_CTYPE_COUNT ISDN_CTYPE_TESTEMU
1191 #else
1192 #define CARD_TESTEMU 0
1193 #endif
1194
1195 #ifdef  CONFIG_HISAX_BKM_A4T
1196 #define CARD_BKM_A4T 1
1197 #ifndef ISDN_CHIP_ISAC
1198 #define ISDN_CHIP_ISAC 1
1199 #endif
1200 #else
1201 #define CARD_BKM_A4T 0
1202 #endif
1203
1204 #ifdef  CONFIG_HISAX_SCT_QUADRO
1205 #define CARD_SCT_QUADRO 1
1206 #ifndef ISDN_CHIP_ISAC
1207 #define ISDN_CHIP_ISAC 1
1208 #endif
1209 #else
1210 #define CARD_SCT_QUADRO 0
1211 #endif
1212
1213 #ifdef  CONFIG_HISAX_GAZEL
1214 #define  CARD_GAZEL 1
1215 #ifndef ISDN_CHIP_ISAC
1216 #define ISDN_CHIP_ISAC 1
1217 #endif
1218 #else
1219 #define  CARD_GAZEL  0
1220 #endif
1221
1222 #ifdef  CONFIG_HISAX_W6692
1223 #define CARD_W6692      1
1224 #ifndef ISDN_CHIP_W6692
1225 #define ISDN_CHIP_W6692 1
1226 #endif
1227 #else
1228 #define CARD_W6692      0
1229 #endif
1230
1231 #ifdef  CONFIG_HISAX_NETJET_U
1232 #define CARD_NETJET_U 1
1233 #ifndef ISDN_CHIP_ICC
1234 #define ISDN_CHIP_ICC 1
1235 #endif
1236 #ifndef HISAX_UINTERFACE
1237 #define HISAX_UINTERFACE 1
1238 #endif
1239 #else
1240 #define CARD_NETJET_U 0
1241 #endif
1242
1243 #ifdef CONFIG_HISAX_ENTERNOW_PCI
1244 #define CARD_FN_ENTERNOW_PCI 1
1245 #endif
1246
1247 #define TEI_PER_CARD 1
1248
1249 /* L1 Debug */
1250 #define L1_DEB_WARN             0x01
1251 #define L1_DEB_INTSTAT          0x02
1252 #define L1_DEB_ISAC             0x04
1253 #define L1_DEB_ISAC_FIFO        0x08
1254 #define L1_DEB_HSCX             0x10
1255 #define L1_DEB_HSCX_FIFO        0x20
1256 #define L1_DEB_LAPD             0x40
1257 #define L1_DEB_IPAC             0x80
1258 #define L1_DEB_RECEIVE_FRAME    0x100
1259 #define L1_DEB_MONITOR          0x200
1260 #define DEB_DLOG_HEX            0x400
1261 #define DEB_DLOG_VERBOSE        0x800
1262
1263 #define L2FRAME_DEBUG
1264
1265 #ifdef L2FRAME_DEBUG
1266 extern void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir);
1267 #endif
1268
1269 #include "hisax_cfg.h"
1270
1271 void init_bcstate(struct IsdnCardState *cs, int bc);
1272
1273 void setstack_HiSax(struct PStack *st, struct IsdnCardState *cs);
1274 unsigned int random_ri(void);
1275 void HiSax_addlist(struct IsdnCardState *sp, struct PStack *st);
1276 void HiSax_rmlist(struct IsdnCardState *sp, struct PStack *st);
1277
1278 void setstack_l1_B(struct PStack *st);
1279
1280 void setstack_tei(struct PStack *st);
1281 void setstack_manager(struct PStack *st);
1282
1283 void setstack_isdnl2(struct PStack *st, char *debug_id);
1284 void releasestack_isdnl2(struct PStack *st);
1285 void setstack_transl2(struct PStack *st);
1286 void releasestack_transl2(struct PStack *st);
1287 void lli_writewakeup(struct PStack *st, int len);
1288
1289 void setstack_l3dc(struct PStack *st, struct Channel *chanp);
1290 void setstack_l3bc(struct PStack *st, struct Channel *chanp);
1291 void releasestack_isdnl3(struct PStack *st);
1292
1293 u_char *findie(u_char * p, int size, u_char ie, int wanted_set);
1294 int getcallref(u_char * p);
1295 int newcallref(void);
1296
1297 int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
1298 void FsmFree(struct Fsm *fsm);
1299 int FsmEvent(struct FsmInst *fi, int event, void *arg);
1300 void FsmChangeState(struct FsmInst *fi, int newstate);
1301 void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft);
1302 int FsmAddTimer(struct FsmTimer *ft, int millisec, int event,
1303         void *arg, int where);
1304 void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event,
1305         void *arg, int where);
1306 void FsmDelTimer(struct FsmTimer *ft, int where);
1307 int jiftime(char *s, long mark);
1308
1309 int HiSax_command(isdn_ctrl * ic);
1310 int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb);
1311 void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...);
1312 void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args);
1313 void HiSax_reportcard(int cardnr, int sel);
1314 int QuickHex(char *txt, u_char * p, int cnt);
1315 void LogFrame(struct IsdnCardState *cs, u_char * p, int size);
1316 void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir);
1317 void iecpy(u_char * dest, u_char * iestart, int ieoffset);
1318 #ifdef ISDN_CHIP_ISAC
1319 void setstack_isac(struct PStack *st, struct IsdnCardState *cs);
1320 #endif  /* ISDN_CHIP_ISAC */
1321 #endif  /* __KERNEL__ */
1322
1323 #define HZDELAY(jiffs) {int tout = jiffs; while (tout--) udelay(1000000/HZ);}
1324
1325 int ll_run(struct IsdnCardState *cs, int addfeatures);
1326 void ll_stop(struct IsdnCardState *cs);
1327 int CallcNew(void);
1328 void CallcFree(void);
1329 int CallcNewChan(struct IsdnCardState *cs);
1330 void CallcFreeChan(struct IsdnCardState *cs);
1331 int Isdnl1New(void);
1332 void Isdnl1Free(void);
1333 int Isdnl2New(void);
1334 void Isdnl2Free(void);
1335 int Isdnl3New(void);
1336 void Isdnl3Free(void);
1337 void init_tei(struct IsdnCardState *cs, int protocol);
1338 void release_tei(struct IsdnCardState *cs);
1339 char *HiSax_getrev(const char *revision);
1340 int TeiNew(void);
1341 void TeiFree(void);