drivers/net/ibm_emac/ibm_emac_phy.h

   1
   2 /*
   3  * ibm_emac_phy.h
   4  *
   5  *
   6  *      Benjamin Herrenschmidt <benh@kernel.crashing.org>
   7  *      February 2003
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  *  under  the terms of  the GNU General  Public License as published by the
  11  *  Free Software Foundation;  either version 2 of the  License, or (at your
  12  *  option) any later version.
  13  *
  14  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
  15  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  16  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  17  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
  18  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  20  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  22  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  *  You should have received a copy of the  GNU General Public License along
  26  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  27  *  675 Mass Ave, Cambridge, MA 02139, USA.
  28  *
  29  *
  30  * This file basically duplicates sungem_phy.{c,h} with different PHYs
  31  * supported. I'm looking into merging that in a single mii layer more
  32  * flexible than mii.c
  33  */
  34
  35 #ifndef _IBM_EMAC_PHY_H_
  36 #define _IBM_EMAC_PHY_H_
  37
  38 /*
  39  * PHY mode settings
  40  * Used for multi-mode capable PHYs
  41  */
  42 #define PHY_MODE_NA     0
  43 #define PHY_MODE_MII    1
  44 #define PHY_MODE_RMII   2
  45 #define PHY_MODE_SMII   3
  46 #define PHY_MODE_RGMII  4
  47 #define PHY_MODE_TBI    5
  48 #define PHY_MODE_GMII   6
  49 #define PHY_MODE_RTBI   7
  50 #define PHY_MODE_SGMII  8
  51
  52 /*
  53  * PHY specific registers/values
  54  */
  55
  56 /* CIS8201 */
  57 #define MII_CIS8201_EPCR        0x17
  58 #define EPCR_MODE_MASK          0x3000
  59 #define EPCR_GMII_MODE          0x0000
  60 #define EPCR_RGMII_MODE         0x1000
  61 #define EPCR_TBI_MODE           0x2000
  62 #define EPCR_RTBI_MODE          0x3000
  63
  64 struct mii_phy;
  65
  66 /* Operations supported by any kind of PHY */
  67 struct mii_phy_ops {
  68         int (*init) (struct mii_phy * phy);
  69         int (*suspend) (struct mii_phy * phy, int wol_options);
  70         int (*setup_aneg) (struct mii_phy * phy, u32 advertise);
  71         int (*setup_forced) (struct mii_phy * phy, int speed, int fd);
  72         int (*poll_link) (struct mii_phy * phy);
  73         int (*read_link) (struct mii_phy * phy);
  74 };
  75
  76 /* Structure used to statically define an mii/gii based PHY */
  77 struct mii_phy_def {
  78         u32 phy_id;             /* Concatenated ID1 << 16 | ID2 */
  79         u32 phy_id_mask;        /* Significant bits */
  80         u32 features;           /* Ethtool SUPPORTED_* defines */
  81         int magic_aneg;         /* Autoneg does all speed test for us */
  82         const char *name;
  83         const struct mii_phy_ops *ops;
  84 };
  85
  86 /* An instance of a PHY, partially borrowed from mii_if_info */
  87 struct mii_phy {
  88         struct mii_phy_def *def;
  89         int advertising;
  90         int mii_id;
  91
  92         /* 1: autoneg enabled, 0: disabled */
  93         int autoneg;
  94
  95         /* forced speed & duplex (no autoneg)
  96          * partner speed & duplex & pause (autoneg)
  97          */
  98         int speed;
  99         int duplex;
 100         int pause;
 101
 102         /* PHY mode - if needed */
 103         int mode;
 104
 105         /* Provided by host chip */
 106         struct net_device *dev;
 107         int (*mdio_read) (struct net_device * dev, int mii_id, int reg);
 108         void (*mdio_write) (struct net_device * dev, int mii_id, int reg,
 109                             int val);
 110 };
 111
 112 /* Pass in a struct mii_phy with dev, mdio_read and mdio_write
 113  * filled, the remaining fields will be filled on return
 114  */
 115 extern int mii_phy_probe(struct mii_phy *phy, int mii_id);
 116
 117 static inline int __phy_read(struct mii_phy *phy, int id, int reg)
 118 {
 119         return phy->mdio_read(phy->dev, id, reg);
 120 }
 121
 122 static inline void __phy_write(struct mii_phy *phy, int id, int reg, int val)
 123 {
 124         phy->mdio_write(phy->dev, id, reg, val);
 125 }
 126
 127 static inline int phy_read(struct mii_phy *phy, int reg)
 128 {
 129         return phy->mdio_read(phy->dev, phy->mii_id, reg);
 130 }
 131
 132 static inline void phy_write(struct mii_phy *phy, int reg, int val)
 133 {
 134         phy->mdio_write(phy->dev, phy->mii_id, reg, val);
 135 }
 136
 137 #endif                          /* _IBM_EMAC_PHY_H_ */