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[TG3]: Add tagged status support.
[linux-2.6/verdex.git] / drivers / net / irda / au1k_ir.c
blobe6b1985767c2f85498b87926a209bc27f62e3151
1 /*
2 * Alchemy Semi Au1000 IrDA driver
3 *
4 * Copyright 2001 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc.
6 * ppopov@mvista.com or source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21 #include <linux/config.h>
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/init.h>
25 #include <linux/errno.h>
26 #include <linux/netdevice.h>
27 #include <linux/slab.h>
28 #include <linux/rtnetlink.h>
29 #include <linux/interrupt.h>
30 #include <linux/pm.h>
31 #include <linux/bitops.h>
32
33 #include <asm/irq.h>
34 #include <asm/io.h>
35 #include <asm/au1000.h>
36 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100)
37 #include <asm/pb1000.h>
38 #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
39 #include <asm/db1x00.h>
40 #else
41 #error au1k_ir: unsupported board
42 #endif
43
44 #include <net/irda/irda.h>
45 #include <net/irda/irmod.h>
46 #include <net/irda/wrapper.h>
47 #include <net/irda/irda_device.h>
48 #include "au1000_ircc.h"
49
50 static int au1k_irda_net_init(struct net_device *);
51 static int au1k_irda_start(struct net_device *);
52 static int au1k_irda_stop(struct net_device *dev);
53 static int au1k_irda_hard_xmit(struct sk_buff *, struct net_device *);
54 static int au1k_irda_rx(struct net_device *);
55 static void au1k_irda_interrupt(int, void *, struct pt_regs *);
56 static void au1k_tx_timeout(struct net_device *);
57 static struct net_device_stats *au1k_irda_stats(struct net_device *);
58 static int au1k_irda_ioctl(struct net_device *, struct ifreq *, int);
59 static int au1k_irda_set_speed(struct net_device *dev, int speed);
60
61 static void *dma_alloc(size_t, dma_addr_t *);
62 static void dma_free(void *, size_t);
63
64 static int qos_mtt_bits = 0x07; /* 1 ms or more */
65 static struct net_device *ir_devs[NUM_IR_IFF];
66 static char version[] __devinitdata =
67 "au1k_ircc:1.2 ppopov@mvista.com\n";
68
69 #define RUN_AT(x) (jiffies + (x))
70
71 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
72 static BCSR * const bcsr = (BCSR *)0xAE000000;
73 #endif
74
75 static DEFINE_SPINLOCK(ir_lock);
76
77 /*
78 * IrDA peripheral bug. You have to read the register
79 * twice to get the right value.
80 */
81 u32 read_ir_reg(u32 addr)
82 {
83 readl(addr);
84 return readl(addr);
85 }
86
87
88 /*
89 * Buffer allocation/deallocation routines. The buffer descriptor returned
90 * has the virtual and dma address of a buffer suitable for
91 * both, receive and transmit operations.
92 */
93 static db_dest_t *GetFreeDB(struct au1k_private *aup)
94 {
95 db_dest_t *pDB;
96 pDB = aup->pDBfree;
97
98 if (pDB) {
99 aup->pDBfree = pDB->pnext;
100 }
101 return pDB;
102 }
103
104 static void ReleaseDB(struct au1k_private *aup, db_dest_t *pDB)
105 {
106 db_dest_t *pDBfree = aup->pDBfree;
107 if (pDBfree)
108 pDBfree->pnext = pDB;
109 aup->pDBfree = pDB;
110 }
111
112
113 /*
114 DMA memory allocation, derived from pci_alloc_consistent.
115 However, the Au1000 data cache is coherent (when programmed
116 so), therefore we return KSEG0 address, not KSEG1.
117 */
118 static void *dma_alloc(size_t size, dma_addr_t * dma_handle)
119 {
120 void *ret;
121 int gfp = GFP_ATOMIC | GFP_DMA;
122
123 ret = (void *) __get_free_pages(gfp, get_order(size));
124
125 if (ret != NULL) {
126 memset(ret, 0, size);
127 *dma_handle = virt_to_bus(ret);
128 ret = (void *)KSEG0ADDR(ret);
129 }
130 return ret;
131 }
132
133
134 static void dma_free(void *vaddr, size_t size)
135 {
136 vaddr = (void *)KSEG0ADDR(vaddr);
137 free_pages((unsigned long) vaddr, get_order(size));
138 }
139
140
141 static void
142 setup_hw_rings(struct au1k_private *aup, u32 rx_base, u32 tx_base)
143 {
144 int i;
145 for (i=0; i<NUM_IR_DESC; i++) {
146 aup->rx_ring[i] = (volatile ring_dest_t *)
147 (rx_base + sizeof(ring_dest_t)*i);
148 }
149 for (i=0; i<NUM_IR_DESC; i++) {
150 aup->tx_ring[i] = (volatile ring_dest_t *)
151 (tx_base + sizeof(ring_dest_t)*i);
152 }
153 }
154
155 static int au1k_irda_init(void)
156 {
157 static unsigned version_printed = 0;
158 struct au1k_private *aup;
159 struct net_device *dev;
160 int err;
161
162 if (version_printed++ == 0) printk(version);
163
164 dev = alloc_irdadev(sizeof(struct au1k_private));
165 if (!dev)
166 return -ENOMEM;
167
168 dev->irq = AU1000_IRDA_RX_INT; /* TX has its own interrupt */
169 err = au1k_irda_net_init(dev);
170 if (err)
171 goto out;
172 err = register_netdev(dev);
173 if (err)
174 goto out1;
175 ir_devs[0] = dev;
176 printk(KERN_INFO "IrDA: Registered device %s\n", dev->name);
177 return 0;
178
179 out1:
180 aup = netdev_priv(dev);
181 dma_free((void *)aup->db[0].vaddr,
182 MAX_BUF_SIZE * 2*NUM_IR_DESC);
183 dma_free((void *)aup->rx_ring[0],
184 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
185 kfree(aup->rx_buff.head);
186 out:
187 free_netdev(dev);
188 return err;
189 }
190
191 static int au1k_irda_init_iobuf(iobuff_t *io, int size)
192 {
193 io->head = kmalloc(size, GFP_KERNEL);
194 if (io->head != NULL) {
195 io->truesize = size;
196 io->in_frame = FALSE;
197 io->state = OUTSIDE_FRAME;
198 io->data = io->head;
199 }
200 return io->head ? 0 : -ENOMEM;
201 }
202
203 static int au1k_irda_net_init(struct net_device *dev)
204 {
205 struct au1k_private *aup = netdev_priv(dev);
206 int i, retval = 0, err;
207 db_dest_t *pDB, *pDBfree;
208 dma_addr_t temp;
209
210 err = au1k_irda_init_iobuf(&aup->rx_buff, 14384);
211 if (err)
212 goto out1;
213
214 dev->open = au1k_irda_start;
215 dev->hard_start_xmit = au1k_irda_hard_xmit;
216 dev->stop = au1k_irda_stop;
217 dev->get_stats = au1k_irda_stats;
218 dev->do_ioctl = au1k_irda_ioctl;
219 dev->tx_timeout = au1k_tx_timeout;
220
221 irda_init_max_qos_capabilies(&aup->qos);
222
223 /* The only value we must override it the baudrate */
224 aup->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
225 IR_115200|IR_576000 |(IR_4000000 << 8);
226
227 aup->qos.min_turn_time.bits = qos_mtt_bits;
228 irda_qos_bits_to_value(&aup->qos);
229
230 retval = -ENOMEM;
231
232 /* Tx ring follows rx ring + 512 bytes */
233 /* we need a 1k aligned buffer */
234 aup->rx_ring[0] = (ring_dest_t *)
235 dma_alloc(2*MAX_NUM_IR_DESC*(sizeof(ring_dest_t)), &temp);
236 if (!aup->rx_ring[0])
237 goto out2;
238
239 /* allocate the data buffers */
240 aup->db[0].vaddr =
241 (void *)dma_alloc(MAX_BUF_SIZE * 2*NUM_IR_DESC, &temp);
242 if (!aup->db[0].vaddr)
243 goto out3;
244
245 setup_hw_rings(aup, (u32)aup->rx_ring[0], (u32)aup->rx_ring[0] + 512);
246
247 pDBfree = NULL;
248 pDB = aup->db;
249 for (i=0; i<(2*NUM_IR_DESC); i++) {
250 pDB->pnext = pDBfree;
251 pDBfree = pDB;
252 pDB->vaddr =
253 (u32 *)((unsigned)aup->db[0].vaddr + MAX_BUF_SIZE*i);
254 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
255 pDB++;
256 }
257 aup->pDBfree = pDBfree;
258
259 /* attach a data buffer to each descriptor */
260 for (i=0; i<NUM_IR_DESC; i++) {
261 pDB = GetFreeDB(aup);
262 if (!pDB) goto out;
263 aup->rx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
264 aup->rx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
265 aup->rx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
266 aup->rx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
267 aup->rx_db_inuse[i] = pDB;
268 }
269 for (i=0; i<NUM_IR_DESC; i++) {
270 pDB = GetFreeDB(aup);
271 if (!pDB) goto out;
272 aup->tx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
273 aup->tx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
274 aup->tx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
275 aup->tx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
276 aup->tx_ring[i]->count_0 = 0;
277 aup->tx_ring[i]->count_1 = 0;
278 aup->tx_ring[i]->flags = 0;
279 aup->tx_db_inuse[i] = pDB;
280 }
281
282 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
283 /* power on */
284 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
285 bcsr->resets |= BCSR_RESETS_IRDA_MODE_FULL;
286 au_sync();
287 #endif
288
289 return 0;
290
291 out3:
292 dma_free((void *)aup->rx_ring[0],
293 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
294 out2:
295 kfree(aup->rx_buff.head);
296 out1:
297 printk(KERN_ERR "au1k_init_module failed. Returns %d\n", retval);
298 return retval;
299 }
300
301
302 static int au1k_init(struct net_device *dev)
303 {
304 struct au1k_private *aup = netdev_priv(dev);
305 int i;
306 u32 control;
307 u32 ring_address;
308
309 /* bring the device out of reset */
310 control = 0xe; /* coherent, clock enable, one half system clock */
311
312 #ifndef CONFIG_CPU_LITTLE_ENDIAN
313 control |= 1;
314 #endif
315 aup->tx_head = 0;
316 aup->tx_tail = 0;
317 aup->rx_head = 0;
318
319 for (i=0; i<NUM_IR_DESC; i++) {
320 aup->rx_ring[i]->flags = AU_OWN;
321 }
322
323 writel(control, IR_INTERFACE_CONFIG);
324 au_sync_delay(10);
325
326 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable PHY */
327 au_sync_delay(1);
328
329 writel(MAX_BUF_SIZE, IR_MAX_PKT_LEN);
330
331 ring_address = (u32)virt_to_phys((void *)aup->rx_ring[0]);
332 writel(ring_address >> 26, IR_RING_BASE_ADDR_H);
333 writel((ring_address >> 10) & 0xffff, IR_RING_BASE_ADDR_L);
334
335 writel(RING_SIZE_64<<8 | RING_SIZE_64<<12, IR_RING_SIZE);
336
337 writel(1<<2 | IR_ONE_PIN, IR_CONFIG_2); /* 48MHz */
338 writel(0, IR_RING_ADDR_CMPR);
339
340 au1k_irda_set_speed(dev, 9600);
341 return 0;
342 }
343
344 static int au1k_irda_start(struct net_device *dev)
345 {
346 int retval;
347 char hwname[32];
348 struct au1k_private *aup = netdev_priv(dev);
349
350 if ((retval = au1k_init(dev))) {
351 printk(KERN_ERR "%s: error in au1k_init\n", dev->name);
352 return retval;
353 }
354
355 if ((retval = request_irq(AU1000_IRDA_TX_INT, &au1k_irda_interrupt,
356 0, dev->name, dev))) {
357 printk(KERN_ERR "%s: unable to get IRQ %d\n",
358 dev->name, dev->irq);
359 return retval;
360 }
361 if ((retval = request_irq(AU1000_IRDA_RX_INT, &au1k_irda_interrupt,
362 0, dev->name, dev))) {
363 free_irq(AU1000_IRDA_TX_INT, dev);
364 printk(KERN_ERR "%s: unable to get IRQ %d\n",
365 dev->name, dev->irq);
366 return retval;
367 }
368
369 /* Give self a hardware name */
370 sprintf(hwname, "Au1000 SIR/FIR");
371 aup->irlap = irlap_open(dev, &aup->qos, hwname);
372 netif_start_queue(dev);
373
374 writel(read_ir_reg(IR_CONFIG_2) | 1<<8, IR_CONFIG_2); /* int enable */
375
376 aup->timer.expires = RUN_AT((3*HZ));
377 aup->timer.data = (unsigned long)dev;
378 return 0;
379 }
380
381 static int au1k_irda_stop(struct net_device *dev)
382 {
383 struct au1k_private *aup = netdev_priv(dev);
384
385 /* disable interrupts */
386 writel(read_ir_reg(IR_CONFIG_2) & ~(1<<8), IR_CONFIG_2);
387 writel(0, IR_CONFIG_1);
388 writel(0, IR_INTERFACE_CONFIG); /* disable clock */
389 au_sync();
390
391 if (aup->irlap) {
392 irlap_close(aup->irlap);
393 aup->irlap = NULL;
394 }
395
396 netif_stop_queue(dev);
397 del_timer(&aup->timer);
398
399 /* disable the interrupt */
400 free_irq(AU1000_IRDA_TX_INT, dev);
401 free_irq(AU1000_IRDA_RX_INT, dev);
402 return 0;
403 }
404
405 static void __exit au1k_irda_exit(void)
406 {
407 struct net_device *dev = ir_devs[0];
408 struct au1k_private *aup = netdev_priv(dev);
409
410 unregister_netdev(dev);
411
412 dma_free((void *)aup->db[0].vaddr,
413 MAX_BUF_SIZE * 2*NUM_IR_DESC);
414 dma_free((void *)aup->rx_ring[0],
415 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
416 kfree(aup->rx_buff.head);
417 free_netdev(dev);
418 }
419
420
421 static inline void
422 update_tx_stats(struct net_device *dev, u32 status, u32 pkt_len)
423 {
424 struct au1k_private *aup = netdev_priv(dev);
425 struct net_device_stats *ps = &aup->stats;
426
427 ps->tx_packets++;
428 ps->tx_bytes += pkt_len;
429
430 if (status & IR_TX_ERROR) {
431 ps->tx_errors++;
432 ps->tx_aborted_errors++;
433 }
434 }
435
436
437 static void au1k_tx_ack(struct net_device *dev)
438 {
439 struct au1k_private *aup = netdev_priv(dev);
440 volatile ring_dest_t *ptxd;
441
442 ptxd = aup->tx_ring[aup->tx_tail];
443 while (!(ptxd->flags & AU_OWN) && (aup->tx_tail != aup->tx_head)) {
444 update_tx_stats(dev, ptxd->flags,
445 ptxd->count_1<<8 | ptxd->count_0);
446 ptxd->count_0 = 0;
447 ptxd->count_1 = 0;
448 au_sync();
449
450 aup->tx_tail = (aup->tx_tail + 1) & (NUM_IR_DESC - 1);
451 ptxd = aup->tx_ring[aup->tx_tail];
452
453 if (aup->tx_full) {
454 aup->tx_full = 0;
455 netif_wake_queue(dev);
456 }
457 }
458
459 if (aup->tx_tail == aup->tx_head) {
460 if (aup->newspeed) {
461 au1k_irda_set_speed(dev, aup->newspeed);
462 aup->newspeed = 0;
463 }
464 else {
465 writel(read_ir_reg(IR_CONFIG_1) & ~IR_TX_ENABLE,
466 IR_CONFIG_1);
467 au_sync();
468 writel(read_ir_reg(IR_CONFIG_1) | IR_RX_ENABLE,
469 IR_CONFIG_1);
470 writel(0, IR_RING_PROMPT);
471 au_sync();
472 }
473 }
474 }
475
476
477 /*
478 * Au1000 transmit routine.
479 */
480 static int au1k_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
481 {
482 struct au1k_private *aup = netdev_priv(dev);
483 int speed = irda_get_next_speed(skb);
484 volatile ring_dest_t *ptxd;
485 u32 len;
486
487 u32 flags;
488 db_dest_t *pDB;
489
490 if (speed != aup->speed && speed != -1) {
491 aup->newspeed = speed;
492 }
493
494 if ((skb->len == 0) && (aup->newspeed)) {
495 if (aup->tx_tail == aup->tx_head) {
496 au1k_irda_set_speed(dev, speed);
497 aup->newspeed = 0;
498 }
499 dev_kfree_skb(skb);
500 return 0;
501 }
502
503 ptxd = aup->tx_ring[aup->tx_head];
504 flags = ptxd->flags;
505
506 if (flags & AU_OWN) {
507 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
508 netif_stop_queue(dev);
509 aup->tx_full = 1;
510 return 1;
511 }
512 else if (((aup->tx_head + 1) & (NUM_IR_DESC - 1)) == aup->tx_tail) {
513 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
514 netif_stop_queue(dev);
515 aup->tx_full = 1;
516 return 1;
517 }
518
519 pDB = aup->tx_db_inuse[aup->tx_head];
520
521 #if 0
522 if (read_ir_reg(IR_RX_BYTE_CNT) != 0) {
523 printk("tx warning: rx byte cnt %x\n",
524 read_ir_reg(IR_RX_BYTE_CNT));
525 }
526 #endif
527
528 if (aup->speed == 4000000) {
529 /* FIR */
530 memcpy((void *)pDB->vaddr, skb->data, skb->len);
531 ptxd->count_0 = skb->len & 0xff;
532 ptxd->count_1 = (skb->len >> 8) & 0xff;
533
534 }
535 else {
536 /* SIR */
537 len = async_wrap_skb(skb, (u8 *)pDB->vaddr, MAX_BUF_SIZE);
538 ptxd->count_0 = len & 0xff;
539 ptxd->count_1 = (len >> 8) & 0xff;
540 ptxd->flags |= IR_DIS_CRC;
541 au_writel(au_readl(0xae00000c) & ~(1<<13), 0xae00000c);
542 }
543 ptxd->flags |= AU_OWN;
544 au_sync();
545
546 writel(read_ir_reg(IR_CONFIG_1) | IR_TX_ENABLE, IR_CONFIG_1);
547 writel(0, IR_RING_PROMPT);
548 au_sync();
549
550 dev_kfree_skb(skb);
551 aup->tx_head = (aup->tx_head + 1) & (NUM_IR_DESC - 1);
552 dev->trans_start = jiffies;
553 return 0;
554 }
555
556
557 static inline void
558 update_rx_stats(struct net_device *dev, u32 status, u32 count)
559 {
560 struct au1k_private *aup = netdev_priv(dev);
561 struct net_device_stats *ps = &aup->stats;
562
563 ps->rx_packets++;
564
565 if (status & IR_RX_ERROR) {
566 ps->rx_errors++;
567 if (status & (IR_PHY_ERROR|IR_FIFO_OVER))
568 ps->rx_missed_errors++;
569 if (status & IR_MAX_LEN)
570 ps->rx_length_errors++;
571 if (status & IR_CRC_ERROR)
572 ps->rx_crc_errors++;
573 }
574 else
575 ps->rx_bytes += count;
576 }
577
578 /*
579 * Au1000 receive routine.
580 */
581 static int au1k_irda_rx(struct net_device *dev)
582 {
583 struct au1k_private *aup = netdev_priv(dev);
584 struct sk_buff *skb;
585 volatile ring_dest_t *prxd;
586 u32 flags, count;
587 db_dest_t *pDB;
588
589 prxd = aup->rx_ring[aup->rx_head];
590 flags = prxd->flags;
591
592 while (!(flags & AU_OWN)) {
593 pDB = aup->rx_db_inuse[aup->rx_head];
594 count = prxd->count_1<<8 | prxd->count_0;
595 if (!(flags & IR_RX_ERROR)) {
596 /* good frame */
597 update_rx_stats(dev, flags, count);
598 skb=alloc_skb(count+1,GFP_ATOMIC);
599 if (skb == NULL) {
600 aup->stats.rx_dropped++;
601 continue;
602 }
603 skb_reserve(skb, 1);
604 if (aup->speed == 4000000)
605 skb_put(skb, count);
606 else
607 skb_put(skb, count-2);
608 memcpy(skb->data, (void *)pDB->vaddr, count-2);
609 skb->dev = dev;
610 skb->mac.raw = skb->data;
611 skb->protocol = htons(ETH_P_IRDA);
612 netif_rx(skb);
613 prxd->count_0 = 0;
614 prxd->count_1 = 0;
615 }
616 prxd->flags |= AU_OWN;
617 aup->rx_head = (aup->rx_head + 1) & (NUM_IR_DESC - 1);
618 writel(0, IR_RING_PROMPT);
619 au_sync();
620
621 /* next descriptor */
622 prxd = aup->rx_ring[aup->rx_head];
623 flags = prxd->flags;
624 dev->last_rx = jiffies;
625
626 }
627 return 0;
628 }
629
630
631 void au1k_irda_interrupt(int irq, void *dev_id, struct pt_regs *regs)
632 {
633 struct net_device *dev = (struct net_device *) dev_id;
634
635 if (dev == NULL) {
636 printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
637 return;
638 }
639
640 writel(0, IR_INT_CLEAR); /* ack irda interrupts */
641
642 au1k_irda_rx(dev);
643 au1k_tx_ack(dev);
644 }
645
646
647 /*
648 * The Tx ring has been full longer than the watchdog timeout
649 * value. The transmitter must be hung?
650 */
651 static void au1k_tx_timeout(struct net_device *dev)
652 {
653 u32 speed;
654 struct au1k_private *aup = netdev_priv(dev);
655
656 printk(KERN_ERR "%s: tx timeout\n", dev->name);
657 speed = aup->speed;
658 aup->speed = 0;
659 au1k_irda_set_speed(dev, speed);
660 aup->tx_full = 0;
661 netif_wake_queue(dev);
662 }
663
664
665 /*
666 * Set the IrDA communications speed.
667 */
668 static int
669 au1k_irda_set_speed(struct net_device *dev, int speed)
670 {
671 unsigned long flags;
672 struct au1k_private *aup = netdev_priv(dev);
673 u32 control;
674 int ret = 0, timeout = 10, i;
675 volatile ring_dest_t *ptxd;
676 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
677 unsigned long irda_resets;
678 #endif
679
680 if (speed == aup->speed)
681 return ret;
682
683 spin_lock_irqsave(&ir_lock, flags);
684
685 /* disable PHY first */
686 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE);
687
688 /* disable RX/TX */
689 writel(read_ir_reg(IR_CONFIG_1) & ~(IR_RX_ENABLE|IR_TX_ENABLE),
690 IR_CONFIG_1);
691 au_sync_delay(1);
692 while (read_ir_reg(IR_ENABLE) & (IR_RX_STATUS | IR_TX_STATUS)) {
693 mdelay(1);
694 if (!timeout--) {
695 printk(KERN_ERR "%s: rx/tx disable timeout\n",
696 dev->name);
697 break;
698 }
699 }
700
701 /* disable DMA */
702 writel(read_ir_reg(IR_CONFIG_1) & ~IR_DMA_ENABLE, IR_CONFIG_1);
703 au_sync_delay(1);
704
705 /*
706 * After we disable tx/rx. the index pointers
707 * go back to zero.
708 */
709 aup->tx_head = aup->tx_tail = aup->rx_head = 0;
710 for (i=0; i<NUM_IR_DESC; i++) {
711 ptxd = aup->tx_ring[i];
712 ptxd->flags = 0;
713 ptxd->count_0 = 0;
714 ptxd->count_1 = 0;
715 }
716
717 for (i=0; i<NUM_IR_DESC; i++) {
718 ptxd = aup->rx_ring[i];
719 ptxd->count_0 = 0;
720 ptxd->count_1 = 0;
721 ptxd->flags = AU_OWN;
722 }
723
724 if (speed == 4000000) {
725 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
726 bcsr->resets |= BCSR_RESETS_FIR_SEL;
727 #else /* Pb1000 and Pb1100 */
728 writel(1<<13, CPLD_AUX1);
729 #endif
730 }
731 else {
732 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
733 bcsr->resets &= ~BCSR_RESETS_FIR_SEL;
734 #else /* Pb1000 and Pb1100 */
735 writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1);
736 #endif
737 }
738
739 switch (speed) {
740 case 9600:
741 writel(11<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
742 writel(IR_SIR_MODE, IR_CONFIG_1);
743 break;
744 case 19200:
745 writel(5<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
746 writel(IR_SIR_MODE, IR_CONFIG_1);
747 break;
748 case 38400:
749 writel(2<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
750 writel(IR_SIR_MODE, IR_CONFIG_1);
751 break;
752 case 57600:
753 writel(1<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
754 writel(IR_SIR_MODE, IR_CONFIG_1);
755 break;
756 case 115200:
757 writel(12<<5, IR_WRITE_PHY_CONFIG);
758 writel(IR_SIR_MODE, IR_CONFIG_1);
759 break;
760 case 4000000:
761 writel(0xF, IR_WRITE_PHY_CONFIG);
762 writel(IR_FIR|IR_DMA_ENABLE|IR_RX_ENABLE, IR_CONFIG_1);
763 break;
764 default:
765 printk(KERN_ERR "%s unsupported speed %x\n", dev->name, speed);
766 ret = -EINVAL;
767 break;
768 }
769
770 aup->speed = speed;
771 writel(read_ir_reg(IR_ENABLE) | 0x8000, IR_ENABLE);
772 au_sync();
773
774 control = read_ir_reg(IR_ENABLE);
775 writel(0, IR_RING_PROMPT);
776 au_sync();
777
778 if (control & (1<<14)) {
779 printk(KERN_ERR "%s: configuration error\n", dev->name);
780 }
781 else {
782 if (control & (1<<11))
783 printk(KERN_DEBUG "%s Valid SIR config\n", dev->name);
784 if (control & (1<<12))
785 printk(KERN_DEBUG "%s Valid MIR config\n", dev->name);
786 if (control & (1<<13))
787 printk(KERN_DEBUG "%s Valid FIR config\n", dev->name);
788 if (control & (1<<10))
789 printk(KERN_DEBUG "%s TX enabled\n", dev->name);
790 if (control & (1<<9))
791 printk(KERN_DEBUG "%s RX enabled\n", dev->name);
792 }
793
794 spin_unlock_irqrestore(&ir_lock, flags);
795 return ret;
796 }
797
798 static int
799 au1k_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
800 {
801 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
802 struct au1k_private *aup = netdev_priv(dev);
803 int ret = -EOPNOTSUPP;
804
805 switch (cmd) {
806 case SIOCSBANDWIDTH:
807 if (capable(CAP_NET_ADMIN)) {
808 /*
809 * We are unable to set the speed if the
810 * device is not running.
811 */
812 if (aup->open)
813 ret = au1k_irda_set_speed(dev,
814 rq->ifr_baudrate);
815 else {
816 printk(KERN_ERR "%s ioctl: !netif_running\n",
817 dev->name);
818 ret = 0;
819 }
820 }
821 break;
822
823 case SIOCSMEDIABUSY:
824 ret = -EPERM;
825 if (capable(CAP_NET_ADMIN)) {
826 irda_device_set_media_busy(dev, TRUE);
827 ret = 0;
828 }
829 break;
830
831 case SIOCGRECEIVING:
832 rq->ifr_receiving = 0;
833 break;
834 default:
835 break;
836 }
837 return ret;
838 }
839
840
841 static struct net_device_stats *au1k_irda_stats(struct net_device *dev)
842 {
843 struct au1k_private *aup = netdev_priv(dev);
844 return &aup->stats;
845 }
846
847 MODULE_AUTHOR("Pete Popov <ppopov@mvista.com>");
848 MODULE_DESCRIPTION("Au1000 IrDA Device Driver");
849
850 module_init(au1k_irda_init);
851 module_exit(au1k_irda_exit);
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