include/asm-arm/arch-s3c2410/system.h

   1 /* linux/include/asm-arm/arch-s3c2410/system.h
   2  *
   3  * (c) 2003 Simtec Electronics
   4  *  Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C2410 - System function defines and includes
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Changelog:
  13  *  12-May-2003 BJD  Created file
  14  *  14-May-2003 BJD  Removed idle to aid debugging
  15  *  12-Jun-2003 BJD  Added reset via watchdog
  16  *  04-Sep-2003 BJD  Moved to v2.6
  17  *  28-Oct-2004 BJD  Added over-ride for idle, and fixed reset panic()
  18  */
  19
  20 #include <asm/hardware.h>
  21 #include <asm/io.h>
  22
  23 #include <asm/arch/map.h>
  24 #include <asm/arch/idle.h>
  25
  26 #include <asm/arch/regs-watchdog.h>
  27 #include <asm/arch/regs-clock.h>
  28
  29 void (*s3c24xx_idle)(void);
  30
  31 void s3c24xx_default_idle(void)
  32 {
  33         void __iomem *reg = S3C2410_CLKCON;
  34         unsigned long tmp;
  35         int i;
  36
  37         /* idle the system by using the idle mode which will wait for an
  38          * interrupt to happen before restarting the system.
  39          */
  40
  41         /* Warning: going into idle state upsets jtag scanning */
  42
  43         __raw_writel(__raw_readl(reg) | (1<<2), reg);
  44
  45         /* the samsung port seems to do a loop and then unset idle.. */
  46         for (i = 0; i < 50; i++) {
  47                 tmp += __raw_readl(reg); /* ensure loop not optimised out */
  48         }
  49
  50         /* this bit is not cleared on re-start... */
  51
  52         __raw_writel(__raw_readl(reg) & ~(1<<2), reg);
  53 }
  54
  55 static void arch_idle(void)
  56 {
  57         if (s3c24xx_idle != NULL)
  58                 (s3c24xx_idle)();
  59         else
  60                 s3c24xx_default_idle();
  61 }
  62
  63
  64 static void
  65 arch_reset(char mode)
  66 {
  67         if (mode == 's') {
  68                 cpu_reset(0);
  69         }
  70
  71         printk("arch_reset: attempting watchdog reset\n");
  72
  73         __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
  74
  75         /* put initial values into count and data */
  76         __raw_writel(0x100, S3C2410_WTCNT);
  77         __raw_writel(0x100, S3C2410_WTDAT);
  78
  79         /* set the watchdog to go and reset... */
  80         __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
  81                      S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
  82
  83         /* wait for reset to assert... */
  84         mdelay(5000);
  85
  86         printk(KERN_ERR "Watchdog reset failed to assert reset\n");
  87
  88         /* we'll take a jump through zero as a poor second */
  89         cpu_reset(0);
  90 }