include/asm-ppc64/page.h

   1 #ifndef _PPC64_PAGE_H
   2 #define _PPC64_PAGE_H
   3
   4 /*
   5  * Copyright (C) 2001 PPC64 Team, IBM Corp
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 #include <linux/config.h>
  14
  15 #ifdef __ASSEMBLY__
  16   #define ASM_CONST(x) x
  17 #else
  18   #define __ASM_CONST(x) x##UL
  19   #define ASM_CONST(x) __ASM_CONST(x)
  20 #endif
  21
  22 /* PAGE_SHIFT determines the page size */
  23 #define PAGE_SHIFT      12
  24 #define PAGE_SIZE       (ASM_CONST(1) << PAGE_SHIFT)
  25 #define PAGE_MASK       (~(PAGE_SIZE-1))
  26
  27 #define SID_SHIFT       28
  28 #define SID_MASK        0xfffffffffUL
  29 #define ESID_MASK       0xfffffffff0000000UL
  30 #define GET_ESID(x)     (((x) >> SID_SHIFT) & SID_MASK)
  31
  32 #define HPAGE_SHIFT     24
  33 #define HPAGE_SIZE      ((1UL) << HPAGE_SHIFT)
  34 #define HPAGE_MASK      (~(HPAGE_SIZE - 1))
  35
  36 #ifdef CONFIG_HUGETLB_PAGE
  37
  38 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
  39
  40 /* For 64-bit processes the hugepage range is 1T-1.5T */
  41 #define TASK_HPAGE_BASE ASM_CONST(0x0000010000000000)
  42 #define TASK_HPAGE_END  ASM_CONST(0x0000018000000000)
  43
  44 #define LOW_ESID_MASK(addr, len)        (((1U << (GET_ESID(addr+len-1)+1)) \
  45                                         - (1U << GET_ESID(addr))) & 0xffff)
  46
  47 #define ARCH_HAS_HUGEPAGE_ONLY_RANGE
  48 #define ARCH_HAS_PREPARE_HUGEPAGE_RANGE
  49
  50 #define touches_hugepage_low_range(mm, addr, len) \
  51         (LOW_ESID_MASK((addr), (len)) & mm->context.htlb_segs)
  52 #define touches_hugepage_high_range(addr, len) \
  53         (((addr) > (TASK_HPAGE_BASE-(len))) && ((addr) < TASK_HPAGE_END))
  54
  55 #define __within_hugepage_low_range(addr, len, segmask) \
  56         ((LOW_ESID_MASK((addr), (len)) | (segmask)) == (segmask))
  57 #define within_hugepage_low_range(addr, len) \
  58         __within_hugepage_low_range((addr), (len), \
  59                                     current->mm->context.htlb_segs)
  60 #define within_hugepage_high_range(addr, len) (((addr) >= TASK_HPAGE_BASE) \
  61           && ((addr)+(len) <= TASK_HPAGE_END) && ((addr)+(len) >= (addr)))
  62
  63 #define is_hugepage_only_range(mm, addr, len) \
  64         (touches_hugepage_high_range((addr), (len)) || \
  65           touches_hugepage_low_range((mm), (addr), (len)))
  66 #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
  67
  68 #define in_hugepage_area(context, addr) \
  69         (cpu_has_feature(CPU_FTR_16M_PAGE) && \
  70          ( (((addr) >= TASK_HPAGE_BASE) && ((addr) < TASK_HPAGE_END)) || \
  71            ( ((addr) < 0x100000000L) && \
  72              ((1 << GET_ESID(addr)) & (context).htlb_segs) ) ) )
  73
  74 #else /* !CONFIG_HUGETLB_PAGE */
  75
  76 #define in_hugepage_area(mm, addr)      0
  77
  78 #endif /* !CONFIG_HUGETLB_PAGE */
  79
  80 /* align addr on a size boundary - adjust address up/down if needed */
  81 #define _ALIGN_UP(addr,size)    (((addr)+((size)-1))&(~((size)-1)))
  82 #define _ALIGN_DOWN(addr,size)  ((addr)&(~((size)-1)))
  83
  84 /* align addr on a size boundary - adjust address up if needed */
  85 #define _ALIGN(addr,size)     _ALIGN_UP(addr,size)
  86
  87 /* to align the pointer to the (next) page boundary */
  88 #define PAGE_ALIGN(addr)        _ALIGN(addr, PAGE_SIZE)
  89
  90 #ifdef __KERNEL__
  91 #ifndef __ASSEMBLY__
  92 #include <asm/cache.h>
  93
  94 #undef STRICT_MM_TYPECHECKS
  95
  96 #define REGION_SIZE   4UL
  97 #define REGION_SHIFT  60UL
  98 #define REGION_MASK   (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
  99
 100 static __inline__ void clear_page(void *addr)
 101 {
 102         unsigned long lines, line_size;
 103
 104         line_size = ppc64_caches.dline_size;
 105         lines = ppc64_caches.dlines_per_page;
 106
 107         __asm__ __volatile__(
 108         "mtctr          %1      # clear_page\n\
 109 1:      dcbz    0,%0\n\
 110         add     %0,%0,%3\n\
 111         bdnz+   1b"
 112         : "=r" (addr)
 113         : "r" (lines), "0" (addr), "r" (line_size)
 114         : "ctr", "memory");
 115 }
 116
 117 extern void copy_page(void *to, void *from);
 118 struct page;
 119 extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
 120 extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *p);
 121
 122 #ifdef STRICT_MM_TYPECHECKS
 123 /*
 124  * These are used to make use of C type-checking.
 125  * Entries in the pte table are 64b, while entries in the pgd & pmd are 32b.
 126  */
 127 typedef struct { unsigned long pte; } pte_t;
 128 typedef struct { unsigned int  pmd; } pmd_t;
 129 typedef struct { unsigned int  pgd; } pgd_t;
 130 typedef struct { unsigned long pgprot; } pgprot_t;
 131
 132 #define pte_val(x)      ((x).pte)
 133 #define pmd_val(x)      ((x).pmd)
 134 #define pgd_val(x)      ((x).pgd)
 135 #define pgprot_val(x)   ((x).pgprot)
 136
 137 #define __pte(x)        ((pte_t) { (x) } )
 138 #define __pmd(x)        ((pmd_t) { (x) } )
 139 #define __pgd(x)        ((pgd_t) { (x) } )
 140 #define __pgprot(x)     ((pgprot_t) { (x) } )
 141
 142 #else
 143 /*
 144  * .. while these make it easier on the compiler
 145  */
 146 typedef unsigned long pte_t;
 147 typedef unsigned int  pmd_t;
 148 typedef unsigned int  pgd_t;
 149 typedef unsigned long pgprot_t;
 150
 151 #define pte_val(x)      (x)
 152 #define pmd_val(x)      (x)
 153 #define pgd_val(x)      (x)
 154 #define pgprot_val(x)   (x)
 155
 156 #define __pte(x)        (x)
 157 #define __pmd(x)        (x)
 158 #define __pgd(x)        (x)
 159 #define __pgprot(x)     (x)
 160
 161 #endif
 162
 163 /* Pure 2^n version of get_order */
 164 static inline int get_order(unsigned long size)
 165 {
 166         int order;
 167
 168         size = (size-1) >> (PAGE_SHIFT-1);
 169         order = -1;
 170         do {
 171                 size >>= 1;
 172                 order++;
 173         } while (size);
 174         return order;
 175 }
 176
 177 #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
 178
 179 extern int page_is_ram(unsigned long pfn);
 180
 181 extern u64 ppc64_pft_size;              /* Log 2 of page table size */
 182
 183 /* We do define AT_SYSINFO_EHDR but don't use the gate mecanism */
 184 #define __HAVE_ARCH_GATE_AREA           1
 185
 186 #endif /* __ASSEMBLY__ */
 187
 188 #ifdef MODULE
 189 #define __page_aligned __attribute__((__aligned__(PAGE_SIZE)))
 190 #else
 191 #define __page_aligned \
 192         __attribute__((__aligned__(PAGE_SIZE), \
 193                 __section__(".data.page_aligned")))
 194 #endif
 195
 196
 197 /* This must match the -Ttext linker address            */
 198 /* Note: tophys & tovirt make assumptions about how     */
 199 /*       KERNELBASE is defined for performance reasons. */
 200 /*       When KERNELBASE moves, those macros may have   */
 201 /*             to change!                               */
 202 #define PAGE_OFFSET     ASM_CONST(0xC000000000000000)
 203 #define KERNELBASE      PAGE_OFFSET
 204 #define VMALLOCBASE     ASM_CONST(0xD000000000000000)
 205 #define IOREGIONBASE    ASM_CONST(0xE000000000000000)
 206
 207 #define IO_REGION_ID       (IOREGIONBASE >> REGION_SHIFT)
 208 #define VMALLOC_REGION_ID  (VMALLOCBASE >> REGION_SHIFT)
 209 #define KERNEL_REGION_ID   (KERNELBASE >> REGION_SHIFT)
 210 #define USER_REGION_ID     (0UL)
 211 #define REGION_ID(ea)      (((unsigned long)(ea)) >> REGION_SHIFT)
 212
 213 #define __bpn_to_ba(x) ((((unsigned long)(x)) << PAGE_SHIFT) + KERNELBASE)
 214 #define __ba_to_bpn(x) ((((unsigned long)(x)) & ~REGION_MASK) >> PAGE_SHIFT)
 215
 216 #define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
 217
 218 #ifdef CONFIG_DISCONTIGMEM
 219 #define page_to_pfn(page)       discontigmem_page_to_pfn(page)
 220 #define pfn_to_page(pfn)        discontigmem_pfn_to_page(pfn)
 221 #define pfn_valid(pfn)          discontigmem_pfn_valid(pfn)
 222 #else
 223 #define pfn_to_page(pfn)        (mem_map + (pfn))
 224 #define page_to_pfn(page)       ((unsigned long)((page) - mem_map))
 225 #define pfn_valid(pfn)          ((pfn) < max_mapnr)
 226 #endif
 227
 228 #define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
 229 #define pfn_to_kaddr(pfn)       __va((pfn) << PAGE_SHIFT)
 230
 231 #define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
 232
 233 /*
 234  * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
 235  * and needs to be executable.  This means the whole heap ends
 236  * up being executable.
 237  */
 238 #define VM_DATA_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
 239                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 240
 241 #define VM_DATA_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
 242                                  VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 243
 244 #define VM_DATA_DEFAULT_FLAGS \
 245         (test_thread_flag(TIF_32BIT) ? \
 246          VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
 247
 248 /*
 249  * This is the default if a program doesn't have a PT_GNU_STACK
 250  * program header entry. The PPC64 ELF ABI has a non executable stack
 251  * stack by default, so in the absense of a PT_GNU_STACK program header
 252  * we turn execute permission off.
 253  */
 254 #define VM_STACK_DEFAULT_FLAGS32        (VM_READ | VM_WRITE | VM_EXEC | \
 255                                          VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 256
 257 #define VM_STACK_DEFAULT_FLAGS64        (VM_READ | VM_WRITE | \
 258                                          VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 259
 260 #define VM_STACK_DEFAULT_FLAGS \
 261         (test_thread_flag(TIF_32BIT) ? \
 262          VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
 263
 264 #endif /* __KERNEL__ */
 265 #endif /* _PPC64_PAGE_H */