[TG3]: Add tagged status support.
[linux-2.6/verdex.git] / include / asm-sparc / bitops.h
blobbfbd795a0a80579e1168dff755de89f837c4a687
1 /* $Id: bitops.h,v 1.67 2001/11/19 18:36:34 davem Exp $
2 * bitops.h: Bit string operations on the Sparc.
4 * Copyright 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright 1996 Eddie C. Dost (ecd@skynet.be)
6 * Copyright 2001 Anton Blanchard (anton@samba.org)
7 */
9 #ifndef _SPARC_BITOPS_H
10 #define _SPARC_BITOPS_H
12 #include <linux/compiler.h>
13 #include <asm/byteorder.h>
15 #ifdef __KERNEL__
18 * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0'
19 * is in the highest of the four bytes and bit '31' is the high bit
20 * within the first byte. Sparc is BIG-Endian. Unless noted otherwise
21 * all bit-ops return 0 if bit was previously clear and != 0 otherwise.
23 static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
25 register unsigned long mask asm("g2");
26 register unsigned long *ADDR asm("g1");
27 register int tmp1 asm("g3");
28 register int tmp2 asm("g4");
29 register int tmp3 asm("g5");
30 register int tmp4 asm("g7");
32 ADDR = ((unsigned long *) addr) + (nr >> 5);
33 mask = 1 << (nr & 31);
35 __asm__ __volatile__(
36 "mov %%o7, %%g4\n\t"
37 "call ___set_bit\n\t"
38 " add %%o7, 8, %%o7\n"
39 : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
40 : "0" (mask), "r" (ADDR)
41 : "memory", "cc");
43 return mask != 0;
46 static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
48 register unsigned long mask asm("g2");
49 register unsigned long *ADDR asm("g1");
50 register int tmp1 asm("g3");
51 register int tmp2 asm("g4");
52 register int tmp3 asm("g5");
53 register int tmp4 asm("g7");
55 ADDR = ((unsigned long *) addr) + (nr >> 5);
56 mask = 1 << (nr & 31);
58 __asm__ __volatile__(
59 "mov %%o7, %%g4\n\t"
60 "call ___set_bit\n\t"
61 " add %%o7, 8, %%o7\n"
62 : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
63 : "0" (mask), "r" (ADDR)
64 : "memory", "cc");
67 static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
69 register unsigned long mask asm("g2");
70 register unsigned long *ADDR asm("g1");
71 register int tmp1 asm("g3");
72 register int tmp2 asm("g4");
73 register int tmp3 asm("g5");
74 register int tmp4 asm("g7");
76 ADDR = ((unsigned long *) addr) + (nr >> 5);
77 mask = 1 << (nr & 31);
79 __asm__ __volatile__(
80 "mov %%o7, %%g4\n\t"
81 "call ___clear_bit\n\t"
82 " add %%o7, 8, %%o7\n"
83 : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
84 : "0" (mask), "r" (ADDR)
85 : "memory", "cc");
87 return mask != 0;
90 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
92 register unsigned long mask asm("g2");
93 register unsigned long *ADDR asm("g1");
94 register int tmp1 asm("g3");
95 register int tmp2 asm("g4");
96 register int tmp3 asm("g5");
97 register int tmp4 asm("g7");
99 ADDR = ((unsigned long *) addr) + (nr >> 5);
100 mask = 1 << (nr & 31);
102 __asm__ __volatile__(
103 "mov %%o7, %%g4\n\t"
104 "call ___clear_bit\n\t"
105 " add %%o7, 8, %%o7\n"
106 : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
107 : "0" (mask), "r" (ADDR)
108 : "memory", "cc");
111 static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
113 register unsigned long mask asm("g2");
114 register unsigned long *ADDR asm("g1");
115 register int tmp1 asm("g3");
116 register int tmp2 asm("g4");
117 register int tmp3 asm("g5");
118 register int tmp4 asm("g7");
120 ADDR = ((unsigned long *) addr) + (nr >> 5);
121 mask = 1 << (nr & 31);
123 __asm__ __volatile__(
124 "mov %%o7, %%g4\n\t"
125 "call ___change_bit\n\t"
126 " add %%o7, 8, %%o7\n"
127 : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
128 : "0" (mask), "r" (ADDR)
129 : "memory", "cc");
131 return mask != 0;
134 static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
136 register unsigned long mask asm("g2");
137 register unsigned long *ADDR asm("g1");
138 register int tmp1 asm("g3");
139 register int tmp2 asm("g4");
140 register int tmp3 asm("g5");
141 register int tmp4 asm("g7");
143 ADDR = ((unsigned long *) addr) + (nr >> 5);
144 mask = 1 << (nr & 31);
146 __asm__ __volatile__(
147 "mov %%o7, %%g4\n\t"
148 "call ___change_bit\n\t"
149 " add %%o7, 8, %%o7\n"
150 : "=&r" (mask), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3), "=r" (tmp4)
151 : "0" (mask), "r" (ADDR)
152 : "memory", "cc");
156 * non-atomic versions
158 static inline void __set_bit(int nr, volatile unsigned long *addr)
160 unsigned long mask = 1UL << (nr & 0x1f);
161 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
163 *p |= mask;
166 static inline void __clear_bit(int nr, volatile unsigned long *addr)
168 unsigned long mask = 1UL << (nr & 0x1f);
169 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
171 *p &= ~mask;
174 static inline void __change_bit(int nr, volatile unsigned long *addr)
176 unsigned long mask = 1UL << (nr & 0x1f);
177 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
179 *p ^= mask;
182 static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
184 unsigned long mask = 1UL << (nr & 0x1f);
185 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
186 unsigned long old = *p;
188 *p = old | mask;
189 return (old & mask) != 0;
192 static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
194 unsigned long mask = 1UL << (nr & 0x1f);
195 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
196 unsigned long old = *p;
198 *p = old & ~mask;
199 return (old & mask) != 0;
202 static inline int __test_and_change_bit(int nr, volatile unsigned long *addr)
204 unsigned long mask = 1UL << (nr & 0x1f);
205 unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
206 unsigned long old = *p;
208 *p = old ^ mask;
209 return (old & mask) != 0;
212 #define smp_mb__before_clear_bit() do { } while(0)
213 #define smp_mb__after_clear_bit() do { } while(0)
215 /* The following routine need not be atomic. */
216 static inline int test_bit(int nr, __const__ volatile unsigned long *addr)
218 return (1UL & (((unsigned long *)addr)[nr >> 5] >> (nr & 31))) != 0UL;
221 /* The easy/cheese version for now. */
222 static inline unsigned long ffz(unsigned long word)
224 unsigned long result = 0;
226 while(word & 1) {
227 result++;
228 word >>= 1;
230 return result;
234 * __ffs - find first bit in word.
235 * @word: The word to search
237 * Undefined if no bit exists, so code should check against 0 first.
239 static inline int __ffs(unsigned long word)
241 int num = 0;
243 if ((word & 0xffff) == 0) {
244 num += 16;
245 word >>= 16;
247 if ((word & 0xff) == 0) {
248 num += 8;
249 word >>= 8;
251 if ((word & 0xf) == 0) {
252 num += 4;
253 word >>= 4;
255 if ((word & 0x3) == 0) {
256 num += 2;
257 word >>= 2;
259 if ((word & 0x1) == 0)
260 num += 1;
261 return num;
265 * Every architecture must define this function. It's the fastest
266 * way of searching a 140-bit bitmap where the first 100 bits are
267 * unlikely to be set. It's guaranteed that at least one of the 140
268 * bits is cleared.
270 static inline int sched_find_first_bit(unsigned long *b)
273 if (unlikely(b[0]))
274 return __ffs(b[0]);
275 if (unlikely(b[1]))
276 return __ffs(b[1]) + 32;
277 if (unlikely(b[2]))
278 return __ffs(b[2]) + 64;
279 if (b[3])
280 return __ffs(b[3]) + 96;
281 return __ffs(b[4]) + 128;
285 * ffs: find first bit set. This is defined the same way as
286 * the libc and compiler builtin ffs routines, therefore
287 * differs in spirit from the above ffz (man ffs).
289 static inline int ffs(int x)
291 if (!x)
292 return 0;
293 return __ffs((unsigned long)x) + 1;
297 * fls: find last (most-significant) bit set.
298 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
300 #define fls(x) generic_fls(x)
303 * hweightN: returns the hamming weight (i.e. the number
304 * of bits set) of a N-bit word
306 #define hweight32(x) generic_hweight32(x)
307 #define hweight16(x) generic_hweight16(x)
308 #define hweight8(x) generic_hweight8(x)
311 * find_next_zero_bit() finds the first zero bit in a bit string of length
312 * 'size' bits, starting the search at bit 'offset'. This is largely based
313 * on Linus's ALPHA routines, which are pretty portable BTW.
315 static inline unsigned long find_next_zero_bit(const unsigned long *addr,
316 unsigned long size, unsigned long offset)
318 const unsigned long *p = addr + (offset >> 5);
319 unsigned long result = offset & ~31UL;
320 unsigned long tmp;
322 if (offset >= size)
323 return size;
324 size -= result;
325 offset &= 31UL;
326 if (offset) {
327 tmp = *(p++);
328 tmp |= ~0UL >> (32-offset);
329 if (size < 32)
330 goto found_first;
331 if (~tmp)
332 goto found_middle;
333 size -= 32;
334 result += 32;
336 while (size & ~31UL) {
337 if (~(tmp = *(p++)))
338 goto found_middle;
339 result += 32;
340 size -= 32;
342 if (!size)
343 return result;
344 tmp = *p;
346 found_first:
347 tmp |= ~0UL << size;
348 if (tmp == ~0UL) /* Are any bits zero? */
349 return result + size; /* Nope. */
350 found_middle:
351 return result + ffz(tmp);
355 * Linus sez that gcc can optimize the following correctly, we'll see if this
356 * holds on the Sparc as it does for the ALPHA.
358 #define find_first_zero_bit(addr, size) \
359 find_next_zero_bit((addr), (size), 0)
362 * find_next_bit - find the first set bit in a memory region
363 * @addr: The address to base the search on
364 * @offset: The bitnumber to start searching at
365 * @size: The maximum size to search
367 * Scheduler induced bitop, do not use.
369 static inline int find_next_bit(const unsigned long *addr, int size, int offset)
371 const unsigned long *p = addr + (offset >> 5);
372 int num = offset & ~0x1f;
373 unsigned long word;
375 word = *p++;
376 word &= ~((1 << (offset & 0x1f)) - 1);
377 while (num < size) {
378 if (word != 0) {
379 return __ffs(word) + num;
381 word = *p++;
382 num += 0x20;
384 return num;
388 * find_first_bit - find the first set bit in a memory region
389 * @addr: The address to start the search at
390 * @size: The maximum size to search
392 * Returns the bit-number of the first set bit, not the number of the byte
393 * containing a bit.
395 #define find_first_bit(addr, size) \
396 find_next_bit((addr), (size), 0)
400 static inline int test_le_bit(int nr, __const__ unsigned long * addr)
402 __const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
403 return (ADDR[nr >> 3] >> (nr & 7)) & 1;
407 * non-atomic versions
409 static inline void __set_le_bit(int nr, unsigned long *addr)
411 unsigned char *ADDR = (unsigned char *)addr;
413 ADDR += nr >> 3;
414 *ADDR |= 1 << (nr & 0x07);
417 static inline void __clear_le_bit(int nr, unsigned long *addr)
419 unsigned char *ADDR = (unsigned char *)addr;
421 ADDR += nr >> 3;
422 *ADDR &= ~(1 << (nr & 0x07));
425 static inline int __test_and_set_le_bit(int nr, unsigned long *addr)
427 int mask, retval;
428 unsigned char *ADDR = (unsigned char *)addr;
430 ADDR += nr >> 3;
431 mask = 1 << (nr & 0x07);
432 retval = (mask & *ADDR) != 0;
433 *ADDR |= mask;
434 return retval;
437 static inline int __test_and_clear_le_bit(int nr, unsigned long *addr)
439 int mask, retval;
440 unsigned char *ADDR = (unsigned char *)addr;
442 ADDR += nr >> 3;
443 mask = 1 << (nr & 0x07);
444 retval = (mask & *ADDR) != 0;
445 *ADDR &= ~mask;
446 return retval;
449 static inline unsigned long find_next_zero_le_bit(const unsigned long *addr,
450 unsigned long size, unsigned long offset)
452 const unsigned long *p = addr + (offset >> 5);
453 unsigned long result = offset & ~31UL;
454 unsigned long tmp;
456 if (offset >= size)
457 return size;
458 size -= result;
459 offset &= 31UL;
460 if(offset) {
461 tmp = *(p++);
462 tmp |= __swab32(~0UL >> (32-offset));
463 if(size < 32)
464 goto found_first;
465 if(~tmp)
466 goto found_middle;
467 size -= 32;
468 result += 32;
470 while(size & ~31UL) {
471 if(~(tmp = *(p++)))
472 goto found_middle;
473 result += 32;
474 size -= 32;
476 if(!size)
477 return result;
478 tmp = *p;
480 found_first:
481 tmp = __swab32(tmp) | (~0UL << size);
482 if (tmp == ~0UL) /* Are any bits zero? */
483 return result + size; /* Nope. */
484 return result + ffz(tmp);
486 found_middle:
487 return result + ffz(__swab32(tmp));
490 #define find_first_zero_le_bit(addr, size) \
491 find_next_zero_le_bit((addr), (size), 0)
493 #define ext2_set_bit(nr,addr) \
494 __test_and_set_le_bit((nr),(unsigned long *)(addr))
495 #define ext2_clear_bit(nr,addr) \
496 __test_and_clear_le_bit((nr),(unsigned long *)(addr))
498 #define ext2_set_bit_atomic(lock, nr, addr) \
499 ({ \
500 int ret; \
501 spin_lock(lock); \
502 ret = ext2_set_bit((nr), (unsigned long *)(addr)); \
503 spin_unlock(lock); \
504 ret; \
507 #define ext2_clear_bit_atomic(lock, nr, addr) \
508 ({ \
509 int ret; \
510 spin_lock(lock); \
511 ret = ext2_clear_bit((nr), (unsigned long *)(addr)); \
512 spin_unlock(lock); \
513 ret; \
516 #define ext2_test_bit(nr,addr) \
517 test_le_bit((nr),(unsigned long *)(addr))
518 #define ext2_find_first_zero_bit(addr, size) \
519 find_first_zero_le_bit((unsigned long *)(addr), (size))
520 #define ext2_find_next_zero_bit(addr, size, off) \
521 find_next_zero_le_bit((unsigned long *)(addr), (size), (off))
523 /* Bitmap functions for the minix filesystem. */
524 #define minix_test_and_set_bit(nr,addr) \
525 test_and_set_bit((nr),(unsigned long *)(addr))
526 #define minix_set_bit(nr,addr) \
527 set_bit((nr),(unsigned long *)(addr))
528 #define minix_test_and_clear_bit(nr,addr) \
529 test_and_clear_bit((nr),(unsigned long *)(addr))
530 #define minix_test_bit(nr,addr) \
531 test_bit((nr),(unsigned long *)(addr))
532 #define minix_find_first_zero_bit(addr,size) \
533 find_first_zero_bit((unsigned long *)(addr),(size))
535 #endif /* __KERNEL__ */
537 #endif /* defined(_SPARC_BITOPS_H) */