arch/arm/plat-omap/clock.h

   1 /*
   2  *  linux/arch/arm/plat-omap/clock.h
   3  *
   4  *  Copyright (C) 2004 Nokia corporation
   5  *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
   6  *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #ifndef __ARCH_ARM_OMAP_CLOCK_H
  14 #define __ARCH_ARM_OMAP_CLOCK_H
  15
  16 struct module;
  17
  18 struct clk {
  19         struct list_head        node;
  20         struct module           *owner;
  21         const char              *name;
  22         struct clk              *parent;
  23         unsigned long           rate;
  24         __s8                    usecount;
  25         __u16                   flags;
  26         __u32                   enable_reg;
  27         __u8                    enable_bit;
  28         __u8                    rate_offset;
  29         void                    (*recalc)(struct clk *);
  30         int                     (*set_rate)(struct clk *, unsigned long);
  31         long                    (*round_rate)(struct clk *, unsigned long);
  32         void                    (*init)(struct clk *);
  33 };
  34
  35
  36 struct mpu_rate {
  37         unsigned long           rate;
  38         unsigned long           xtal;
  39         unsigned long           pll_rate;
  40         __u16                   ckctl_val;
  41         __u16                   dpllctl_val;
  42 };
  43
  44
  45 /* Clock flags */
  46 #define RATE_CKCTL              1
  47 #define RATE_FIXED              2
  48 #define RATE_PROPAGATES         4
  49 #define VIRTUAL_CLOCK           8
  50 #define ALWAYS_ENABLED          16
  51 #define ENABLE_REG_32BIT        32
  52 #define CLOCK_IN_OMAP16XX       64
  53 #define CLOCK_IN_OMAP1510       128
  54 #define CLOCK_IN_OMAP730        256
  55 #define DSP_DOMAIN_CLOCK        512
  56 #define VIRTUAL_IO_ADDRESS      1024
  57
  58 /* ARM_CKCTL bit shifts */
  59 #define CKCTL_PERDIV_OFFSET     0
  60 #define CKCTL_LCDDIV_OFFSET     2
  61 #define CKCTL_ARMDIV_OFFSET     4
  62 #define CKCTL_DSPDIV_OFFSET     6
  63 #define CKCTL_TCDIV_OFFSET      8
  64 #define CKCTL_DSPMMUDIV_OFFSET  10
  65 /*#define ARM_TIMXO             12*/
  66 #define EN_DSPCK                13
  67 /*#define ARM_INTHCK_SEL        14*/ /* Divide-by-2 for mpu inth_ck */
  68 /* DSP_CKCTL bit shifts */
  69 #define CKCTL_DSPPERDIV_OFFSET  0
  70
  71 /* ARM_IDLECT1 bit shifts */
  72 /*#define IDLWDT_ARM    0*/
  73 /*#define IDLXORP_ARM   1*/
  74 /*#define IDLPER_ARM    2*/
  75 /*#define IDLLCD_ARM    3*/
  76 /*#define IDLLB_ARM     4*/
  77 /*#define IDLHSAB_ARM   5*/
  78 /*#define IDLIF_ARM     6*/
  79 /*#define IDLDPLL_ARM   7*/
  80 /*#define IDLAPI_ARM    8*/
  81 /*#define IDLTIM_ARM    9*/
  82 /*#define SETARM_IDLE   11*/
  83
  84 /* ARM_IDLECT2 bit shifts */
  85 #define EN_WDTCK        0
  86 #define EN_XORPCK       1
  87 #define EN_PERCK        2
  88 #define EN_LCDCK        3
  89 #define EN_LBCK         4 /* Not on 1610/1710 */
  90 /*#define EN_HSABCK     5*/
  91 #define EN_APICK        6
  92 #define EN_TIMCK        7
  93 #define DMACK_REQ       8
  94 #define EN_GPIOCK       9 /* Not on 1610/1710 */
  95 /*#define EN_LBFREECK   10*/
  96 #define EN_CKOUT_ARM    11
  97
  98 /* ARM_IDLECT3 bit shifts */
  99 #define EN_OCPI_CK      0
 100 #define EN_TC1_CK       2
 101 #define EN_TC2_CK       4
 102
 103 /* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
 104 #define EN_DSPTIMCK     5
 105
 106 /* Various register defines for clock controls scattered around OMAP chip */
 107 #define USB_MCLK_EN_BIT         4       /* In ULPD_CLKC_CTRL */
 108 #define USB_HOST_HHC_UHOST_EN   9       /* In MOD_CONF_CTRL_0 */
 109 #define SWD_ULPD_PLL_CLK_REQ    1       /* In SWD_CLK_DIV_CTRL_SEL */
 110 #define COM_ULPD_PLL_CLK_REQ    1       /* In COM_CLK_DIV_CTRL_SEL */
 111 #define SWD_CLK_DIV_CTRL_SEL    0xfffe0874
 112 #define COM_CLK_DIV_CTRL_SEL    0xfffe0878
 113 #define SOFT_REQ_REG            0xfffe0834
 114 #define SOFT_REQ_REG2           0xfffe0880
 115
 116 int clk_register(struct clk *clk);
 117 void clk_unregister(struct clk *clk);
 118 int clk_init(void);
 119
 120 #endif