5 * VIA IDE driver for Linux. Supported southbridges:
7 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
8 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
9 * vt8235, vt8237, vt8237a
11 * Copyright (c) 2000-2002 Vojtech Pavlik
13 * Based on the work of:
19 * Obsolete device documentation publically available from via.com.tw
20 * Current device documentation available under NDA only
24 * This program is free software; you can redistribute it and/or modify it
25 * under the terms of the GNU General Public License version 2 as published by
26 * the Free Software Foundation.
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/blkdev.h>
33 #include <linux/pci.h>
34 #include <linux/init.h>
35 #include <linux/ide.h>
38 #ifdef CONFIG_PPC_MULTIPLATFORM
39 #include <asm/processor.h>
42 #include "ide-timing.h"
44 #define DISPLAY_VIA_TIMINGS
46 #define VIA_IDE_ENABLE 0x40
47 #define VIA_IDE_CONFIG 0x41
48 #define VIA_FIFO_CONFIG 0x43
49 #define VIA_MISC_1 0x44
50 #define VIA_MISC_2 0x45
51 #define VIA_MISC_3 0x46
52 #define VIA_DRIVE_TIMING 0x48
53 #define VIA_8BIT_TIMING 0x4e
54 #define VIA_ADDRESS_SETUP 0x4c
55 #define VIA_UDMA_TIMING 0x50
57 #define VIA_UDMA 0x007
58 #define VIA_UDMA_NONE 0x000
59 #define VIA_UDMA_33 0x001
60 #define VIA_UDMA_66 0x002
61 #define VIA_UDMA_100 0x003
62 #define VIA_UDMA_133 0x004
63 #define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
64 #define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
65 #define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
66 #define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
67 #define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */
68 #define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */
71 * VIA SouthBridge chips.
74 static struct via_isa_bridge
{
80 } via_isa_bridges
[] = {
81 { "vt6410", PCI_DEVICE_ID_VIA_6410
, 0x00, 0x2f, VIA_UDMA_133
| VIA_BAD_AST
},
82 { "vt8251", PCI_DEVICE_ID_VIA_8251
, 0x00, 0x2f, VIA_UDMA_133
| VIA_BAD_AST
},
83 { "vt8237", PCI_DEVICE_ID_VIA_8237
, 0x00, 0x2f, VIA_UDMA_133
| VIA_BAD_AST
},
84 { "vt8237a", PCI_DEVICE_ID_VIA_8237A
, 0x00, 0x2f, VIA_UDMA_133
| VIA_BAD_AST
},
85 { "vt8235", PCI_DEVICE_ID_VIA_8235
, 0x00, 0x2f, VIA_UDMA_133
| VIA_BAD_AST
},
86 { "vt8233a", PCI_DEVICE_ID_VIA_8233A
, 0x00, 0x2f, VIA_UDMA_133
| VIA_BAD_AST
},
87 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0
, 0x00, 0x2f, VIA_UDMA_100
},
88 { "vt8233", PCI_DEVICE_ID_VIA_8233_0
, 0x00, 0x2f, VIA_UDMA_100
},
89 { "vt8231", PCI_DEVICE_ID_VIA_8231
, 0x00, 0x2f, VIA_UDMA_100
},
90 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686
, 0x40, 0x4f, VIA_UDMA_100
},
91 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686
, 0x10, 0x2f, VIA_UDMA_66
},
92 { "vt82c686", PCI_DEVICE_ID_VIA_82C686
, 0x00, 0x0f, VIA_UDMA_33
| VIA_BAD_CLK66
},
93 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596
, 0x10, 0x2f, VIA_UDMA_66
},
94 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596
, 0x00, 0x0f, VIA_UDMA_33
| VIA_BAD_CLK66
},
95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x47, 0x4f, VIA_UDMA_33
| VIA_SET_FIFO
},
96 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x40, 0x46, VIA_UDMA_33
| VIA_SET_FIFO
| VIA_BAD_PREQ
},
97 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x30, 0x3f, VIA_UDMA_33
| VIA_SET_FIFO
},
98 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0
, 0x20, 0x2f, VIA_UDMA_33
| VIA_SET_FIFO
},
99 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0
, 0x00, 0x0f, VIA_UDMA_NONE
| VIA_SET_FIFO
},
100 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, VIA_UDMA_NONE
| VIA_SET_FIFO
| VIA_NO_UNMASK
},
101 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, VIA_UDMA_NONE
| VIA_SET_FIFO
| VIA_NO_UNMASK
| VIA_BAD_ID
},
105 static unsigned int via_clock
;
106 static char *via_dma
[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
110 struct via_isa_bridge
*via_config
;
111 unsigned int via_80w
;
115 * via_set_speed - write timing registers
118 * @timing: IDE timing data to use
120 * via_set_speed writes timing values to the chipset registers
123 static void via_set_speed(ide_hwif_t
*hwif
, u8 dn
, struct ide_timing
*timing
)
125 struct pci_dev
*dev
= hwif
->pci_dev
;
126 struct via82cxxx_dev
*vdev
= ide_get_hwifdata(hwif
);
129 if (~vdev
->via_config
->flags
& VIA_BAD_AST
) {
130 pci_read_config_byte(dev
, VIA_ADDRESS_SETUP
, &t
);
131 t
= (t
& ~(3 << ((3 - dn
) << 1))) | ((FIT(timing
->setup
, 1, 4) - 1) << ((3 - dn
) << 1));
132 pci_write_config_byte(dev
, VIA_ADDRESS_SETUP
, t
);
135 pci_write_config_byte(dev
, VIA_8BIT_TIMING
+ (1 - (dn
>> 1)),
136 ((FIT(timing
->act8b
, 1, 16) - 1) << 4) | (FIT(timing
->rec8b
, 1, 16) - 1));
138 pci_write_config_byte(dev
, VIA_DRIVE_TIMING
+ (3 - dn
),
139 ((FIT(timing
->active
, 1, 16) - 1) << 4) | (FIT(timing
->recover
, 1, 16) - 1));
141 switch (vdev
->via_config
->flags
& VIA_UDMA
) {
142 case VIA_UDMA_33
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 5) - 2)) : 0x03; break;
143 case VIA_UDMA_66
: t
= timing
->udma
? (0xe8 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x0f; break;
144 case VIA_UDMA_100
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x07; break;
145 case VIA_UDMA_133
: t
= timing
->udma
? (0xe0 | (FIT(timing
->udma
, 2, 9) - 2)) : 0x07; break;
149 pci_write_config_byte(dev
, VIA_UDMA_TIMING
+ (3 - dn
), t
);
153 * via_set_drive - configure transfer mode
154 * @drive: Drive to set up
155 * @speed: desired speed
157 * via_set_drive() computes timing values configures the drive and
158 * the chipset to a desired transfer mode. It also can be called
162 static int via_set_drive(ide_drive_t
*drive
, u8 speed
)
164 ide_drive_t
*peer
= HWIF(drive
)->drives
+ (~drive
->dn
& 1);
165 struct via82cxxx_dev
*vdev
= ide_get_hwifdata(drive
->hwif
);
166 struct ide_timing t
, p
;
169 if (speed
!= XFER_PIO_SLOW
)
170 ide_config_drive_speed(drive
, speed
);
172 T
= 1000000000 / via_clock
;
174 switch (vdev
->via_config
->flags
& VIA_UDMA
) {
175 case VIA_UDMA_33
: UT
= T
; break;
176 case VIA_UDMA_66
: UT
= T
/2; break;
177 case VIA_UDMA_100
: UT
= T
/3; break;
178 case VIA_UDMA_133
: UT
= T
/4; break;
182 ide_timing_compute(drive
, speed
, &t
, T
, UT
);
185 ide_timing_compute(peer
, peer
->current_speed
, &p
, T
, UT
);
186 ide_timing_merge(&p
, &t
, &t
, IDE_TIMING_8BIT
);
189 via_set_speed(HWIF(drive
), drive
->dn
, &t
);
191 if (!drive
->init_speed
)
192 drive
->init_speed
= speed
;
193 drive
->current_speed
= speed
;
199 * via82cxxx_tune_drive - PIO setup
200 * @drive: drive to set up
201 * @pio: mode to use (255 for 'best possible')
203 * A callback from the upper layers for PIO-only tuning.
206 static void via82cxxx_tune_drive(ide_drive_t
*drive
, u8 pio
)
210 ide_find_best_mode(drive
, XFER_PIO
| XFER_EPIO
));
214 via_set_drive(drive
, XFER_PIO_0
+ min_t(u8
, pio
, 5));
218 * via82cxxx_ide_dma_check - set up for DMA if possible
219 * @drive: IDE drive to set up
221 * Set up the drive for the highest supported speed considering the
222 * driver, controller and cable
225 static int via82cxxx_ide_dma_check (ide_drive_t
*drive
)
227 ide_hwif_t
*hwif
= HWIF(drive
);
228 struct via82cxxx_dev
*vdev
= ide_get_hwifdata(hwif
);
229 u16 w80
= hwif
->udma_four
;
231 u16 speed
= ide_find_best_mode(drive
,
232 XFER_PIO
| XFER_EPIO
| XFER_SWDMA
| XFER_MWDMA
|
233 (vdev
->via_config
->flags
& VIA_UDMA
? XFER_UDMA
: 0) |
234 (w80
&& (vdev
->via_config
->flags
& VIA_UDMA
) >= VIA_UDMA_66
? XFER_UDMA_66
: 0) |
235 (w80
&& (vdev
->via_config
->flags
& VIA_UDMA
) >= VIA_UDMA_100
? XFER_UDMA_100
: 0) |
236 (w80
&& (vdev
->via_config
->flags
& VIA_UDMA
) >= VIA_UDMA_133
? XFER_UDMA_133
: 0));
238 via_set_drive(drive
, speed
);
240 if (drive
->autodma
&& (speed
& XFER_MODE
) != XFER_PIO
)
241 return hwif
->ide_dma_on(drive
);
242 return hwif
->ide_dma_off_quietly(drive
);
245 static struct via_isa_bridge
*via_config_find(struct pci_dev
**isa
)
247 struct via_isa_bridge
*via_config
;
250 for (via_config
= via_isa_bridges
; via_config
->id
; via_config
++)
251 if ((*isa
= pci_get_device(PCI_VENDOR_ID_VIA
+
252 !!(via_config
->flags
& VIA_BAD_ID
),
253 via_config
->id
, NULL
))) {
255 pci_read_config_byte(*isa
, PCI_REVISION_ID
, &t
);
256 if (t
>= via_config
->rev_min
&&
257 t
<= via_config
->rev_max
)
266 * init_chipset_via82cxxx - initialization handler
268 * @name: Name of interface
270 * The initialization callback. Here we determine the IDE chip type
271 * and initialize its drive independent registers.
274 static unsigned int __devinit
init_chipset_via82cxxx(struct pci_dev
*dev
, const char *name
)
276 struct pci_dev
*isa
= NULL
;
277 struct via_isa_bridge
*via_config
;
282 * Find the ISA bridge to see how good the IDE is.
284 via_config
= via_config_find(&isa
);
285 if (!via_config
->id
) {
286 printk(KERN_WARNING
"VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
292 * Setup or disable Clk66 if appropriate
295 if ((via_config
->flags
& VIA_UDMA
) == VIA_UDMA_66
) {
297 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
298 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
|0x80008);
299 } else if (via_config
->flags
& VIA_BAD_CLK66
) {
300 /* Would cause trouble on 596a and 686 */
301 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
302 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
& ~0x80008);
306 * Check whether interfaces are enabled.
309 pci_read_config_byte(dev
, VIA_IDE_ENABLE
, &v
);
312 * Set up FIFO sizes and thresholds.
315 pci_read_config_byte(dev
, VIA_FIFO_CONFIG
, &t
);
317 /* Disable PREQ# till DDACK# */
318 if (via_config
->flags
& VIA_BAD_PREQ
) {
319 /* Would crash on 586b rev 41 */
323 /* Fix FIFO split between channels */
324 if (via_config
->flags
& VIA_SET_FIFO
) {
327 case 2: t
|= 0x00; break; /* 16 on primary */
328 case 1: t
|= 0x60; break; /* 16 on secondary */
329 case 3: t
|= 0x20; break; /* 8 pri 8 sec */
333 pci_write_config_byte(dev
, VIA_FIFO_CONFIG
, t
);
336 * Determine system bus clock.
339 via_clock
= system_bus_clock() * 1000;
342 case 33000: via_clock
= 33333; break;
343 case 37000: via_clock
= 37500; break;
344 case 41000: via_clock
= 41666; break;
347 if (via_clock
< 20000 || via_clock
> 50000) {
348 printk(KERN_WARNING
"VP_IDE: User given PCI clock speed "
349 "impossible (%d), using 33 MHz instead.\n", via_clock
);
350 printk(KERN_WARNING
"VP_IDE: Use ide0=ata66 if you want "
351 "to assume 80-wire cable.\n");
356 * Print the boot message.
359 pci_read_config_byte(isa
, PCI_REVISION_ID
, &t
);
360 printk(KERN_INFO
"VP_IDE: VIA %s (rev %02x) IDE %s "
361 "controller on pci%s\n",
363 via_dma
[via_config
->flags
& VIA_UDMA
],
371 * Check and handle 80-wire cable presence
373 static void __devinit
via_cable_detect(struct pci_dev
*dev
, struct via82cxxx_dev
*vdev
)
377 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
379 switch (vdev
->via_config
->flags
& VIA_UDMA
) {
382 for (i
= 24; i
>= 0; i
-= 8)
383 if (((u
>> (i
& 16)) & 8) &&
385 (((u
>> i
) & 7) < 2)) {
390 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
395 for (i
= 24; i
>= 0; i
-= 8)
396 if (((u
>> i
) & 0x10) ||
397 (((u
>> i
) & 0x20) &&
398 (((u
>> i
) & 7) < 4))) {
399 /* BIOS 80-wire bit or
400 * UDMA w/ < 60ns/cycle
402 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
407 for (i
= 24; i
>= 0; i
-= 8)
408 if (((u
>> i
) & 0x10) ||
409 (((u
>> i
) & 0x20) &&
410 (((u
>> i
) & 7) < 6))) {
411 /* BIOS 80-wire bit or
412 * UDMA w/ < 60ns/cycle
414 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
421 static void __devinit
init_hwif_via82cxxx(ide_hwif_t
*hwif
)
423 struct via82cxxx_dev
*vdev
= kmalloc(sizeof(struct via82cxxx_dev
),
425 struct pci_dev
*isa
= NULL
;
429 printk(KERN_ERR
"VP_IDE: out of memory :(\n");
433 memset(vdev
, 0, sizeof(struct via82cxxx_dev
));
434 ide_set_hwifdata(hwif
, vdev
);
436 vdev
->via_config
= via_config_find(&isa
);
437 via_cable_detect(hwif
->pci_dev
, vdev
);
441 hwif
->tuneproc
= &via82cxxx_tune_drive
;
442 hwif
->speedproc
= &via_set_drive
;
445 #if defined(CONFIG_PPC_CHRP) && defined(CONFIG_PPC32)
446 if(machine_is(chrp
) && _chrp_type
== _CHRP_Pegasos
) {
447 hwif
->irq
= hwif
->channel
? 15 : 14;
451 for (i
= 0; i
< 2; i
++) {
452 hwif
->drives
[i
].io_32bit
= 1;
453 hwif
->drives
[i
].unmask
= (vdev
->via_config
->flags
& VIA_NO_UNMASK
) ? 0 : 1;
454 hwif
->drives
[i
].autotune
= 1;
455 hwif
->drives
[i
].dn
= hwif
->channel
* 2 + i
;
462 hwif
->ultra_mask
= 0x7f;
463 hwif
->mwdma_mask
= 0x07;
464 hwif
->swdma_mask
= 0x07;
466 if (!hwif
->udma_four
)
467 hwif
->udma_four
= (vdev
->via_80w
>> hwif
->channel
) & 1;
468 hwif
->ide_dma_check
= &via82cxxx_ide_dma_check
;
471 hwif
->drives
[0].autodma
= hwif
->autodma
;
472 hwif
->drives
[1].autodma
= hwif
->autodma
;
475 static ide_pci_device_t via82cxxx_chipsets
[] __devinitdata
= {
478 .init_chipset
= init_chipset_via82cxxx
,
479 .init_hwif
= init_hwif_via82cxxx
,
481 .autodma
= NOAUTODMA
,
482 .enablebits
= {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
486 .init_chipset
= init_chipset_via82cxxx
,
487 .init_hwif
= init_hwif_via82cxxx
,
490 .enablebits
= {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
491 .bootable
= ON_BOARD
,
495 static int __devinit
via_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
497 return ide_setup_pci_device(dev
, &via82cxxx_chipsets
[id
->driver_data
]);
500 static struct pci_device_id via_pci_tbl
[] = {
501 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_82C576_1
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
502 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_82C586_1
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
503 { PCI_VENDOR_ID_VIA
, PCI_DEVICE_ID_VIA_6410
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 1},
506 MODULE_DEVICE_TABLE(pci
, via_pci_tbl
);
508 static struct pci_driver driver
= {
510 .id_table
= via_pci_tbl
,
511 .probe
= via_init_one
,
514 static int via_ide_init(void)
516 return ide_pci_register_driver(&driver
);
519 module_init(via_ide_init
);
521 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
522 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
523 MODULE_LICENSE("GPL");