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initial commit with v3.6.7
[linux-3.6.7-moxart.git] / arch / blackfin / kernel / bfin_gpio.c
blob83139aaf3072b21c3faafb9c1b69bade1cdf3ccf
1 /*
2 * GPIO Abstraction Layer
3 *
4 * Copyright 2006-2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later
7 */
8
9 #include <linux/delay.h>
10 #include <linux/module.h>
11 #include <linux/err.h>
12 #include <linux/proc_fs.h>
13 #include <linux/seq_file.h>
14 #include <asm/blackfin.h>
15 #include <asm/gpio.h>
16 #include <asm/portmux.h>
17 #include <linux/irq.h>
18 #include <asm/irq_handler.h>
19
20 #if ANOMALY_05000311 || ANOMALY_05000323
21 enum {
22 AWA_data = SYSCR,
23 AWA_data_clear = SYSCR,
24 AWA_data_set = SYSCR,
25 AWA_toggle = SYSCR,
26 AWA_maska = BFIN_UART_SCR,
27 AWA_maska_clear = BFIN_UART_SCR,
28 AWA_maska_set = BFIN_UART_SCR,
29 AWA_maska_toggle = BFIN_UART_SCR,
30 AWA_maskb = BFIN_UART_GCTL,
31 AWA_maskb_clear = BFIN_UART_GCTL,
32 AWA_maskb_set = BFIN_UART_GCTL,
33 AWA_maskb_toggle = BFIN_UART_GCTL,
34 AWA_dir = SPORT1_STAT,
35 AWA_polar = SPORT1_STAT,
36 AWA_edge = SPORT1_STAT,
37 AWA_both = SPORT1_STAT,
38 #if ANOMALY_05000311
39 AWA_inen = TIMER_ENABLE,
40 #elif ANOMALY_05000323
41 AWA_inen = DMA1_1_CONFIG,
42 #endif
43 };
44 /* Anomaly Workaround */
45 #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
46 #else
47 #define AWA_DUMMY_READ(...) do { } while (0)
48 #endif
49
50 static struct gpio_port_t * const gpio_array[] = {
51 #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
52 (struct gpio_port_t *) FIO_FLAG_D,
53 #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
54 (struct gpio_port_t *) PORTFIO,
55 (struct gpio_port_t *) PORTGIO,
56 (struct gpio_port_t *) PORTHIO,
57 #elif defined(BF561_FAMILY)
58 (struct gpio_port_t *) FIO0_FLAG_D,
59 (struct gpio_port_t *) FIO1_FLAG_D,
60 (struct gpio_port_t *) FIO2_FLAG_D,
61 #elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
62 (struct gpio_port_t *)PORTA_FER,
63 (struct gpio_port_t *)PORTB_FER,
64 (struct gpio_port_t *)PORTC_FER,
65 (struct gpio_port_t *)PORTD_FER,
66 (struct gpio_port_t *)PORTE_FER,
67 (struct gpio_port_t *)PORTF_FER,
68 (struct gpio_port_t *)PORTG_FER,
69 # if defined(CONFIG_BF54x)
70 (struct gpio_port_t *)PORTH_FER,
71 (struct gpio_port_t *)PORTI_FER,
72 (struct gpio_port_t *)PORTJ_FER,
73 # endif
74 #else
75 # error no gpio arrays defined
76 #endif
77 };
78
79 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
80 static unsigned short * const port_fer[] = {
81 (unsigned short *) PORTF_FER,
82 (unsigned short *) PORTG_FER,
83 (unsigned short *) PORTH_FER,
84 };
85
86 # if !defined(BF537_FAMILY)
87 static unsigned short * const port_mux[] = {
88 (unsigned short *) PORTF_MUX,
89 (unsigned short *) PORTG_MUX,
90 (unsigned short *) PORTH_MUX,
91 };
92
93 static const
94 u8 pmux_offset[][16] = {
95 # if defined(CONFIG_BF52x)
96 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
97 { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
98 { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
99 # elif defined(CONFIG_BF51x)
100 { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
101 { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
102 { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
103 # endif
104 };
105 # endif
106
107 #elif defined(BF538_FAMILY)
108 static unsigned short * const port_fer[] = {
109 (unsigned short *) PORTCIO_FER,
110 (unsigned short *) PORTDIO_FER,
111 (unsigned short *) PORTEIO_FER,
112 };
113 #endif
114
115 #define RESOURCE_LABEL_SIZE 16
116
117 static struct str_ident {
118 char name[RESOURCE_LABEL_SIZE];
119 } str_ident[MAX_RESOURCES];
120
121 #if defined(CONFIG_PM)
122 static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
123 # ifdef BF538_FAMILY
124 static unsigned short port_fer_saved[3];
125 # endif
126 #endif
127
128 static void gpio_error(unsigned gpio)
129 {
130 printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
131 }
132
133 static void set_label(unsigned short ident, const char *label)
134 {
135 if (label) {
136 strncpy(str_ident[ident].name, label,
137 RESOURCE_LABEL_SIZE);
138 str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
139 }
140 }
141
142 static char *get_label(unsigned short ident)
143 {
144 return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
145 }
146
147 static int cmp_label(unsigned short ident, const char *label)
148 {
149 if (label == NULL) {
150 dump_stack();
151 printk(KERN_ERR "Please provide none-null label\n");
152 }
153
154 if (label)
155 return strcmp(str_ident[ident].name, label);
156 else
157 return -EINVAL;
158 }
159
160 #define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
161 #define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
162 #define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
163 #define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
164 #define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
165
166 DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
167 DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE));
168 DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM);
169
170 inline int check_gpio(unsigned gpio)
171 {
172 #if defined(CONFIG_BF54x)
173 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
174 || gpio == GPIO_PH14 || gpio == GPIO_PH15
175 || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
176 return -EINVAL;
177 #endif
178 if (gpio >= MAX_BLACKFIN_GPIOS)
179 return -EINVAL;
180 return 0;
181 }
182
183 static void port_setup(unsigned gpio, unsigned short usage)
184 {
185 #if defined(BF538_FAMILY)
186 /*
187 * BF538/9 Port C,D and E are special.
188 * Inverted PORT_FER polarity on CDE and no PORF_FER on F
189 * Regular PORT F GPIOs are handled here, CDE are exclusively
190 * managed by GPIOLIB
191 */
192
193 if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
194 return;
195
196 gpio -= MAX_BLACKFIN_GPIOS;
197
198 if (usage == GPIO_USAGE)
199 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
200 else
201 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
202 SSYNC();
203 return;
204 #endif
205
206 if (check_gpio(gpio))
207 return;
208
209 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
210 if (usage == GPIO_USAGE)
211 *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
212 else
213 *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
214 SSYNC();
215 #elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
216 if (usage == GPIO_USAGE)
217 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
218 else
219 gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
220 SSYNC();
221 #endif
222 }
223
224 #ifdef BF537_FAMILY
225 static const s8 port_mux[] = {
226 [GPIO_PF0] = 3,
227 [GPIO_PF1] = 3,
228 [GPIO_PF2] = 4,
229 [GPIO_PF3] = 4,
230 [GPIO_PF4] = 5,
231 [GPIO_PF5] = 6,
232 [GPIO_PF6] = 7,
233 [GPIO_PF7] = 8,
234 [GPIO_PF8 ... GPIO_PF15] = -1,
235 [GPIO_PG0 ... GPIO_PG7] = -1,
236 [GPIO_PG8] = 9,
237 [GPIO_PG9] = 9,
238 [GPIO_PG10] = 10,
239 [GPIO_PG11] = 10,
240 [GPIO_PG12] = 10,
241 [GPIO_PG13] = 11,
242 [GPIO_PG14] = 11,
243 [GPIO_PG15] = 11,
244 [GPIO_PH0 ... GPIO_PH15] = -1,
245 [PORT_PJ0 ... PORT_PJ3] = -1,
246 [PORT_PJ4] = 1,
247 [PORT_PJ5] = 1,
248 [PORT_PJ6 ... PORT_PJ9] = -1,
249 [PORT_PJ10] = 0,
250 [PORT_PJ11] = 0,
251 };
252
253 static int portmux_group_check(unsigned short per)
254 {
255 u16 ident = P_IDENT(per);
256 u16 function = P_FUNCT2MUX(per);
257 s8 offset = port_mux[ident];
258 u16 m, pmux, pfunc;
259
260 if (offset < 0)
261 return 0;
262
263 pmux = bfin_read_PORT_MUX();
264 for (m = 0; m < ARRAY_SIZE(port_mux); ++m) {
265 if (m == ident)
266 continue;
267 if (port_mux[m] != offset)
268 continue;
269 if (!is_reserved(peri, m, 1))
270 continue;
271
272 if (offset == 1)
273 pfunc = (pmux >> offset) & 3;
274 else
275 pfunc = (pmux >> offset) & 1;
276 if (pfunc != function) {
277 pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
278 ident, function, m, pfunc);
279 return -EINVAL;
280 }
281 }
282
283 return 0;
284 }
285
286 static void portmux_setup(unsigned short per)
287 {
288 u16 ident = P_IDENT(per);
289 u16 function = P_FUNCT2MUX(per);
290 s8 offset = port_mux[ident];
291 u16 pmux;
292
293 if (offset == -1)
294 return;
295
296 pmux = bfin_read_PORT_MUX();
297 if (offset != 1)
298 pmux &= ~(1 << offset);
299 else
300 pmux &= ~(3 << 1);
301 pmux |= (function << offset);
302 bfin_write_PORT_MUX(pmux);
303 }
304 #elif defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
305 inline void portmux_setup(unsigned short per)
306 {
307 u16 ident = P_IDENT(per);
308 u16 function = P_FUNCT2MUX(per);
309 u32 pmux;
310
311 pmux = gpio_array[gpio_bank(ident)]->port_mux;
312
313 pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
314 pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
315
316 gpio_array[gpio_bank(ident)]->port_mux = pmux;
317 }
318
319 inline u16 get_portmux(unsigned short per)
320 {
321 u16 ident = P_IDENT(per);
322 u32 pmux = gpio_array[gpio_bank(ident)]->port_mux;
323 return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
324 }
325 static int portmux_group_check(unsigned short per)
326 {
327 return 0;
328 }
329 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
330 static int portmux_group_check(unsigned short per)
331 {
332 u16 ident = P_IDENT(per);
333 u16 function = P_FUNCT2MUX(per);
334 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
335 u16 pin, gpiopin, pfunc;
336
337 for (pin = 0; pin < GPIO_BANKSIZE; ++pin) {
338 if (offset != pmux_offset[gpio_bank(ident)][pin])
339 continue;
340
341 gpiopin = gpio_bank(ident) * GPIO_BANKSIZE + pin;
342 if (gpiopin == ident)
343 continue;
344 if (!is_reserved(peri, gpiopin, 1))
345 continue;
346
347 pfunc = *port_mux[gpio_bank(ident)];
348 pfunc = (pfunc >> offset) & 3;
349 if (pfunc != function) {
350 pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
351 ident, function, gpiopin, pfunc);
352 return -EINVAL;
353 }
354 }
355
356 return 0;
357 }
358
359 inline void portmux_setup(unsigned short per)
360 {
361 u16 ident = P_IDENT(per);
362 u16 function = P_FUNCT2MUX(per);
363 u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
364 u16 pmux;
365
366 pmux = *port_mux[gpio_bank(ident)];
367 if (((pmux >> offset) & 3) == function)
368 return;
369 pmux &= ~(3 << offset);
370 pmux |= (function & 3) << offset;
371 *port_mux[gpio_bank(ident)] = pmux;
372 SSYNC();
373 }
374 #else
375 # define portmux_setup(...) do { } while (0)
376 static int portmux_group_check(unsigned short per)
377 {
378 return 0;
379 }
380 #endif
381
382 #if !(defined(CONFIG_BF54x) || defined(CONFIG_BF60x))
383 /***********************************************************
384 *
385 * FUNCTIONS: Blackfin General Purpose Ports Access Functions
386 *
387 * INPUTS/OUTPUTS:
388 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
389 *
390 *
391 * DESCRIPTION: These functions abstract direct register access
392 * to Blackfin processor General Purpose
393 * Ports Regsiters
394 *
395 * CAUTION: These functions do not belong to the GPIO Driver API
396 *************************************************************
397 * MODIFICATION HISTORY :
398 **************************************************************/
399
400 /* Set a specific bit */
401
402 #define SET_GPIO(name) \
403 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
404 { \
405 unsigned long flags; \
406 flags = hard_local_irq_save(); \
407 if (arg) \
408 gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
409 else \
410 gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
411 AWA_DUMMY_READ(name); \
412 hard_local_irq_restore(flags); \
413 } \
414 EXPORT_SYMBOL(set_gpio_ ## name);
415
416 SET_GPIO(dir) /* set_gpio_dir() */
417 SET_GPIO(inen) /* set_gpio_inen() */
418 SET_GPIO(polar) /* set_gpio_polar() */
419 SET_GPIO(edge) /* set_gpio_edge() */
420 SET_GPIO(both) /* set_gpio_both() */
421
422
423 #define SET_GPIO_SC(name) \
424 void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
425 { \
426 unsigned long flags; \
427 if (ANOMALY_05000311 || ANOMALY_05000323) \
428 flags = hard_local_irq_save(); \
429 if (arg) \
430 gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
431 else \
432 gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
433 if (ANOMALY_05000311 || ANOMALY_05000323) { \
434 AWA_DUMMY_READ(name); \
435 hard_local_irq_restore(flags); \
436 } \
437 } \
438 EXPORT_SYMBOL(set_gpio_ ## name);
439
440 SET_GPIO_SC(maska)
441 SET_GPIO_SC(maskb)
442 SET_GPIO_SC(data)
443
444 void set_gpio_toggle(unsigned gpio)
445 {
446 unsigned long flags;
447 if (ANOMALY_05000311 || ANOMALY_05000323)
448 flags = hard_local_irq_save();
449 gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
450 if (ANOMALY_05000311 || ANOMALY_05000323) {
451 AWA_DUMMY_READ(toggle);
452 hard_local_irq_restore(flags);
453 }
454 }
455 EXPORT_SYMBOL(set_gpio_toggle);
456
457
458 /*Set current PORT date (16-bit word)*/
459
460 #define SET_GPIO_P(name) \
461 void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
462 { \
463 unsigned long flags; \
464 if (ANOMALY_05000311 || ANOMALY_05000323) \
465 flags = hard_local_irq_save(); \
466 gpio_array[gpio_bank(gpio)]->name = arg; \
467 if (ANOMALY_05000311 || ANOMALY_05000323) { \
468 AWA_DUMMY_READ(name); \
469 hard_local_irq_restore(flags); \
470 } \
471 } \
472 EXPORT_SYMBOL(set_gpiop_ ## name);
473
474 SET_GPIO_P(data)
475 SET_GPIO_P(dir)
476 SET_GPIO_P(inen)
477 SET_GPIO_P(polar)
478 SET_GPIO_P(edge)
479 SET_GPIO_P(both)
480 SET_GPIO_P(maska)
481 SET_GPIO_P(maskb)
482
483 /* Get a specific bit */
484 #define GET_GPIO(name) \
485 unsigned short get_gpio_ ## name(unsigned gpio) \
486 { \
487 unsigned long flags; \
488 unsigned short ret; \
489 if (ANOMALY_05000311 || ANOMALY_05000323) \
490 flags = hard_local_irq_save(); \
491 ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
492 if (ANOMALY_05000311 || ANOMALY_05000323) { \
493 AWA_DUMMY_READ(name); \
494 hard_local_irq_restore(flags); \
495 } \
496 return ret; \
497 } \
498 EXPORT_SYMBOL(get_gpio_ ## name);
499
500 GET_GPIO(data)
501 GET_GPIO(dir)
502 GET_GPIO(inen)
503 GET_GPIO(polar)
504 GET_GPIO(edge)
505 GET_GPIO(both)
506 GET_GPIO(maska)
507 GET_GPIO(maskb)
508
509 /*Get current PORT date (16-bit word)*/
510
511 #define GET_GPIO_P(name) \
512 unsigned short get_gpiop_ ## name(unsigned gpio) \
513 { \
514 unsigned long flags; \
515 unsigned short ret; \
516 if (ANOMALY_05000311 || ANOMALY_05000323) \
517 flags = hard_local_irq_save(); \
518 ret = (gpio_array[gpio_bank(gpio)]->name); \
519 if (ANOMALY_05000311 || ANOMALY_05000323) { \
520 AWA_DUMMY_READ(name); \
521 hard_local_irq_restore(flags); \
522 } \
523 return ret; \
524 } \
525 EXPORT_SYMBOL(get_gpiop_ ## name);
526
527 GET_GPIO_P(data)
528 GET_GPIO_P(dir)
529 GET_GPIO_P(inen)
530 GET_GPIO_P(polar)
531 GET_GPIO_P(edge)
532 GET_GPIO_P(both)
533 GET_GPIO_P(maska)
534 GET_GPIO_P(maskb)
535
536
537 #ifdef CONFIG_PM
538 DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM);
539
540 static const unsigned int sic_iwr_irqs[] = {
541 #if defined(BF533_FAMILY)
542 IRQ_PROG_INTB
543 #elif defined(BF537_FAMILY)
544 IRQ_PF_INTB_WATCH, IRQ_PORTG_INTB, IRQ_PH_INTB_MAC_TX
545 #elif defined(BF538_FAMILY)
546 IRQ_PORTF_INTB
547 #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
548 IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
549 #elif defined(BF561_FAMILY)
550 IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
551 #else
552 # error no SIC_IWR defined
553 #endif
554 };
555
556 /***********************************************************
557 *
558 * FUNCTIONS: Blackfin PM Setup API
559 *
560 * INPUTS/OUTPUTS:
561 * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
562 * type -
563 * PM_WAKE_RISING
564 * PM_WAKE_FALLING
565 * PM_WAKE_HIGH
566 * PM_WAKE_LOW
567 * PM_WAKE_BOTH_EDGES
568 *
569 * DESCRIPTION: Blackfin PM Driver API
570 *
571 * CAUTION:
572 *************************************************************
573 * MODIFICATION HISTORY :
574 **************************************************************/
575 int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
576 {
577 unsigned long flags;
578
579 if (check_gpio(gpio) < 0)
580 return -EINVAL;
581
582 flags = hard_local_irq_save();
583 if (ctrl)
584 reserve(wakeup, gpio);
585 else
586 unreserve(wakeup, gpio);
587
588 set_gpio_maskb(gpio, ctrl);
589 hard_local_irq_restore(flags);
590
591 return 0;
592 }
593
594 int bfin_pm_standby_ctrl(unsigned ctrl)
595 {
596 u16 bank, mask, i;
597
598 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
599 mask = map_entry(wakeup, i);
600 bank = gpio_bank(i);
601
602 if (mask)
603 bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
604 }
605 return 0;
606 }
607
608 void bfin_gpio_pm_hibernate_suspend(void)
609 {
610 int i, bank;
611
612 #ifdef BF538_FAMILY
613 for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
614 port_fer_saved[i] = *port_fer[i];
615 #endif
616
617 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
618 bank = gpio_bank(i);
619
620 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
621 gpio_bank_saved[bank].fer = *port_fer[bank];
622 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
623 gpio_bank_saved[bank].mux = *port_mux[bank];
624 #else
625 if (bank == 0)
626 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
627 #endif
628 #endif
629 gpio_bank_saved[bank].data = gpio_array[bank]->data;
630 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
631 gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
632 gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
633 gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
634 gpio_bank_saved[bank].both = gpio_array[bank]->both;
635 gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
636 }
637
638 #ifdef BFIN_SPECIAL_GPIO_BANKS
639 bfin_special_gpio_pm_hibernate_suspend();
640 #endif
641
642 AWA_DUMMY_READ(maska);
643 }
644
645 void bfin_gpio_pm_hibernate_restore(void)
646 {
647 int i, bank;
648
649 #ifdef BF538_FAMILY
650 for (i = 0; i < ARRAY_SIZE(port_fer_saved); ++i)
651 *port_fer[i] = port_fer_saved[i];
652 #endif
653
654 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
655 bank = gpio_bank(i);
656
657 #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
658 #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
659 *port_mux[bank] = gpio_bank_saved[bank].mux;
660 #else
661 if (bank == 0)
662 bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
663 #endif
664 *port_fer[bank] = gpio_bank_saved[bank].fer;
665 #endif
666 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
667 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
668 & gpio_bank_saved[bank].dir;
669 gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
670 gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
671 gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
672 gpio_array[bank]->both = gpio_bank_saved[bank].both;
673 gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
674 }
675
676 #ifdef BFIN_SPECIAL_GPIO_BANKS
677 bfin_special_gpio_pm_hibernate_restore();
678 #endif
679
680 AWA_DUMMY_READ(maska);
681 }
682
683
684 #endif
685 #else /* CONFIG_BF54x || CONFIG_BF60x */
686 #ifdef CONFIG_PM
687
688 int bfin_pm_standby_ctrl(unsigned ctrl)
689 {
690 return 0;
691 }
692
693 void bfin_gpio_pm_hibernate_suspend(void)
694 {
695 int i, bank;
696
697 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
698 bank = gpio_bank(i);
699
700 gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
701 gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
702 gpio_bank_saved[bank].data = gpio_array[bank]->data;
703 gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
704 gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
705 }
706 }
707
708 void bfin_gpio_pm_hibernate_restore(void)
709 {
710 int i, bank;
711
712 for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
713 bank = gpio_bank(i);
714
715 gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
716 gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
717 gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
718 gpio_array[bank]->data_set = gpio_bank_saved[bank].data
719 & gpio_bank_saved[bank].dir;
720 gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
721 }
722 }
723 #endif
724
725 unsigned short get_gpio_dir(unsigned gpio)
726 {
727 return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
728 }
729 EXPORT_SYMBOL(get_gpio_dir);
730
731 #endif /* CONFIG_BF54x || CONFIG_BF60x */
732
733 /***********************************************************
734 *
735 * FUNCTIONS: Blackfin Peripheral Resource Allocation
736 * and PortMux Setup
737 *
738 * INPUTS/OUTPUTS:
739 * per Peripheral Identifier
740 * label String
741 *
742 * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
743 *
744 * CAUTION:
745 *************************************************************
746 * MODIFICATION HISTORY :
747 **************************************************************/
748
749 int peripheral_request(unsigned short per, const char *label)
750 {
751 unsigned long flags;
752 unsigned short ident = P_IDENT(per);
753
754 /*
755 * Don't cares are pins with only one dedicated function
756 */
757
758 if (per & P_DONTCARE)
759 return 0;
760
761 if (!(per & P_DEFINED))
762 return -ENODEV;
763
764 BUG_ON(ident >= MAX_RESOURCES);
765
766 flags = hard_local_irq_save();
767
768 /* If a pin can be muxed as either GPIO or peripheral, make
769 * sure it is not already a GPIO pin when we request it.
770 */
771 if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
772 if (system_state == SYSTEM_BOOTING)
773 dump_stack();
774 printk(KERN_ERR
775 "%s: Peripheral %d is already reserved as GPIO by %s !\n",
776 __func__, ident, get_label(ident));
777 hard_local_irq_restore(flags);
778 return -EBUSY;
779 }
780
781 if (unlikely(is_reserved(peri, ident, 1))) {
782
783 /*
784 * Pin functions like AMC address strobes my
785 * be requested and used by several drivers
786 */
787
788 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
789 if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
790 #else
791 if (!(per & P_MAYSHARE)) {
792 #endif
793 /*
794 * Allow that the identical pin function can
795 * be requested from the same driver twice
796 */
797
798 if (cmp_label(ident, label) == 0)
799 goto anyway;
800
801 if (system_state == SYSTEM_BOOTING)
802 dump_stack();
803 printk(KERN_ERR
804 "%s: Peripheral %d function %d is already reserved by %s !\n",
805 __func__, ident, P_FUNCT2MUX(per), get_label(ident));
806 hard_local_irq_restore(flags);
807 return -EBUSY;
808 }
809 }
810
811 if (unlikely(portmux_group_check(per))) {
812 hard_local_irq_restore(flags);
813 return -EBUSY;
814 }
815 anyway:
816 reserve(peri, ident);
817
818 portmux_setup(per);
819 port_setup(ident, PERIPHERAL_USAGE);
820
821 hard_local_irq_restore(flags);
822 set_label(ident, label);
823
824 return 0;
825 }
826 EXPORT_SYMBOL(peripheral_request);
827
828 int peripheral_request_list(const unsigned short per[], const char *label)
829 {
830 u16 cnt;
831 int ret;
832
833 for (cnt = 0; per[cnt] != 0; cnt++) {
834
835 ret = peripheral_request(per[cnt], label);
836
837 if (ret < 0) {
838 for ( ; cnt > 0; cnt--)
839 peripheral_free(per[cnt - 1]);
840
841 return ret;
842 }
843 }
844
845 return 0;
846 }
847 EXPORT_SYMBOL(peripheral_request_list);
848
849 void peripheral_free(unsigned short per)
850 {
851 unsigned long flags;
852 unsigned short ident = P_IDENT(per);
853
854 if (per & P_DONTCARE)
855 return;
856
857 if (!(per & P_DEFINED))
858 return;
859
860 flags = hard_local_irq_save();
861
862 if (unlikely(!is_reserved(peri, ident, 0))) {
863 hard_local_irq_restore(flags);
864 return;
865 }
866
867 if (!(per & P_MAYSHARE))
868 port_setup(ident, GPIO_USAGE);
869
870 unreserve(peri, ident);
871
872 set_label(ident, "free");
873
874 hard_local_irq_restore(flags);
875 }
876 EXPORT_SYMBOL(peripheral_free);
877
878 void peripheral_free_list(const unsigned short per[])
879 {
880 u16 cnt;
881 for (cnt = 0; per[cnt] != 0; cnt++)
882 peripheral_free(per[cnt]);
883 }
884 EXPORT_SYMBOL(peripheral_free_list);
885
886 /***********************************************************
887 *
888 * FUNCTIONS: Blackfin GPIO Driver
889 *
890 * INPUTS/OUTPUTS:
891 * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
892 * label String
893 *
894 * DESCRIPTION: Blackfin GPIO Driver API
895 *
896 * CAUTION:
897 *************************************************************
898 * MODIFICATION HISTORY :
899 **************************************************************/
900
901 int bfin_gpio_request(unsigned gpio, const char *label)
902 {
903 unsigned long flags;
904
905 if (check_gpio(gpio) < 0)
906 return -EINVAL;
907
908 flags = hard_local_irq_save();
909
910 /*
911 * Allow that the identical GPIO can
912 * be requested from the same driver twice
913 * Do nothing and return -
914 */
915
916 if (cmp_label(gpio, label) == 0) {
917 hard_local_irq_restore(flags);
918 return 0;
919 }
920
921 if (unlikely(is_reserved(gpio, gpio, 1))) {
922 if (system_state == SYSTEM_BOOTING)
923 dump_stack();
924 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
925 gpio, get_label(gpio));
926 hard_local_irq_restore(flags);
927 return -EBUSY;
928 }
929 if (unlikely(is_reserved(peri, gpio, 1))) {
930 if (system_state == SYSTEM_BOOTING)
931 dump_stack();
932 printk(KERN_ERR
933 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
934 gpio, get_label(gpio));
935 hard_local_irq_restore(flags);
936 return -EBUSY;
937 }
938 if (unlikely(is_reserved(gpio_irq, gpio, 1))) {
939 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
940 " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
941 }
942 #if !(defined(CONFIG_BF54x) || defined(CONFIG_BF60x))
943 else { /* Reset POLAR setting when acquiring a gpio for the first time */
944 set_gpio_polar(gpio, 0);
945 }
946 #endif
947
948 reserve(gpio, gpio);
949 set_label(gpio, label);
950
951 hard_local_irq_restore(flags);
952
953 port_setup(gpio, GPIO_USAGE);
954
955 return 0;
956 }
957 EXPORT_SYMBOL(bfin_gpio_request);
958
959 void bfin_gpio_free(unsigned gpio)
960 {
961 unsigned long flags;
962
963 if (check_gpio(gpio) < 0)
964 return;
965
966 might_sleep();
967
968 flags = hard_local_irq_save();
969
970 if (unlikely(!is_reserved(gpio, gpio, 0))) {
971 if (system_state == SYSTEM_BOOTING)
972 dump_stack();
973 gpio_error(gpio);
974 hard_local_irq_restore(flags);
975 return;
976 }
977
978 unreserve(gpio, gpio);
979
980 set_label(gpio, "free");
981
982 hard_local_irq_restore(flags);
983 }
984 EXPORT_SYMBOL(bfin_gpio_free);
985
986 #ifdef BFIN_SPECIAL_GPIO_BANKS
987 DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
988
989 int bfin_special_gpio_request(unsigned gpio, const char *label)
990 {
991 unsigned long flags;
992
993 flags = hard_local_irq_save();
994
995 /*
996 * Allow that the identical GPIO can
997 * be requested from the same driver twice
998 * Do nothing and return -
999 */
1000
1001 if (cmp_label(gpio, label) == 0) {
1002 hard_local_irq_restore(flags);
1003 return 0;
1004 }
1005
1006 if (unlikely(is_reserved(special_gpio, gpio, 1))) {
1007 hard_local_irq_restore(flags);
1008 printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
1009 gpio, get_label(gpio));
1010
1011 return -EBUSY;
1012 }
1013 if (unlikely(is_reserved(peri, gpio, 1))) {
1014 hard_local_irq_restore(flags);
1015 printk(KERN_ERR
1016 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1017 gpio, get_label(gpio));
1018
1019 return -EBUSY;
1020 }
1021
1022 reserve(special_gpio, gpio);
1023 reserve(peri, gpio);
1024
1025 set_label(gpio, label);
1026 hard_local_irq_restore(flags);
1027 port_setup(gpio, GPIO_USAGE);
1028
1029 return 0;
1030 }
1031 EXPORT_SYMBOL(bfin_special_gpio_request);
1032
1033 void bfin_special_gpio_free(unsigned gpio)
1034 {
1035 unsigned long flags;
1036
1037 might_sleep();
1038
1039 flags = hard_local_irq_save();
1040
1041 if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
1042 gpio_error(gpio);
1043 hard_local_irq_restore(flags);
1044 return;
1045 }
1046
1047 unreserve(special_gpio, gpio);
1048 unreserve(peri, gpio);
1049 set_label(gpio, "free");
1050 hard_local_irq_restore(flags);
1051 }
1052 EXPORT_SYMBOL(bfin_special_gpio_free);
1053 #endif
1054
1055
1056 int bfin_gpio_irq_request(unsigned gpio, const char *label)
1057 {
1058 unsigned long flags;
1059
1060 if (check_gpio(gpio) < 0)
1061 return -EINVAL;
1062
1063 flags = hard_local_irq_save();
1064
1065 if (unlikely(is_reserved(peri, gpio, 1))) {
1066 if (system_state == SYSTEM_BOOTING)
1067 dump_stack();
1068 printk(KERN_ERR
1069 "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
1070 gpio, get_label(gpio));
1071 hard_local_irq_restore(flags);
1072 return -EBUSY;
1073 }
1074 if (unlikely(is_reserved(gpio, gpio, 1)))
1075 printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
1076 "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
1077 gpio, get_label(gpio));
1078
1079 reserve(gpio_irq, gpio);
1080 set_label(gpio, label);
1081
1082 hard_local_irq_restore(flags);
1083
1084 port_setup(gpio, GPIO_USAGE);
1085
1086 return 0;
1087 }
1088
1089 void bfin_gpio_irq_free(unsigned gpio)
1090 {
1091 unsigned long flags;
1092
1093 if (check_gpio(gpio) < 0)
1094 return;
1095
1096 flags = hard_local_irq_save();
1097
1098 if (unlikely(!is_reserved(gpio_irq, gpio, 0))) {
1099 if (system_state == SYSTEM_BOOTING)
1100 dump_stack();
1101 gpio_error(gpio);
1102 hard_local_irq_restore(flags);
1103 return;
1104 }
1105
1106 unreserve(gpio_irq, gpio);
1107
1108 set_label(gpio, "free");
1109
1110 hard_local_irq_restore(flags);
1111 }
1112
1113 static inline void __bfin_gpio_direction_input(unsigned gpio)
1114 {
1115 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
1116 gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
1117 #else
1118 gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
1119 #endif
1120 gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
1121 }
1122
1123 int bfin_gpio_direction_input(unsigned gpio)
1124 {
1125 unsigned long flags;
1126
1127 if (unlikely(!is_reserved(gpio, gpio, 0))) {
1128 gpio_error(gpio);
1129 return -EINVAL;
1130 }
1131
1132 flags = hard_local_irq_save();
1133 __bfin_gpio_direction_input(gpio);
1134 AWA_DUMMY_READ(inen);
1135 hard_local_irq_restore(flags);
1136
1137 return 0;
1138 }
1139 EXPORT_SYMBOL(bfin_gpio_direction_input);
1140
1141 void bfin_gpio_irq_prepare(unsigned gpio)
1142 {
1143 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
1144 unsigned long flags;
1145 #endif
1146
1147 port_setup(gpio, GPIO_USAGE);
1148
1149 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
1150 flags = hard_local_irq_save();
1151 __bfin_gpio_direction_input(gpio);
1152 hard_local_irq_restore(flags);
1153 #endif
1154 }
1155
1156 void bfin_gpio_set_value(unsigned gpio, int arg)
1157 {
1158 if (arg)
1159 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1160 else
1161 gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
1162 }
1163 EXPORT_SYMBOL(bfin_gpio_set_value);
1164
1165 int bfin_gpio_direction_output(unsigned gpio, int value)
1166 {
1167 unsigned long flags;
1168
1169 if (unlikely(!is_reserved(gpio, gpio, 0))) {
1170 gpio_error(gpio);
1171 return -EINVAL;
1172 }
1173
1174 flags = hard_local_irq_save();
1175
1176 gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
1177 gpio_set_value(gpio, value);
1178 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
1179 gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
1180 #else
1181 gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
1182 #endif
1183
1184 AWA_DUMMY_READ(dir);
1185 hard_local_irq_restore(flags);
1186
1187 return 0;
1188 }
1189 EXPORT_SYMBOL(bfin_gpio_direction_output);
1190
1191 int bfin_gpio_get_value(unsigned gpio)
1192 {
1193 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
1194 return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
1195 #else
1196 unsigned long flags;
1197
1198 if (unlikely(get_gpio_edge(gpio))) {
1199 int ret;
1200 flags = hard_local_irq_save();
1201 set_gpio_edge(gpio, 0);
1202 ret = get_gpio_data(gpio);
1203 set_gpio_edge(gpio, 1);
1204 hard_local_irq_restore(flags);
1205 return ret;
1206 } else
1207 return get_gpio_data(gpio);
1208 #endif
1209 }
1210 EXPORT_SYMBOL(bfin_gpio_get_value);
1211
1212 /* If we are booting from SPI and our board lacks a strong enough pull up,
1213 * the core can reset and execute the bootrom faster than the resistor can
1214 * pull the signal logically high. To work around this (common) error in
1215 * board design, we explicitly set the pin back to GPIO mode, force /CS
1216 * high, and wait for the electrons to do their thing.
1217 *
1218 * This function only makes sense to be called from reset code, but it
1219 * lives here as we need to force all the GPIO states w/out going through
1220 * BUG() checks and such.
1221 */
1222 void bfin_reset_boot_spi_cs(unsigned short pin)
1223 {
1224 unsigned short gpio = P_IDENT(pin);
1225 port_setup(gpio, GPIO_USAGE);
1226 gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
1227 AWA_DUMMY_READ(data_set);
1228 udelay(1);
1229 }
1230
1231 #if defined(CONFIG_PROC_FS)
1232 static int gpio_proc_show(struct seq_file *m, void *v)
1233 {
1234 int c, irq, gpio;
1235
1236 for (c = 0; c < MAX_RESOURCES; c++) {
1237 irq = is_reserved(gpio_irq, c, 1);
1238 gpio = is_reserved(gpio, c, 1);
1239 if (!check_gpio(c) && (gpio || irq))
1240 seq_printf(m, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
1241 get_label(c), (gpio && irq) ? " *" : "",
1242 get_gpio_dir(c) ? "OUTPUT" : "INPUT");
1243 else if (is_reserved(peri, c, 1))
1244 seq_printf(m, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
1245 else
1246 continue;
1247 }
1248
1249 return 0;
1250 }
1251
1252 static int gpio_proc_open(struct inode *inode, struct file *file)
1253 {
1254 return single_open(file, gpio_proc_show, NULL);
1255 }
1256
1257 static const struct file_operations gpio_proc_ops = {
1258 .open = gpio_proc_open,
1259 .read = seq_read,
1260 .llseek = seq_lseek,
1261 .release = single_release,
1262 };
1263
1264 static __init int gpio_register_proc(void)
1265 {
1266 struct proc_dir_entry *proc_gpio;
1267
1268 proc_gpio = proc_create("gpio", S_IRUGO, NULL, &gpio_proc_ops);
1269 return proc_gpio != NULL;
1270 }
1271 __initcall(gpio_register_proc);
1272 #endif
1273
1274 #ifdef CONFIG_GPIOLIB
1275 static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
1276 {
1277 return bfin_gpio_direction_input(gpio);
1278 }
1279
1280 static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
1281 {
1282 return bfin_gpio_direction_output(gpio, level);
1283 }
1284
1285 static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
1286 {
1287 return bfin_gpio_get_value(gpio);
1288 }
1289
1290 static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
1291 {
1292 return bfin_gpio_set_value(gpio, value);
1293 }
1294
1295 static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
1296 {
1297 return bfin_gpio_request(gpio, chip->label);
1298 }
1299
1300 static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
1301 {
1302 return bfin_gpio_free(gpio);
1303 }
1304
1305 static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
1306 {
1307 return gpio + GPIO_IRQ_BASE;
1308 }
1309
1310 static struct gpio_chip bfin_chip = {
1311 .label = "BFIN-GPIO",
1312 .direction_input = bfin_gpiolib_direction_input,
1313 .get = bfin_gpiolib_get_value,
1314 .direction_output = bfin_gpiolib_direction_output,
1315 .set = bfin_gpiolib_set_value,
1316 .request = bfin_gpiolib_gpio_request,
1317 .free = bfin_gpiolib_gpio_free,
1318 .to_irq = bfin_gpiolib_gpio_to_irq,
1319 .base = 0,
1320 .ngpio = MAX_BLACKFIN_GPIOS,
1321 };
1322
1323 static int __init bfin_gpiolib_setup(void)
1324 {
1325 return gpiochip_add(&bfin_chip);
1326 }
1327 arch_initcall(bfin_gpiolib_setup);
1328 #endif
Linux ARM platform port for MOXA ART SoC