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initial commit with v3.6.7
[linux-3.6.7-moxart.git] / drivers / net / ethernet / atheros / atl1e / atl1e_main.c
bloba98acc8a956f9bba8f4c12c39322e3e63b51e443
1 /*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1e.h"
23
24 #define DRV_VERSION "1.0.0.7-NAPI"
25
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29 /*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static DEFINE_PCI_DEVICE_TABLE(atl1e_pci_tbl) = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
50
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
52
53 static const u16
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60 };
61
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 {
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68 };
69
70 static const u16
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77 };
78
79 static const u16
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86 };
87
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90 };
91
92 /**
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 {
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103 }
104
105 /**
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 {
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115 }
116
117 /**
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 {
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127 }
128
129 /**
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133 static void atl1e_phy_config(unsigned long data)
134 {
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142 }
143
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145 {
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153 }
154
155 static void atl1e_reset_task(struct work_struct *work)
156 {
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161 }
162
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 {
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
167 int err = 0;
168 u16 speed, duplex, phy_data;
169
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211 }
212
213 /**
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217 static void atl1e_link_chg_task(struct work_struct *work)
218 {
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226 }
227
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229 {
230 struct net_device *netdev = adapter->netdev;
231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249 }
250
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
252 {
253 del_timer_sync(&adapter->phy_config_timer);
254 }
255
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257 {
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260 }
261
262 /**
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266 static void atl1e_tx_timeout(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272 }
273
274 /**
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283 static void atl1e_set_multi(struct net_device *netdev)
284 {
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
313 }
314 }
315
316 static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
317 {
318 if (features & NETIF_F_HW_VLAN_RX) {
319 /* enable VLAN tag insert/strip */
320 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
321 } else {
322 /* disable VLAN tag insert/strip */
323 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
324 }
325 }
326
327 static void atl1e_vlan_mode(struct net_device *netdev,
328 netdev_features_t features)
329 {
330 struct atl1e_adapter *adapter = netdev_priv(netdev);
331 u32 mac_ctrl_data = 0;
332
333 netdev_dbg(adapter->netdev, "%s\n", __func__);
334
335 atl1e_irq_disable(adapter);
336 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
337 __atl1e_vlan_mode(features, &mac_ctrl_data);
338 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
339 atl1e_irq_enable(adapter);
340 }
341
342 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
343 {
344 netdev_dbg(adapter->netdev, "%s\n", __func__);
345 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
346 }
347
348 /**
349 * atl1e_set_mac - Change the Ethernet Address of the NIC
350 * @netdev: network interface device structure
351 * @p: pointer to an address structure
352 *
353 * Returns 0 on success, negative on failure
354 */
355 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
356 {
357 struct atl1e_adapter *adapter = netdev_priv(netdev);
358 struct sockaddr *addr = p;
359
360 if (!is_valid_ether_addr(addr->sa_data))
361 return -EADDRNOTAVAIL;
362
363 if (netif_running(netdev))
364 return -EBUSY;
365
366 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
367 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
368
369 atl1e_hw_set_mac_addr(&adapter->hw);
370
371 return 0;
372 }
373
374 static netdev_features_t atl1e_fix_features(struct net_device *netdev,
375 netdev_features_t features)
376 {
377 /*
378 * Since there is no support for separate rx/tx vlan accel
379 * enable/disable make sure tx flag is always in same state as rx.
380 */
381 if (features & NETIF_F_HW_VLAN_RX)
382 features |= NETIF_F_HW_VLAN_TX;
383 else
384 features &= ~NETIF_F_HW_VLAN_TX;
385
386 return features;
387 }
388
389 static int atl1e_set_features(struct net_device *netdev,
390 netdev_features_t features)
391 {
392 netdev_features_t changed = netdev->features ^ features;
393
394 if (changed & NETIF_F_HW_VLAN_RX)
395 atl1e_vlan_mode(netdev, features);
396
397 return 0;
398 }
399
400 /**
401 * atl1e_change_mtu - Change the Maximum Transfer Unit
402 * @netdev: network interface device structure
403 * @new_mtu: new value for maximum frame size
404 *
405 * Returns 0 on success, negative on failure
406 */
407 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
408 {
409 struct atl1e_adapter *adapter = netdev_priv(netdev);
410 int old_mtu = netdev->mtu;
411 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
412
413 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
414 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
415 netdev_warn(adapter->netdev, "invalid MTU setting\n");
416 return -EINVAL;
417 }
418 /* set MTU */
419 if (old_mtu != new_mtu && netif_running(netdev)) {
420 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
421 msleep(1);
422 netdev->mtu = new_mtu;
423 adapter->hw.max_frame_size = new_mtu;
424 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
425 atl1e_down(adapter);
426 atl1e_up(adapter);
427 clear_bit(__AT_RESETTING, &adapter->flags);
428 }
429 return 0;
430 }
431
432 /*
433 * caller should hold mdio_lock
434 */
435 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
436 {
437 struct atl1e_adapter *adapter = netdev_priv(netdev);
438 u16 result;
439
440 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
441 return result;
442 }
443
444 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
445 int reg_num, int val)
446 {
447 struct atl1e_adapter *adapter = netdev_priv(netdev);
448
449 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
450 }
451
452 static int atl1e_mii_ioctl(struct net_device *netdev,
453 struct ifreq *ifr, int cmd)
454 {
455 struct atl1e_adapter *adapter = netdev_priv(netdev);
456 struct mii_ioctl_data *data = if_mii(ifr);
457 unsigned long flags;
458 int retval = 0;
459
460 if (!netif_running(netdev))
461 return -EINVAL;
462
463 spin_lock_irqsave(&adapter->mdio_lock, flags);
464 switch (cmd) {
465 case SIOCGMIIPHY:
466 data->phy_id = 0;
467 break;
468
469 case SIOCGMIIREG:
470 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
471 &data->val_out)) {
472 retval = -EIO;
473 goto out;
474 }
475 break;
476
477 case SIOCSMIIREG:
478 if (data->reg_num & ~(0x1F)) {
479 retval = -EFAULT;
480 goto out;
481 }
482
483 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
484 data->reg_num, data->val_in);
485 if (atl1e_write_phy_reg(&adapter->hw,
486 data->reg_num, data->val_in)) {
487 retval = -EIO;
488 goto out;
489 }
490 break;
491
492 default:
493 retval = -EOPNOTSUPP;
494 break;
495 }
496 out:
497 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
498 return retval;
499
500 }
501
502 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
503 {
504 switch (cmd) {
505 case SIOCGMIIPHY:
506 case SIOCGMIIREG:
507 case SIOCSMIIREG:
508 return atl1e_mii_ioctl(netdev, ifr, cmd);
509 default:
510 return -EOPNOTSUPP;
511 }
512 }
513
514 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
515 {
516 u16 cmd;
517
518 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
519 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
520 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
521 pci_write_config_word(pdev, PCI_COMMAND, cmd);
522
523 /*
524 * some motherboards BIOS(PXE/EFI) driver may set PME
525 * while they transfer control to OS (Windows/Linux)
526 * so we should clear this bit before NIC work normally
527 */
528 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
529 msleep(1);
530 }
531
532 /**
533 * atl1e_alloc_queues - Allocate memory for all rings
534 * @adapter: board private structure to initialize
535 *
536 */
537 static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter)
538 {
539 return 0;
540 }
541
542 /**
543 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
544 * @adapter: board private structure to initialize
545 *
546 * atl1e_sw_init initializes the Adapter private data structure.
547 * Fields are initialized based on PCI device information and
548 * OS network device settings (MTU size).
549 */
550 static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter)
551 {
552 struct atl1e_hw *hw = &adapter->hw;
553 struct pci_dev *pdev = adapter->pdev;
554 u32 phy_status_data = 0;
555
556 adapter->wol = 0;
557 adapter->link_speed = SPEED_0; /* hardware init */
558 adapter->link_duplex = FULL_DUPLEX;
559 adapter->num_rx_queues = 1;
560
561 /* PCI config space info */
562 hw->vendor_id = pdev->vendor;
563 hw->device_id = pdev->device;
564 hw->subsystem_vendor_id = pdev->subsystem_vendor;
565 hw->subsystem_id = pdev->subsystem_device;
566 hw->revision_id = pdev->revision;
567
568 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
569
570 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
571 /* nic type */
572 if (hw->revision_id >= 0xF0) {
573 hw->nic_type = athr_l2e_revB;
574 } else {
575 if (phy_status_data & PHY_STATUS_100M)
576 hw->nic_type = athr_l1e;
577 else
578 hw->nic_type = athr_l2e_revA;
579 }
580
581 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
582
583 if (phy_status_data & PHY_STATUS_EMI_CA)
584 hw->emi_ca = true;
585 else
586 hw->emi_ca = false;
587
588 hw->phy_configured = false;
589 hw->preamble_len = 7;
590 hw->max_frame_size = adapter->netdev->mtu;
591 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
592 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
593
594 hw->rrs_type = atl1e_rrs_disable;
595 hw->indirect_tab = 0;
596 hw->base_cpu = 0;
597
598 /* need confirm */
599
600 hw->ict = 50000; /* 100ms */
601 hw->smb_timer = 200000; /* 200ms */
602 hw->tpd_burst = 5;
603 hw->rrd_thresh = 1;
604 hw->tpd_thresh = adapter->tx_ring.count / 2;
605 hw->rx_count_down = 4; /* 2us resolution */
606 hw->tx_count_down = hw->imt * 4 / 3;
607 hw->dmar_block = atl1e_dma_req_1024;
608 hw->dmaw_block = atl1e_dma_req_1024;
609 hw->dmar_dly_cnt = 15;
610 hw->dmaw_dly_cnt = 4;
611
612 if (atl1e_alloc_queues(adapter)) {
613 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
614 return -ENOMEM;
615 }
616
617 atomic_set(&adapter->irq_sem, 1);
618 spin_lock_init(&adapter->mdio_lock);
619 spin_lock_init(&adapter->tx_lock);
620
621 set_bit(__AT_DOWN, &adapter->flags);
622
623 return 0;
624 }
625
626 /**
627 * atl1e_clean_tx_ring - Free Tx-skb
628 * @adapter: board private structure
629 */
630 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
631 {
632 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
633 struct atl1e_tx_buffer *tx_buffer = NULL;
634 struct pci_dev *pdev = adapter->pdev;
635 u16 index, ring_count;
636
637 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
638 return;
639
640 ring_count = tx_ring->count;
641 /* first unmmap dma */
642 for (index = 0; index < ring_count; index++) {
643 tx_buffer = &tx_ring->tx_buffer[index];
644 if (tx_buffer->dma) {
645 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
646 pci_unmap_single(pdev, tx_buffer->dma,
647 tx_buffer->length, PCI_DMA_TODEVICE);
648 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
649 pci_unmap_page(pdev, tx_buffer->dma,
650 tx_buffer->length, PCI_DMA_TODEVICE);
651 tx_buffer->dma = 0;
652 }
653 }
654 /* second free skb */
655 for (index = 0; index < ring_count; index++) {
656 tx_buffer = &tx_ring->tx_buffer[index];
657 if (tx_buffer->skb) {
658 dev_kfree_skb_any(tx_buffer->skb);
659 tx_buffer->skb = NULL;
660 }
661 }
662 /* Zero out Tx-buffers */
663 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
664 ring_count);
665 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
666 ring_count);
667 }
668
669 /**
670 * atl1e_clean_rx_ring - Free rx-reservation skbs
671 * @adapter: board private structure
672 */
673 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
674 {
675 struct atl1e_rx_ring *rx_ring =
676 &adapter->rx_ring;
677 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
678 u16 i, j;
679
680
681 if (adapter->ring_vir_addr == NULL)
682 return;
683 /* Zero out the descriptor ring */
684 for (i = 0; i < adapter->num_rx_queues; i++) {
685 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
686 if (rx_page_desc[i].rx_page[j].addr != NULL) {
687 memset(rx_page_desc[i].rx_page[j].addr, 0,
688 rx_ring->real_page_size);
689 }
690 }
691 }
692 }
693
694 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
695 {
696 *ring_size = ((u32)(adapter->tx_ring.count *
697 sizeof(struct atl1e_tpd_desc) + 7
698 /* tx ring, qword align */
699 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
700 adapter->num_rx_queues + 31
701 /* rx ring, 32 bytes align */
702 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
703 sizeof(u32) + 3));
704 /* tx, rx cmd, dword align */
705 }
706
707 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
708 {
709 struct atl1e_rx_ring *rx_ring = NULL;
710
711 rx_ring = &adapter->rx_ring;
712
713 rx_ring->real_page_size = adapter->rx_ring.page_size
714 + adapter->hw.max_frame_size
715 + ETH_HLEN + VLAN_HLEN
716 + ETH_FCS_LEN;
717 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
718 atl1e_cal_ring_size(adapter, &adapter->ring_size);
719
720 adapter->ring_vir_addr = NULL;
721 adapter->rx_ring.desc = NULL;
722 rwlock_init(&adapter->tx_ring.tx_lock);
723 }
724
725 /*
726 * Read / Write Ptr Initialize:
727 */
728 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
729 {
730 struct atl1e_tx_ring *tx_ring = NULL;
731 struct atl1e_rx_ring *rx_ring = NULL;
732 struct atl1e_rx_page_desc *rx_page_desc = NULL;
733 int i, j;
734
735 tx_ring = &adapter->tx_ring;
736 rx_ring = &adapter->rx_ring;
737 rx_page_desc = rx_ring->rx_page_desc;
738
739 tx_ring->next_to_use = 0;
740 atomic_set(&tx_ring->next_to_clean, 0);
741
742 for (i = 0; i < adapter->num_rx_queues; i++) {
743 rx_page_desc[i].rx_using = 0;
744 rx_page_desc[i].rx_nxseq = 0;
745 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
746 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
747 rx_page_desc[i].rx_page[j].read_offset = 0;
748 }
749 }
750 }
751
752 /**
753 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
754 * @adapter: board private structure
755 *
756 * Free all transmit software resources
757 */
758 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
759 {
760 struct pci_dev *pdev = adapter->pdev;
761
762 atl1e_clean_tx_ring(adapter);
763 atl1e_clean_rx_ring(adapter);
764
765 if (adapter->ring_vir_addr) {
766 pci_free_consistent(pdev, adapter->ring_size,
767 adapter->ring_vir_addr, adapter->ring_dma);
768 adapter->ring_vir_addr = NULL;
769 }
770
771 if (adapter->tx_ring.tx_buffer) {
772 kfree(adapter->tx_ring.tx_buffer);
773 adapter->tx_ring.tx_buffer = NULL;
774 }
775 }
776
777 /**
778 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
779 * @adapter: board private structure
780 *
781 * Return 0 on success, negative on failure
782 */
783 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
784 {
785 struct pci_dev *pdev = adapter->pdev;
786 struct atl1e_tx_ring *tx_ring;
787 struct atl1e_rx_ring *rx_ring;
788 struct atl1e_rx_page_desc *rx_page_desc;
789 int size, i, j;
790 u32 offset = 0;
791 int err = 0;
792
793 if (adapter->ring_vir_addr != NULL)
794 return 0; /* alloced already */
795
796 tx_ring = &adapter->tx_ring;
797 rx_ring = &adapter->rx_ring;
798
799 /* real ring DMA buffer */
800
801 size = adapter->ring_size;
802 adapter->ring_vir_addr = pci_alloc_consistent(pdev,
803 adapter->ring_size, &adapter->ring_dma);
804
805 if (adapter->ring_vir_addr == NULL) {
806 netdev_err(adapter->netdev,
807 "pci_alloc_consistent failed, size = D%d\n", size);
808 return -ENOMEM;
809 }
810
811 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
812
813 rx_page_desc = rx_ring->rx_page_desc;
814
815 /* Init TPD Ring */
816 tx_ring->dma = roundup(adapter->ring_dma, 8);
817 offset = tx_ring->dma - adapter->ring_dma;
818 tx_ring->desc = adapter->ring_vir_addr + offset;
819 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
820 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
821 if (tx_ring->tx_buffer == NULL) {
822 netdev_err(adapter->netdev, "kzalloc failed, size = D%d\n",
823 size);
824 err = -ENOMEM;
825 goto failed;
826 }
827
828 /* Init RXF-Pages */
829 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
830 offset = roundup(offset, 32);
831
832 for (i = 0; i < adapter->num_rx_queues; i++) {
833 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
834 rx_page_desc[i].rx_page[j].dma =
835 adapter->ring_dma + offset;
836 rx_page_desc[i].rx_page[j].addr =
837 adapter->ring_vir_addr + offset;
838 offset += rx_ring->real_page_size;
839 }
840 }
841
842 /* Init CMB dma address */
843 tx_ring->cmb_dma = adapter->ring_dma + offset;
844 tx_ring->cmb = adapter->ring_vir_addr + offset;
845 offset += sizeof(u32);
846
847 for (i = 0; i < adapter->num_rx_queues; i++) {
848 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
849 rx_page_desc[i].rx_page[j].write_offset_dma =
850 adapter->ring_dma + offset;
851 rx_page_desc[i].rx_page[j].write_offset_addr =
852 adapter->ring_vir_addr + offset;
853 offset += sizeof(u32);
854 }
855 }
856
857 if (unlikely(offset > adapter->ring_size)) {
858 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
859 offset, adapter->ring_size);
860 err = -1;
861 goto failed;
862 }
863
864 return 0;
865 failed:
866 if (adapter->ring_vir_addr != NULL) {
867 pci_free_consistent(pdev, adapter->ring_size,
868 adapter->ring_vir_addr, adapter->ring_dma);
869 adapter->ring_vir_addr = NULL;
870 }
871 return err;
872 }
873
874 static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
875 {
876
877 struct atl1e_hw *hw = &adapter->hw;
878 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
879 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
880 struct atl1e_rx_page_desc *rx_page_desc = NULL;
881 int i, j;
882
883 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
884 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
885 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
886 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
887 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
888 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
889 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
890
891 rx_page_desc = rx_ring->rx_page_desc;
892 /* RXF Page Physical address / Page Length */
893 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
894 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
895 (u32)((adapter->ring_dma &
896 AT_DMA_HI_ADDR_MASK) >> 32));
897 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
898 u32 page_phy_addr;
899 u32 offset_phy_addr;
900
901 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
902 offset_phy_addr =
903 rx_page_desc[i].rx_page[j].write_offset_dma;
904
905 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
906 page_phy_addr & AT_DMA_LO_ADDR_MASK);
907 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
908 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
909 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
910 }
911 }
912 /* Page Length */
913 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
914 /* Load all of base address above */
915 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
916 }
917
918 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
919 {
920 struct atl1e_hw *hw = &adapter->hw;
921 u32 dev_ctrl_data = 0;
922 u32 max_pay_load = 0;
923 u32 jumbo_thresh = 0;
924 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
925
926 /* configure TXQ param */
927 if (hw->nic_type != athr_l2e_revB) {
928 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
929 if (hw->max_frame_size <= 1500) {
930 jumbo_thresh = hw->max_frame_size + extra_size;
931 } else if (hw->max_frame_size < 6*1024) {
932 jumbo_thresh =
933 (hw->max_frame_size + extra_size) * 2 / 3;
934 } else {
935 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
936 }
937 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
938 }
939
940 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
941
942 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
943 DEVICE_CTRL_MAX_PAYLOAD_MASK;
944
945 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
946
947 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
948 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
949 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
950
951 if (hw->nic_type != athr_l2e_revB)
952 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
953 atl1e_pay_load_size[hw->dmar_block]);
954 /* enable TXQ */
955 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
956 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
957 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
958 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
959 }
960
961 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
962 {
963 struct atl1e_hw *hw = &adapter->hw;
964 u32 rxf_len = 0;
965 u32 rxf_low = 0;
966 u32 rxf_high = 0;
967 u32 rxf_thresh_data = 0;
968 u32 rxq_ctrl_data = 0;
969
970 if (hw->nic_type != athr_l2e_revB) {
971 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
972 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
973 RXQ_JMBOSZ_TH_SHIFT |
974 (1 & RXQ_JMBO_LKAH_MASK) <<
975 RXQ_JMBO_LKAH_SHIFT));
976
977 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
978 rxf_high = rxf_len * 4 / 5;
979 rxf_low = rxf_len / 5;
980 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
981 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
982 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
983 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
984
985 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
986 }
987
988 /* RRS */
989 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
990 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
991
992 if (hw->rrs_type & atl1e_rrs_ipv4)
993 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
994
995 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
996 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
997
998 if (hw->rrs_type & atl1e_rrs_ipv6)
999 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1000
1001 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1002 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1003
1004 if (hw->rrs_type != atl1e_rrs_disable)
1005 rxq_ctrl_data |=
1006 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1007
1008 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1009 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1010
1011 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1012 }
1013
1014 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1015 {
1016 struct atl1e_hw *hw = &adapter->hw;
1017 u32 dma_ctrl_data = 0;
1018
1019 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1020 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1021 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1022 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1023 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1024 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1025 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1026 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1027 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1028 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1029
1030 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1031 }
1032
1033 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1034 {
1035 u32 value;
1036 struct atl1e_hw *hw = &adapter->hw;
1037 struct net_device *netdev = adapter->netdev;
1038
1039 /* Config MAC CTRL Register */
1040 value = MAC_CTRL_TX_EN |
1041 MAC_CTRL_RX_EN ;
1042
1043 if (FULL_DUPLEX == adapter->link_duplex)
1044 value |= MAC_CTRL_DUPLX;
1045
1046 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1047 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1048 MAC_CTRL_SPEED_SHIFT);
1049 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1050
1051 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1052 value |= (((u32)adapter->hw.preamble_len &
1053 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1054
1055 __atl1e_vlan_mode(netdev->features, &value);
1056
1057 value |= MAC_CTRL_BC_EN;
1058 if (netdev->flags & IFF_PROMISC)
1059 value |= MAC_CTRL_PROMIS_EN;
1060 if (netdev->flags & IFF_ALLMULTI)
1061 value |= MAC_CTRL_MC_ALL_EN;
1062
1063 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1064 }
1065
1066 /**
1067 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1068 * @adapter: board private structure
1069 *
1070 * Configure the Tx /Rx unit of the MAC after a reset.
1071 */
1072 static int atl1e_configure(struct atl1e_adapter *adapter)
1073 {
1074 struct atl1e_hw *hw = &adapter->hw;
1075
1076 u32 intr_status_data = 0;
1077
1078 /* clear interrupt status */
1079 AT_WRITE_REG(hw, REG_ISR, ~0);
1080
1081 /* 1. set MAC Address */
1082 atl1e_hw_set_mac_addr(hw);
1083
1084 /* 2. Init the Multicast HASH table done by set_muti */
1085
1086 /* 3. Clear any WOL status */
1087 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1088
1089 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1090 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1091 * High 32bits memory */
1092 atl1e_configure_des_ring(adapter);
1093
1094 /* 5. set Interrupt Moderator Timer */
1095 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1096 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1097 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1098 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1099
1100 /* 6. rx/tx threshold to trig interrupt */
1101 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1102 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1103 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1104 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1105
1106 /* 7. set Interrupt Clear Timer */
1107 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1108
1109 /* 8. set MTU */
1110 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1111 VLAN_HLEN + ETH_FCS_LEN);
1112
1113 /* 9. config TXQ early tx threshold */
1114 atl1e_configure_tx(adapter);
1115
1116 /* 10. config RXQ */
1117 atl1e_configure_rx(adapter);
1118
1119 /* 11. config DMA Engine */
1120 atl1e_configure_dma(adapter);
1121
1122 /* 12. smb timer to trig interrupt */
1123 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1124
1125 intr_status_data = AT_READ_REG(hw, REG_ISR);
1126 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1127 netdev_err(adapter->netdev,
1128 "atl1e_configure failed, PCIE phy link down\n");
1129 return -1;
1130 }
1131
1132 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1133 return 0;
1134 }
1135
1136 /**
1137 * atl1e_get_stats - Get System Network Statistics
1138 * @netdev: network interface device structure
1139 *
1140 * Returns the address of the device statistics structure.
1141 * The statistics are actually updated from the timer callback.
1142 */
1143 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1144 {
1145 struct atl1e_adapter *adapter = netdev_priv(netdev);
1146 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1147 struct net_device_stats *net_stats = &netdev->stats;
1148
1149 net_stats->rx_packets = hw_stats->rx_ok;
1150 net_stats->tx_packets = hw_stats->tx_ok;
1151 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1152 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1153 net_stats->multicast = hw_stats->rx_mcast;
1154 net_stats->collisions = hw_stats->tx_1_col +
1155 hw_stats->tx_2_col * 2 +
1156 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1157
1158 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1159 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1160 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1161 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1162 net_stats->rx_length_errors = hw_stats->rx_len_err;
1163 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1164 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1165 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1166
1167 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1168
1169 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1170 hw_stats->tx_underrun + hw_stats->tx_trunc;
1171 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1172 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1173 net_stats->tx_window_errors = hw_stats->tx_late_col;
1174
1175 return net_stats;
1176 }
1177
1178 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1179 {
1180 u16 hw_reg_addr = 0;
1181 unsigned long *stats_item = NULL;
1182
1183 /* update rx status */
1184 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1185 stats_item = &adapter->hw_stats.rx_ok;
1186 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1187 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1188 stats_item++;
1189 hw_reg_addr += 4;
1190 }
1191 /* update tx status */
1192 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1193 stats_item = &adapter->hw_stats.tx_ok;
1194 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1195 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1196 stats_item++;
1197 hw_reg_addr += 4;
1198 }
1199 }
1200
1201 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1202 {
1203 u16 phy_data;
1204
1205 spin_lock(&adapter->mdio_lock);
1206 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1207 spin_unlock(&adapter->mdio_lock);
1208 }
1209
1210 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1211 {
1212 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1213 struct atl1e_tx_buffer *tx_buffer = NULL;
1214 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1215 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1216
1217 while (next_to_clean != hw_next_to_clean) {
1218 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1219 if (tx_buffer->dma) {
1220 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1221 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1222 tx_buffer->length, PCI_DMA_TODEVICE);
1223 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1224 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1225 tx_buffer->length, PCI_DMA_TODEVICE);
1226 tx_buffer->dma = 0;
1227 }
1228
1229 if (tx_buffer->skb) {
1230 dev_kfree_skb_irq(tx_buffer->skb);
1231 tx_buffer->skb = NULL;
1232 }
1233
1234 if (++next_to_clean == tx_ring->count)
1235 next_to_clean = 0;
1236 }
1237
1238 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1239
1240 if (netif_queue_stopped(adapter->netdev) &&
1241 netif_carrier_ok(adapter->netdev)) {
1242 netif_wake_queue(adapter->netdev);
1243 }
1244
1245 return true;
1246 }
1247
1248 /**
1249 * atl1e_intr - Interrupt Handler
1250 * @irq: interrupt number
1251 * @data: pointer to a network interface device structure
1252 */
1253 static irqreturn_t atl1e_intr(int irq, void *data)
1254 {
1255 struct net_device *netdev = data;
1256 struct atl1e_adapter *adapter = netdev_priv(netdev);
1257 struct atl1e_hw *hw = &adapter->hw;
1258 int max_ints = AT_MAX_INT_WORK;
1259 int handled = IRQ_NONE;
1260 u32 status;
1261
1262 do {
1263 status = AT_READ_REG(hw, REG_ISR);
1264 if ((status & IMR_NORMAL_MASK) == 0 ||
1265 (status & ISR_DIS_INT) != 0) {
1266 if (max_ints != AT_MAX_INT_WORK)
1267 handled = IRQ_HANDLED;
1268 break;
1269 }
1270 /* link event */
1271 if (status & ISR_GPHY)
1272 atl1e_clear_phy_int(adapter);
1273 /* Ack ISR */
1274 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1275
1276 handled = IRQ_HANDLED;
1277 /* check if PCIE PHY Link down */
1278 if (status & ISR_PHY_LINKDOWN) {
1279 netdev_err(adapter->netdev,
1280 "pcie phy linkdown %x\n", status);
1281 if (netif_running(adapter->netdev)) {
1282 /* reset MAC */
1283 atl1e_irq_reset(adapter);
1284 schedule_work(&adapter->reset_task);
1285 break;
1286 }
1287 }
1288
1289 /* check if DMA read/write error */
1290 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1291 netdev_err(adapter->netdev,
1292 "PCIE DMA RW error (status = 0x%x)\n",
1293 status);
1294 atl1e_irq_reset(adapter);
1295 schedule_work(&adapter->reset_task);
1296 break;
1297 }
1298
1299 if (status & ISR_SMB)
1300 atl1e_update_hw_stats(adapter);
1301
1302 /* link event */
1303 if (status & (ISR_GPHY | ISR_MANUAL)) {
1304 netdev->stats.tx_carrier_errors++;
1305 atl1e_link_chg_event(adapter);
1306 break;
1307 }
1308
1309 /* transmit event */
1310 if (status & ISR_TX_EVENT)
1311 atl1e_clean_tx_irq(adapter);
1312
1313 if (status & ISR_RX_EVENT) {
1314 /*
1315 * disable rx interrupts, without
1316 * the synchronize_irq bit
1317 */
1318 AT_WRITE_REG(hw, REG_IMR,
1319 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1320 AT_WRITE_FLUSH(hw);
1321 if (likely(napi_schedule_prep(
1322 &adapter->napi)))
1323 __napi_schedule(&adapter->napi);
1324 }
1325 } while (--max_ints > 0);
1326 /* re-enable Interrupt*/
1327 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1328
1329 return handled;
1330 }
1331
1332 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1333 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1334 {
1335 u8 *packet = (u8 *)(prrs + 1);
1336 struct iphdr *iph;
1337 u16 head_len = ETH_HLEN;
1338 u16 pkt_flags;
1339 u16 err_flags;
1340
1341 skb_checksum_none_assert(skb);
1342 pkt_flags = prrs->pkt_flag;
1343 err_flags = prrs->err_flag;
1344 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1345 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1346 if (pkt_flags & RRS_IS_IPV4) {
1347 if (pkt_flags & RRS_IS_802_3)
1348 head_len += 8;
1349 iph = (struct iphdr *) (packet + head_len);
1350 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1351 goto hw_xsum;
1352 }
1353 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1354 skb->ip_summed = CHECKSUM_UNNECESSARY;
1355 return;
1356 }
1357 }
1358
1359 hw_xsum :
1360 return;
1361 }
1362
1363 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1364 u8 que)
1365 {
1366 struct atl1e_rx_page_desc *rx_page_desc =
1367 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1368 u8 rx_using = rx_page_desc[que].rx_using;
1369
1370 return &(rx_page_desc[que].rx_page[rx_using]);
1371 }
1372
1373 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1374 int *work_done, int work_to_do)
1375 {
1376 struct net_device *netdev = adapter->netdev;
1377 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
1378 struct atl1e_rx_page_desc *rx_page_desc =
1379 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1380 struct sk_buff *skb = NULL;
1381 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1382 u32 packet_size, write_offset;
1383 struct atl1e_recv_ret_status *prrs;
1384
1385 write_offset = *(rx_page->write_offset_addr);
1386 if (likely(rx_page->read_offset < write_offset)) {
1387 do {
1388 if (*work_done >= work_to_do)
1389 break;
1390 (*work_done)++;
1391 /* get new packet's rrs */
1392 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1393 rx_page->read_offset);
1394 /* check sequence number */
1395 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1396 netdev_err(netdev,
1397 "rx sequence number error (rx=%d) (expect=%d)\n",
1398 prrs->seq_num,
1399 rx_page_desc[que].rx_nxseq);
1400 rx_page_desc[que].rx_nxseq++;
1401 /* just for debug use */
1402 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1403 (((u32)prrs->seq_num) << 16) |
1404 rx_page_desc[que].rx_nxseq);
1405 goto fatal_err;
1406 }
1407 rx_page_desc[que].rx_nxseq++;
1408
1409 /* error packet */
1410 if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1411 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1412 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1413 RRS_ERR_TRUNC)) {
1414 /* hardware error, discard this packet*/
1415 netdev_err(netdev,
1416 "rx packet desc error %x\n",
1417 *((u32 *)prrs + 1));
1418 goto skip_pkt;
1419 }
1420 }
1421
1422 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1423 RRS_PKT_SIZE_MASK) - 4; /* CRC */
1424 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1425 if (skb == NULL) {
1426 netdev_warn(netdev,
1427 "Memory squeeze, deferring packet\n");
1428 goto skip_pkt;
1429 }
1430 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1431 skb_put(skb, packet_size);
1432 skb->protocol = eth_type_trans(skb, netdev);
1433 atl1e_rx_checksum(adapter, skb, prrs);
1434
1435 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
1436 u16 vlan_tag = (prrs->vtag >> 4) |
1437 ((prrs->vtag & 7) << 13) |
1438 ((prrs->vtag & 8) << 9);
1439 netdev_dbg(netdev,
1440 "RXD VLAN TAG<RRD>=0x%04x\n",
1441 prrs->vtag);
1442 __vlan_hwaccel_put_tag(skb, vlan_tag);
1443 }
1444 netif_receive_skb(skb);
1445
1446 skip_pkt:
1447 /* skip current packet whether it's ok or not. */
1448 rx_page->read_offset +=
1449 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1450 RRS_PKT_SIZE_MASK) +
1451 sizeof(struct atl1e_recv_ret_status) + 31) &
1452 0xFFFFFFE0);
1453
1454 if (rx_page->read_offset >= rx_ring->page_size) {
1455 /* mark this page clean */
1456 u16 reg_addr;
1457 u8 rx_using;
1458
1459 rx_page->read_offset =
1460 *(rx_page->write_offset_addr) = 0;
1461 rx_using = rx_page_desc[que].rx_using;
1462 reg_addr =
1463 atl1e_rx_page_vld_regs[que][rx_using];
1464 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1465 rx_page_desc[que].rx_using ^= 1;
1466 rx_page = atl1e_get_rx_page(adapter, que);
1467 }
1468 write_offset = *(rx_page->write_offset_addr);
1469 } while (rx_page->read_offset < write_offset);
1470 }
1471
1472 return;
1473
1474 fatal_err:
1475 if (!test_bit(__AT_DOWN, &adapter->flags))
1476 schedule_work(&adapter->reset_task);
1477 }
1478
1479 /**
1480 * atl1e_clean - NAPI Rx polling callback
1481 */
1482 static int atl1e_clean(struct napi_struct *napi, int budget)
1483 {
1484 struct atl1e_adapter *adapter =
1485 container_of(napi, struct atl1e_adapter, napi);
1486 u32 imr_data;
1487 int work_done = 0;
1488
1489 /* Keep link state information with original netdev */
1490 if (!netif_carrier_ok(adapter->netdev))
1491 goto quit_polling;
1492
1493 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1494
1495 /* If no Tx and not enough Rx work done, exit the polling mode */
1496 if (work_done < budget) {
1497 quit_polling:
1498 napi_complete(napi);
1499 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1500 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1501 /* test debug */
1502 if (test_bit(__AT_DOWN, &adapter->flags)) {
1503 atomic_dec(&adapter->irq_sem);
1504 netdev_err(adapter->netdev,
1505 "atl1e_clean is called when AT_DOWN\n");
1506 }
1507 /* reenable RX intr */
1508 /*atl1e_irq_enable(adapter); */
1509
1510 }
1511 return work_done;
1512 }
1513
1514 #ifdef CONFIG_NET_POLL_CONTROLLER
1515
1516 /*
1517 * Polling 'interrupt' - used by things like netconsole to send skbs
1518 * without having to re-enable interrupts. It's not called while
1519 * the interrupt routine is executing.
1520 */
1521 static void atl1e_netpoll(struct net_device *netdev)
1522 {
1523 struct atl1e_adapter *adapter = netdev_priv(netdev);
1524
1525 disable_irq(adapter->pdev->irq);
1526 atl1e_intr(adapter->pdev->irq, netdev);
1527 enable_irq(adapter->pdev->irq);
1528 }
1529 #endif
1530
1531 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1532 {
1533 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1534 u16 next_to_use = 0;
1535 u16 next_to_clean = 0;
1536
1537 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1538 next_to_use = tx_ring->next_to_use;
1539
1540 return (u16)(next_to_clean > next_to_use) ?
1541 (next_to_clean - next_to_use - 1) :
1542 (tx_ring->count + next_to_clean - next_to_use - 1);
1543 }
1544
1545 /*
1546 * get next usable tpd
1547 * Note: should call atl1e_tdp_avail to make sure
1548 * there is enough tpd to use
1549 */
1550 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1551 {
1552 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1553 u16 next_to_use = 0;
1554
1555 next_to_use = tx_ring->next_to_use;
1556 if (++tx_ring->next_to_use == tx_ring->count)
1557 tx_ring->next_to_use = 0;
1558
1559 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1560 return &tx_ring->desc[next_to_use];
1561 }
1562
1563 static struct atl1e_tx_buffer *
1564 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1565 {
1566 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1567
1568 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1569 }
1570
1571 /* Calculate the transmit packet descript needed*/
1572 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1573 {
1574 int i = 0;
1575 u16 tpd_req = 1;
1576 u16 fg_size = 0;
1577 u16 proto_hdr_len = 0;
1578
1579 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1580 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
1581 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1582 }
1583
1584 if (skb_is_gso(skb)) {
1585 if (skb->protocol == htons(ETH_P_IP) ||
1586 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1587 proto_hdr_len = skb_transport_offset(skb) +
1588 tcp_hdrlen(skb);
1589 if (proto_hdr_len < skb_headlen(skb)) {
1590 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1591 MAX_TX_BUF_LEN - 1) >>
1592 MAX_TX_BUF_SHIFT);
1593 }
1594 }
1595
1596 }
1597 return tpd_req;
1598 }
1599
1600 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1601 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1602 {
1603 u8 hdr_len;
1604 u32 real_len;
1605 unsigned short offload_type;
1606 int err;
1607
1608 if (skb_is_gso(skb)) {
1609 if (skb_header_cloned(skb)) {
1610 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1611 if (unlikely(err))
1612 return -1;
1613 }
1614 offload_type = skb_shinfo(skb)->gso_type;
1615
1616 if (offload_type & SKB_GSO_TCPV4) {
1617 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1618 + ntohs(ip_hdr(skb)->tot_len));
1619
1620 if (real_len < skb->len)
1621 pskb_trim(skb, real_len);
1622
1623 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1624 if (unlikely(skb->len == hdr_len)) {
1625 /* only xsum need */
1626 netdev_warn(adapter->netdev,
1627 "IPV4 tso with zero data??\n");
1628 goto check_sum;
1629 } else {
1630 ip_hdr(skb)->check = 0;
1631 ip_hdr(skb)->tot_len = 0;
1632 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1633 ip_hdr(skb)->saddr,
1634 ip_hdr(skb)->daddr,
1635 0, IPPROTO_TCP, 0);
1636 tpd->word3 |= (ip_hdr(skb)->ihl &
1637 TDP_V4_IPHL_MASK) <<
1638 TPD_V4_IPHL_SHIFT;
1639 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1640 TPD_TCPHDRLEN_MASK) <<
1641 TPD_TCPHDRLEN_SHIFT;
1642 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1643 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1644 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1645 }
1646 return 0;
1647 }
1648 }
1649
1650 check_sum:
1651 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1652 u8 css, cso;
1653
1654 cso = skb_checksum_start_offset(skb);
1655 if (unlikely(cso & 0x1)) {
1656 netdev_err(adapter->netdev,
1657 "payload offset should not ant event number\n");
1658 return -1;
1659 } else {
1660 css = cso + skb->csum_offset;
1661 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1662 TPD_PLOADOFFSET_SHIFT;
1663 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1664 TPD_CCSUMOFFSET_SHIFT;
1665 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1666 }
1667 }
1668
1669 return 0;
1670 }
1671
1672 static void atl1e_tx_map(struct atl1e_adapter *adapter,
1673 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1674 {
1675 struct atl1e_tpd_desc *use_tpd = NULL;
1676 struct atl1e_tx_buffer *tx_buffer = NULL;
1677 u16 buf_len = skb_headlen(skb);
1678 u16 map_len = 0;
1679 u16 mapped_len = 0;
1680 u16 hdr_len = 0;
1681 u16 nr_frags;
1682 u16 f;
1683 int segment;
1684
1685 nr_frags = skb_shinfo(skb)->nr_frags;
1686 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1687 if (segment) {
1688 /* TSO */
1689 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1690 use_tpd = tpd;
1691
1692 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1693 tx_buffer->length = map_len;
1694 tx_buffer->dma = pci_map_single(adapter->pdev,
1695 skb->data, hdr_len, PCI_DMA_TODEVICE);
1696 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1697 mapped_len += map_len;
1698 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1699 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1700 ((cpu_to_le32(tx_buffer->length) &
1701 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1702 }
1703
1704 while (mapped_len < buf_len) {
1705 /* mapped_len == 0, means we should use the first tpd,
1706 which is given by caller */
1707 if (mapped_len == 0) {
1708 use_tpd = tpd;
1709 } else {
1710 use_tpd = atl1e_get_tpd(adapter);
1711 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1712 }
1713 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1714 tx_buffer->skb = NULL;
1715
1716 tx_buffer->length = map_len =
1717 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1718 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1719 tx_buffer->dma =
1720 pci_map_single(adapter->pdev, skb->data + mapped_len,
1721 map_len, PCI_DMA_TODEVICE);
1722 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1723 mapped_len += map_len;
1724 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1725 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1726 ((cpu_to_le32(tx_buffer->length) &
1727 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1728 }
1729
1730 for (f = 0; f < nr_frags; f++) {
1731 const struct skb_frag_struct *frag;
1732 u16 i;
1733 u16 seg_num;
1734
1735 frag = &skb_shinfo(skb)->frags[f];
1736 buf_len = skb_frag_size(frag);
1737
1738 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1739 for (i = 0; i < seg_num; i++) {
1740 use_tpd = atl1e_get_tpd(adapter);
1741 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1742
1743 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1744 BUG_ON(tx_buffer->skb);
1745
1746 tx_buffer->skb = NULL;
1747 tx_buffer->length =
1748 (buf_len > MAX_TX_BUF_LEN) ?
1749 MAX_TX_BUF_LEN : buf_len;
1750 buf_len -= tx_buffer->length;
1751
1752 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1753 frag,
1754 (i * MAX_TX_BUF_LEN),
1755 tx_buffer->length,
1756 DMA_TO_DEVICE);
1757 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1758 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1759 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1760 ((cpu_to_le32(tx_buffer->length) &
1761 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1762 }
1763 }
1764
1765 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1766 /* note this one is a tcp header */
1767 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1768 /* The last tpd */
1769
1770 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1771 /* The last buffer info contain the skb address,
1772 so it will be free after unmap */
1773 tx_buffer->skb = skb;
1774 }
1775
1776 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1777 struct atl1e_tpd_desc *tpd)
1778 {
1779 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1780 /* Force memory writes to complete before letting h/w
1781 * know there are new descriptors to fetch. (Only
1782 * applicable for weak-ordered memory model archs,
1783 * such as IA-64). */
1784 wmb();
1785 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1786 }
1787
1788 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1789 struct net_device *netdev)
1790 {
1791 struct atl1e_adapter *adapter = netdev_priv(netdev);
1792 unsigned long flags;
1793 u16 tpd_req = 1;
1794 struct atl1e_tpd_desc *tpd;
1795
1796 if (test_bit(__AT_DOWN, &adapter->flags)) {
1797 dev_kfree_skb_any(skb);
1798 return NETDEV_TX_OK;
1799 }
1800
1801 if (unlikely(skb->len <= 0)) {
1802 dev_kfree_skb_any(skb);
1803 return NETDEV_TX_OK;
1804 }
1805 tpd_req = atl1e_cal_tdp_req(skb);
1806 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1807 return NETDEV_TX_LOCKED;
1808
1809 if (atl1e_tpd_avail(adapter) < tpd_req) {
1810 /* no enough descriptor, just stop queue */
1811 netif_stop_queue(netdev);
1812 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1813 return NETDEV_TX_BUSY;
1814 }
1815
1816 tpd = atl1e_get_tpd(adapter);
1817
1818 if (vlan_tx_tag_present(skb)) {
1819 u16 vlan_tag = vlan_tx_tag_get(skb);
1820 u16 atl1e_vlan_tag;
1821
1822 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1823 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1824 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1825 TPD_VLAN_SHIFT;
1826 }
1827
1828 if (skb->protocol == htons(ETH_P_8021Q))
1829 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1830
1831 if (skb_network_offset(skb) != ETH_HLEN)
1832 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1833
1834 /* do TSO and check sum */
1835 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1836 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1837 dev_kfree_skb_any(skb);
1838 return NETDEV_TX_OK;
1839 }
1840
1841 atl1e_tx_map(adapter, skb, tpd);
1842 atl1e_tx_queue(adapter, tpd_req, tpd);
1843
1844 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1845 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1846 return NETDEV_TX_OK;
1847 }
1848
1849 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1850 {
1851 struct net_device *netdev = adapter->netdev;
1852
1853 free_irq(adapter->pdev->irq, netdev);
1854
1855 if (adapter->have_msi)
1856 pci_disable_msi(adapter->pdev);
1857 }
1858
1859 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1860 {
1861 struct pci_dev *pdev = adapter->pdev;
1862 struct net_device *netdev = adapter->netdev;
1863 int flags = 0;
1864 int err = 0;
1865
1866 adapter->have_msi = true;
1867 err = pci_enable_msi(pdev);
1868 if (err) {
1869 netdev_dbg(netdev,
1870 "Unable to allocate MSI interrupt Error: %d\n", err);
1871 adapter->have_msi = false;
1872 }
1873
1874 if (!adapter->have_msi)
1875 flags |= IRQF_SHARED;
1876 err = request_irq(pdev->irq, atl1e_intr, flags, netdev->name, netdev);
1877 if (err) {
1878 netdev_dbg(adapter->netdev,
1879 "Unable to allocate interrupt Error: %d\n", err);
1880 if (adapter->have_msi)
1881 pci_disable_msi(pdev);
1882 return err;
1883 }
1884 netdev_dbg(netdev, "atl1e_request_irq OK\n");
1885 return err;
1886 }
1887
1888 int atl1e_up(struct atl1e_adapter *adapter)
1889 {
1890 struct net_device *netdev = adapter->netdev;
1891 int err = 0;
1892 u32 val;
1893
1894 /* hardware has been reset, we need to reload some things */
1895 err = atl1e_init_hw(&adapter->hw);
1896 if (err) {
1897 err = -EIO;
1898 return err;
1899 }
1900 atl1e_init_ring_ptrs(adapter);
1901 atl1e_set_multi(netdev);
1902 atl1e_restore_vlan(adapter);
1903
1904 if (atl1e_configure(adapter)) {
1905 err = -EIO;
1906 goto err_up;
1907 }
1908
1909 clear_bit(__AT_DOWN, &adapter->flags);
1910 napi_enable(&adapter->napi);
1911 atl1e_irq_enable(adapter);
1912 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1913 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1914 val | MASTER_CTRL_MANUAL_INT);
1915
1916 err_up:
1917 return err;
1918 }
1919
1920 void atl1e_down(struct atl1e_adapter *adapter)
1921 {
1922 struct net_device *netdev = adapter->netdev;
1923
1924 /* signal that we're down so the interrupt handler does not
1925 * reschedule our watchdog timer */
1926 set_bit(__AT_DOWN, &adapter->flags);
1927
1928 netif_stop_queue(netdev);
1929
1930 /* reset MAC to disable all RX/TX */
1931 atl1e_reset_hw(&adapter->hw);
1932 msleep(1);
1933
1934 napi_disable(&adapter->napi);
1935 atl1e_del_timer(adapter);
1936 atl1e_irq_disable(adapter);
1937
1938 netif_carrier_off(netdev);
1939 adapter->link_speed = SPEED_0;
1940 adapter->link_duplex = -1;
1941 atl1e_clean_tx_ring(adapter);
1942 atl1e_clean_rx_ring(adapter);
1943 }
1944
1945 /**
1946 * atl1e_open - Called when a network interface is made active
1947 * @netdev: network interface device structure
1948 *
1949 * Returns 0 on success, negative value on failure
1950 *
1951 * The open entry point is called when a network interface is made
1952 * active by the system (IFF_UP). At this point all resources needed
1953 * for transmit and receive operations are allocated, the interrupt
1954 * handler is registered with the OS, the watchdog timer is started,
1955 * and the stack is notified that the interface is ready.
1956 */
1957 static int atl1e_open(struct net_device *netdev)
1958 {
1959 struct atl1e_adapter *adapter = netdev_priv(netdev);
1960 int err;
1961
1962 /* disallow open during test */
1963 if (test_bit(__AT_TESTING, &adapter->flags))
1964 return -EBUSY;
1965
1966 /* allocate rx/tx dma buffer & descriptors */
1967 atl1e_init_ring_resources(adapter);
1968 err = atl1e_setup_ring_resources(adapter);
1969 if (unlikely(err))
1970 return err;
1971
1972 err = atl1e_request_irq(adapter);
1973 if (unlikely(err))
1974 goto err_req_irq;
1975
1976 err = atl1e_up(adapter);
1977 if (unlikely(err))
1978 goto err_up;
1979
1980 return 0;
1981
1982 err_up:
1983 atl1e_free_irq(adapter);
1984 err_req_irq:
1985 atl1e_free_ring_resources(adapter);
1986 atl1e_reset_hw(&adapter->hw);
1987
1988 return err;
1989 }
1990
1991 /**
1992 * atl1e_close - Disables a network interface
1993 * @netdev: network interface device structure
1994 *
1995 * Returns 0, this is not allowed to fail
1996 *
1997 * The close entry point is called when an interface is de-activated
1998 * by the OS. The hardware is still under the drivers control, but
1999 * needs to be disabled. A global MAC reset is issued to stop the
2000 * hardware, and all transmit and receive resources are freed.
2001 */
2002 static int atl1e_close(struct net_device *netdev)
2003 {
2004 struct atl1e_adapter *adapter = netdev_priv(netdev);
2005
2006 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2007 atl1e_down(adapter);
2008 atl1e_free_irq(adapter);
2009 atl1e_free_ring_resources(adapter);
2010
2011 return 0;
2012 }
2013
2014 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2015 {
2016 struct net_device *netdev = pci_get_drvdata(pdev);
2017 struct atl1e_adapter *adapter = netdev_priv(netdev);
2018 struct atl1e_hw *hw = &adapter->hw;
2019 u32 ctrl = 0;
2020 u32 mac_ctrl_data = 0;
2021 u32 wol_ctrl_data = 0;
2022 u16 mii_advertise_data = 0;
2023 u16 mii_bmsr_data = 0;
2024 u16 mii_intr_status_data = 0;
2025 u32 wufc = adapter->wol;
2026 u32 i;
2027 #ifdef CONFIG_PM
2028 int retval = 0;
2029 #endif
2030
2031 if (netif_running(netdev)) {
2032 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2033 atl1e_down(adapter);
2034 }
2035 netif_device_detach(netdev);
2036
2037 #ifdef CONFIG_PM
2038 retval = pci_save_state(pdev);
2039 if (retval)
2040 return retval;
2041 #endif
2042
2043 if (wufc) {
2044 /* get link status */
2045 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2046 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2047
2048 mii_advertise_data = ADVERTISE_10HALF;
2049
2050 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2051 (atl1e_write_phy_reg(hw,
2052 MII_ADVERTISE, mii_advertise_data) != 0) ||
2053 (atl1e_phy_commit(hw)) != 0) {
2054 netdev_dbg(adapter->netdev, "set phy register failed\n");
2055 goto wol_dis;
2056 }
2057
2058 hw->phy_configured = false; /* re-init PHY when resume */
2059
2060 /* turn on magic packet wol */
2061 if (wufc & AT_WUFC_MAG)
2062 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2063
2064 if (wufc & AT_WUFC_LNKC) {
2065 /* if orignal link status is link, just wait for retrive link */
2066 if (mii_bmsr_data & BMSR_LSTATUS) {
2067 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2068 msleep(100);
2069 atl1e_read_phy_reg(hw, MII_BMSR,
2070 &mii_bmsr_data);
2071 if (mii_bmsr_data & BMSR_LSTATUS)
2072 break;
2073 }
2074
2075 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2076 netdev_dbg(adapter->netdev,
2077 "Link may change when suspend\n");
2078 }
2079 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2080 /* only link up can wake up */
2081 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2082 netdev_dbg(adapter->netdev,
2083 "read write phy register failed\n");
2084 goto wol_dis;
2085 }
2086 }
2087 /* clear phy interrupt */
2088 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2089 /* Config MAC Ctrl register */
2090 mac_ctrl_data = MAC_CTRL_RX_EN;
2091 /* set to 10/100M halt duplex */
2092 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2093 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2094 MAC_CTRL_PRMLEN_MASK) <<
2095 MAC_CTRL_PRMLEN_SHIFT);
2096
2097 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
2098
2099 /* magic packet maybe Broadcast&multicast&Unicast frame */
2100 if (wufc & AT_WUFC_MAG)
2101 mac_ctrl_data |= MAC_CTRL_BC_EN;
2102
2103 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2104 mac_ctrl_data);
2105
2106 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2107 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2108 /* pcie patch */
2109 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2110 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2111 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2112 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2113 goto suspend_exit;
2114 }
2115 wol_dis:
2116
2117 /* WOL disabled */
2118 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2119
2120 /* pcie patch */
2121 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2122 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2123 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2124
2125 atl1e_force_ps(hw);
2126 hw->phy_configured = false; /* re-init PHY when resume */
2127
2128 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2129
2130 suspend_exit:
2131
2132 if (netif_running(netdev))
2133 atl1e_free_irq(adapter);
2134
2135 pci_disable_device(pdev);
2136
2137 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2138
2139 return 0;
2140 }
2141
2142 #ifdef CONFIG_PM
2143 static int atl1e_resume(struct pci_dev *pdev)
2144 {
2145 struct net_device *netdev = pci_get_drvdata(pdev);
2146 struct atl1e_adapter *adapter = netdev_priv(netdev);
2147 u32 err;
2148
2149 pci_set_power_state(pdev, PCI_D0);
2150 pci_restore_state(pdev);
2151
2152 err = pci_enable_device(pdev);
2153 if (err) {
2154 netdev_err(adapter->netdev,
2155 "Cannot enable PCI device from suspend\n");
2156 return err;
2157 }
2158
2159 pci_set_master(pdev);
2160
2161 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2162
2163 pci_enable_wake(pdev, PCI_D3hot, 0);
2164 pci_enable_wake(pdev, PCI_D3cold, 0);
2165
2166 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2167
2168 if (netif_running(netdev)) {
2169 err = atl1e_request_irq(adapter);
2170 if (err)
2171 return err;
2172 }
2173
2174 atl1e_reset_hw(&adapter->hw);
2175
2176 if (netif_running(netdev))
2177 atl1e_up(adapter);
2178
2179 netif_device_attach(netdev);
2180
2181 return 0;
2182 }
2183 #endif
2184
2185 static void atl1e_shutdown(struct pci_dev *pdev)
2186 {
2187 atl1e_suspend(pdev, PMSG_SUSPEND);
2188 }
2189
2190 static const struct net_device_ops atl1e_netdev_ops = {
2191 .ndo_open = atl1e_open,
2192 .ndo_stop = atl1e_close,
2193 .ndo_start_xmit = atl1e_xmit_frame,
2194 .ndo_get_stats = atl1e_get_stats,
2195 .ndo_set_rx_mode = atl1e_set_multi,
2196 .ndo_validate_addr = eth_validate_addr,
2197 .ndo_set_mac_address = atl1e_set_mac_addr,
2198 .ndo_fix_features = atl1e_fix_features,
2199 .ndo_set_features = atl1e_set_features,
2200 .ndo_change_mtu = atl1e_change_mtu,
2201 .ndo_do_ioctl = atl1e_ioctl,
2202 .ndo_tx_timeout = atl1e_tx_timeout,
2203 #ifdef CONFIG_NET_POLL_CONTROLLER
2204 .ndo_poll_controller = atl1e_netpoll,
2205 #endif
2206
2207 };
2208
2209 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2210 {
2211 SET_NETDEV_DEV(netdev, &pdev->dev);
2212 pci_set_drvdata(pdev, netdev);
2213
2214 netdev->netdev_ops = &atl1e_netdev_ops;
2215
2216 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2217 atl1e_set_ethtool_ops(netdev);
2218
2219 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
2220 NETIF_F_HW_VLAN_RX;
2221 netdev->features = netdev->hw_features | NETIF_F_LLTX |
2222 NETIF_F_HW_VLAN_TX;
2223
2224 return 0;
2225 }
2226
2227 /**
2228 * atl1e_probe - Device Initialization Routine
2229 * @pdev: PCI device information struct
2230 * @ent: entry in atl1e_pci_tbl
2231 *
2232 * Returns 0 on success, negative on failure
2233 *
2234 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2235 * The OS initialization, configuring of the adapter private structure,
2236 * and a hardware reset occur.
2237 */
2238 static int __devinit atl1e_probe(struct pci_dev *pdev,
2239 const struct pci_device_id *ent)
2240 {
2241 struct net_device *netdev;
2242 struct atl1e_adapter *adapter = NULL;
2243 static int cards_found;
2244
2245 int err = 0;
2246
2247 err = pci_enable_device(pdev);
2248 if (err) {
2249 dev_err(&pdev->dev, "cannot enable PCI device\n");
2250 return err;
2251 }
2252
2253 /*
2254 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2255 * shared register for the high 32 bits, so only a single, aligned,
2256 * 4 GB physical address range can be used at a time.
2257 *
2258 * Supporting 64-bit DMA on this hardware is more trouble than it's
2259 * worth. It is far easier to limit to 32-bit DMA than update
2260 * various kernel subsystems to support the mechanics required by a
2261 * fixed-high-32-bit system.
2262 */
2263 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2264 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2265 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2266 goto err_dma;
2267 }
2268
2269 err = pci_request_regions(pdev, atl1e_driver_name);
2270 if (err) {
2271 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2272 goto err_pci_reg;
2273 }
2274
2275 pci_set_master(pdev);
2276
2277 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2278 if (netdev == NULL) {
2279 err = -ENOMEM;
2280 goto err_alloc_etherdev;
2281 }
2282
2283 err = atl1e_init_netdev(netdev, pdev);
2284 if (err) {
2285 netdev_err(netdev, "init netdevice failed\n");
2286 goto err_init_netdev;
2287 }
2288 adapter = netdev_priv(netdev);
2289 adapter->bd_number = cards_found;
2290 adapter->netdev = netdev;
2291 adapter->pdev = pdev;
2292 adapter->hw.adapter = adapter;
2293 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2294 if (!adapter->hw.hw_addr) {
2295 err = -EIO;
2296 netdev_err(netdev, "cannot map device registers\n");
2297 goto err_ioremap;
2298 }
2299
2300 /* init mii data */
2301 adapter->mii.dev = netdev;
2302 adapter->mii.mdio_read = atl1e_mdio_read;
2303 adapter->mii.mdio_write = atl1e_mdio_write;
2304 adapter->mii.phy_id_mask = 0x1f;
2305 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2306
2307 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2308
2309 init_timer(&adapter->phy_config_timer);
2310 adapter->phy_config_timer.function = atl1e_phy_config;
2311 adapter->phy_config_timer.data = (unsigned long) adapter;
2312
2313 /* get user settings */
2314 atl1e_check_options(adapter);
2315 /*
2316 * Mark all PCI regions associated with PCI device
2317 * pdev as being reserved by owner atl1e_driver_name
2318 * Enables bus-mastering on the device and calls
2319 * pcibios_set_master to do the needed arch specific settings
2320 */
2321 atl1e_setup_pcicmd(pdev);
2322 /* setup the private structure */
2323 err = atl1e_sw_init(adapter);
2324 if (err) {
2325 netdev_err(netdev, "net device private data init failed\n");
2326 goto err_sw_init;
2327 }
2328
2329 /* Init GPHY as early as possible due to power saving issue */
2330 atl1e_phy_init(&adapter->hw);
2331 /* reset the controller to
2332 * put the device in a known good starting state */
2333 err = atl1e_reset_hw(&adapter->hw);
2334 if (err) {
2335 err = -EIO;
2336 goto err_reset;
2337 }
2338
2339 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2340 err = -EIO;
2341 netdev_err(netdev, "get mac address failed\n");
2342 goto err_eeprom;
2343 }
2344
2345 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2346 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2347 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2348
2349 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2350 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2351 err = register_netdev(netdev);
2352 if (err) {
2353 netdev_err(netdev, "register netdevice failed\n");
2354 goto err_register;
2355 }
2356
2357 /* assume we have no link for now */
2358 netif_stop_queue(netdev);
2359 netif_carrier_off(netdev);
2360
2361 cards_found++;
2362
2363 return 0;
2364
2365 err_reset:
2366 err_register:
2367 err_sw_init:
2368 err_eeprom:
2369 iounmap(adapter->hw.hw_addr);
2370 err_init_netdev:
2371 err_ioremap:
2372 free_netdev(netdev);
2373 err_alloc_etherdev:
2374 pci_release_regions(pdev);
2375 err_pci_reg:
2376 err_dma:
2377 pci_disable_device(pdev);
2378 return err;
2379 }
2380
2381 /**
2382 * atl1e_remove - Device Removal Routine
2383 * @pdev: PCI device information struct
2384 *
2385 * atl1e_remove is called by the PCI subsystem to alert the driver
2386 * that it should release a PCI device. The could be caused by a
2387 * Hot-Plug event, or because the driver is going to be removed from
2388 * memory.
2389 */
2390 static void __devexit atl1e_remove(struct pci_dev *pdev)
2391 {
2392 struct net_device *netdev = pci_get_drvdata(pdev);
2393 struct atl1e_adapter *adapter = netdev_priv(netdev);
2394
2395 /*
2396 * flush_scheduled work may reschedule our watchdog task, so
2397 * explicitly disable watchdog tasks from being rescheduled
2398 */
2399 set_bit(__AT_DOWN, &adapter->flags);
2400
2401 atl1e_del_timer(adapter);
2402 atl1e_cancel_work(adapter);
2403
2404 unregister_netdev(netdev);
2405 atl1e_free_ring_resources(adapter);
2406 atl1e_force_ps(&adapter->hw);
2407 iounmap(adapter->hw.hw_addr);
2408 pci_release_regions(pdev);
2409 free_netdev(netdev);
2410 pci_disable_device(pdev);
2411 }
2412
2413 /**
2414 * atl1e_io_error_detected - called when PCI error is detected
2415 * @pdev: Pointer to PCI device
2416 * @state: The current pci connection state
2417 *
2418 * This function is called after a PCI bus error affecting
2419 * this device has been detected.
2420 */
2421 static pci_ers_result_t
2422 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2423 {
2424 struct net_device *netdev = pci_get_drvdata(pdev);
2425 struct atl1e_adapter *adapter = netdev_priv(netdev);
2426
2427 netif_device_detach(netdev);
2428
2429 if (state == pci_channel_io_perm_failure)
2430 return PCI_ERS_RESULT_DISCONNECT;
2431
2432 if (netif_running(netdev))
2433 atl1e_down(adapter);
2434
2435 pci_disable_device(pdev);
2436
2437 /* Request a slot slot reset. */
2438 return PCI_ERS_RESULT_NEED_RESET;
2439 }
2440
2441 /**
2442 * atl1e_io_slot_reset - called after the pci bus has been reset.
2443 * @pdev: Pointer to PCI device
2444 *
2445 * Restart the card from scratch, as if from a cold-boot. Implementation
2446 * resembles the first-half of the e1000_resume routine.
2447 */
2448 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2449 {
2450 struct net_device *netdev = pci_get_drvdata(pdev);
2451 struct atl1e_adapter *adapter = netdev_priv(netdev);
2452
2453 if (pci_enable_device(pdev)) {
2454 netdev_err(adapter->netdev,
2455 "Cannot re-enable PCI device after reset\n");
2456 return PCI_ERS_RESULT_DISCONNECT;
2457 }
2458 pci_set_master(pdev);
2459
2460 pci_enable_wake(pdev, PCI_D3hot, 0);
2461 pci_enable_wake(pdev, PCI_D3cold, 0);
2462
2463 atl1e_reset_hw(&adapter->hw);
2464
2465 return PCI_ERS_RESULT_RECOVERED;
2466 }
2467
2468 /**
2469 * atl1e_io_resume - called when traffic can start flowing again.
2470 * @pdev: Pointer to PCI device
2471 *
2472 * This callback is called when the error recovery driver tells us that
2473 * its OK to resume normal operation. Implementation resembles the
2474 * second-half of the atl1e_resume routine.
2475 */
2476 static void atl1e_io_resume(struct pci_dev *pdev)
2477 {
2478 struct net_device *netdev = pci_get_drvdata(pdev);
2479 struct atl1e_adapter *adapter = netdev_priv(netdev);
2480
2481 if (netif_running(netdev)) {
2482 if (atl1e_up(adapter)) {
2483 netdev_err(adapter->netdev,
2484 "can't bring device back up after reset\n");
2485 return;
2486 }
2487 }
2488
2489 netif_device_attach(netdev);
2490 }
2491
2492 static struct pci_error_handlers atl1e_err_handler = {
2493 .error_detected = atl1e_io_error_detected,
2494 .slot_reset = atl1e_io_slot_reset,
2495 .resume = atl1e_io_resume,
2496 };
2497
2498 static struct pci_driver atl1e_driver = {
2499 .name = atl1e_driver_name,
2500 .id_table = atl1e_pci_tbl,
2501 .probe = atl1e_probe,
2502 .remove = __devexit_p(atl1e_remove),
2503 /* Power Management Hooks */
2504 #ifdef CONFIG_PM
2505 .suspend = atl1e_suspend,
2506 .resume = atl1e_resume,
2507 #endif
2508 .shutdown = atl1e_shutdown,
2509 .err_handler = &atl1e_err_handler
2510 };
2511
2512 /**
2513 * atl1e_init_module - Driver Registration Routine
2514 *
2515 * atl1e_init_module is the first routine called when the driver is
2516 * loaded. All it does is register with the PCI subsystem.
2517 */
2518 static int __init atl1e_init_module(void)
2519 {
2520 return pci_register_driver(&atl1e_driver);
2521 }
2522
2523 /**
2524 * atl1e_exit_module - Driver Exit Cleanup Routine
2525 *
2526 * atl1e_exit_module is called just before the driver is removed
2527 * from memory.
2528 */
2529 static void __exit atl1e_exit_module(void)
2530 {
2531 pci_unregister_driver(&atl1e_driver);
2532 }
2533
2534 module_init(atl1e_init_module);
2535 module_exit(atl1e_exit_module);
Linux ARM platform port for MOXA ART SoC