2 * Copyright (c) 2009-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/export.h>
21 ATH_BT_COEX_MODE_LEGACY
, /* legacy rx_clear mode */
22 ATH_BT_COEX_MODE_UNSLOTTED
, /* untimed/unslotted mode */
23 ATH_BT_COEX_MODE_SLOTTED
, /* slotted mode */
24 ATH_BT_COEX_MODE_DISABLED
, /* coexistence disabled */
27 struct ath_btcoex_config
{
29 bool bt_txstate_extend
;
30 bool bt_txframe_extend
;
31 enum ath_bt_mode bt_mode
; /* coexistence mode */
32 bool bt_quiet_collision
;
33 bool bt_rxclear_polarity
; /* invert rx_clear as WLAN_ACTIVE*/
35 u8 bt_first_slot_time
;
36 bool bt_hold_rx_clear
;
39 static const u32 ar9003_wlan_weights
[ATH_BTCOEX_STOMP_MAX
]
40 [AR9300_NUM_WLAN_WEIGHTS
] = {
41 { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
42 { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
43 { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
46 static const u32 ar9462_wlan_weights
[ATH_BTCOEX_STOMP_MAX
]
47 [AR9300_NUM_WLAN_WEIGHTS
] = {
48 { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
49 { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
50 { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
51 { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
54 void ath9k_hw_init_btcoex_hw(struct ath_hw
*ah
, int qnum
)
56 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
57 const struct ath_btcoex_config ath_bt_config
= {
59 .bt_txstate_extend
= true,
60 .bt_txframe_extend
= true,
61 .bt_mode
= ATH_BT_COEX_MODE_SLOTTED
,
62 .bt_quiet_collision
= true,
63 .bt_rxclear_polarity
= true,
64 .bt_priority_time
= 2,
65 .bt_first_slot_time
= 5,
66 .bt_hold_rx_clear
= true,
69 bool rxclear_polarity
= ath_bt_config
.bt_rxclear_polarity
;
71 if (AR_SREV_9300_20_OR_LATER(ah
))
72 rxclear_polarity
= !ath_bt_config
.bt_rxclear_polarity
;
74 btcoex_hw
->bt_coex_mode
=
75 (btcoex_hw
->bt_coex_mode
& AR_BT_QCU_THRESH
) |
76 SM(ath_bt_config
.bt_time_extend
, AR_BT_TIME_EXTEND
) |
77 SM(ath_bt_config
.bt_txstate_extend
, AR_BT_TXSTATE_EXTEND
) |
78 SM(ath_bt_config
.bt_txframe_extend
, AR_BT_TX_FRAME_EXTEND
) |
79 SM(ath_bt_config
.bt_mode
, AR_BT_MODE
) |
80 SM(ath_bt_config
.bt_quiet_collision
, AR_BT_QUIET
) |
81 SM(rxclear_polarity
, AR_BT_RX_CLEAR_POLARITY
) |
82 SM(ath_bt_config
.bt_priority_time
, AR_BT_PRIORITY_TIME
) |
83 SM(ath_bt_config
.bt_first_slot_time
, AR_BT_FIRST_SLOT_TIME
) |
84 SM(qnum
, AR_BT_QCU_THRESH
);
86 btcoex_hw
->bt_coex_mode2
=
87 SM(ath_bt_config
.bt_hold_rx_clear
, AR_BT_HOLD_RX_CLEAR
) |
88 SM(ATH_BTCOEX_BMISS_THRESH
, AR_BT_BCN_MISS_THRESH
) |
91 for (i
= 0; i
< 32; i
++) {
92 idx
= (debruijn32
<< i
) >> 27;
93 ah
->hw_gen_timers
.gen_timer_index
[idx
] = i
;
96 EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw
);
98 void ath9k_hw_btcoex_init_scheme(struct ath_hw
*ah
)
100 struct ath_common
*common
= ath9k_hw_common(ah
);
101 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
104 * Check if BTCOEX is globally disabled.
106 if (!common
->btcoex_enabled
) {
107 btcoex_hw
->scheme
= ATH_BTCOEX_CFG_NONE
;
111 if (AR_SREV_9300_20_OR_LATER(ah
)) {
112 btcoex_hw
->scheme
= ATH_BTCOEX_CFG_3WIRE
;
113 btcoex_hw
->btactive_gpio
= ATH_BTACTIVE_GPIO_9300
;
114 btcoex_hw
->wlanactive_gpio
= ATH_WLANACTIVE_GPIO_9300
;
115 btcoex_hw
->btpriority_gpio
= ATH_BTPRIORITY_GPIO_9300
;
116 } else if (AR_SREV_9280_20_OR_LATER(ah
)) {
117 btcoex_hw
->btactive_gpio
= ATH_BTACTIVE_GPIO_9280
;
118 btcoex_hw
->wlanactive_gpio
= ATH_WLANACTIVE_GPIO_9280
;
120 if (AR_SREV_9285(ah
)) {
121 btcoex_hw
->scheme
= ATH_BTCOEX_CFG_3WIRE
;
122 btcoex_hw
->btpriority_gpio
= ATH_BTPRIORITY_GPIO_9285
;
124 btcoex_hw
->scheme
= ATH_BTCOEX_CFG_2WIRE
;
128 EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme
);
130 void ath9k_hw_btcoex_init_2wire(struct ath_hw
*ah
)
132 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
134 /* connect bt_active to baseband */
135 REG_CLR_BIT(ah
, AR_GPIO_INPUT_EN_VAL
,
136 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF
|
137 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF
));
139 REG_SET_BIT(ah
, AR_GPIO_INPUT_EN_VAL
,
140 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB
);
142 /* Set input mux for bt_active to gpio pin */
143 REG_RMW_FIELD(ah
, AR_GPIO_INPUT_MUX1
,
144 AR_GPIO_INPUT_MUX1_BT_ACTIVE
,
145 btcoex_hw
->btactive_gpio
);
147 /* Configure the desired gpio port for input */
148 ath9k_hw_cfg_gpio_input(ah
, btcoex_hw
->btactive_gpio
);
150 EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire
);
152 void ath9k_hw_btcoex_init_3wire(struct ath_hw
*ah
)
154 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
157 REG_SET_BIT(ah
, AR_GPIO_INPUT_EN_VAL
,
158 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB
|
159 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB
));
161 /* Set input mux for bt_prority_async and
162 * bt_active_async to GPIO pins */
163 REG_RMW_FIELD(ah
, AR_GPIO_INPUT_MUX1
,
164 AR_GPIO_INPUT_MUX1_BT_ACTIVE
,
165 btcoex_hw
->btactive_gpio
);
167 REG_RMW_FIELD(ah
, AR_GPIO_INPUT_MUX1
,
168 AR_GPIO_INPUT_MUX1_BT_PRIORITY
,
169 btcoex_hw
->btpriority_gpio
);
171 /* Configure the desired GPIO ports for input */
173 ath9k_hw_cfg_gpio_input(ah
, btcoex_hw
->btactive_gpio
);
174 ath9k_hw_cfg_gpio_input(ah
, btcoex_hw
->btpriority_gpio
);
176 EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire
);
178 void ath9k_hw_btcoex_init_mci(struct ath_hw
*ah
)
180 ah
->btcoex_hw
.mci
.ready
= false;
181 ah
->btcoex_hw
.mci
.bt_state
= 0;
182 ah
->btcoex_hw
.mci
.bt_ver_major
= 3;
183 ah
->btcoex_hw
.mci
.bt_ver_minor
= 0;
184 ah
->btcoex_hw
.mci
.bt_version_known
= false;
185 ah
->btcoex_hw
.mci
.update_2g5g
= true;
186 ah
->btcoex_hw
.mci
.is_2g
= true;
187 ah
->btcoex_hw
.mci
.wlan_channels_update
= false;
188 ah
->btcoex_hw
.mci
.wlan_channels
[0] = 0x00000000;
189 ah
->btcoex_hw
.mci
.wlan_channels
[1] = 0xffffffff;
190 ah
->btcoex_hw
.mci
.wlan_channels
[2] = 0xffffffff;
191 ah
->btcoex_hw
.mci
.wlan_channels
[3] = 0x7fffffff;
192 ah
->btcoex_hw
.mci
.query_bt
= true;
193 ah
->btcoex_hw
.mci
.unhalt_bt_gpm
= true;
194 ah
->btcoex_hw
.mci
.halted_bt_gpm
= false;
195 ah
->btcoex_hw
.mci
.need_flush_btinfo
= false;
196 ah
->btcoex_hw
.mci
.wlan_cal_seq
= 0;
197 ah
->btcoex_hw
.mci
.wlan_cal_done
= 0;
198 ah
->btcoex_hw
.mci
.config
= 0x2201;
200 EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci
);
202 static void ath9k_hw_btcoex_enable_2wire(struct ath_hw
*ah
)
204 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
206 /* Configure the desired GPIO port for TX_FRAME output */
207 ath9k_hw_cfg_output(ah
, btcoex_hw
->wlanactive_gpio
,
208 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME
);
211 void ath9k_hw_btcoex_set_weight(struct ath_hw
*ah
,
215 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
217 btcoex_hw
->bt_coex_weights
= SM(bt_weight
, AR_BTCOEX_BT_WGHT
) |
218 SM(wlan_weight
, AR_BTCOEX_WL_WGHT
);
220 EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight
);
223 static void ath9k_hw_btcoex_enable_3wire(struct ath_hw
*ah
)
225 struct ath_btcoex_hw
*btcoex
= &ah
->btcoex_hw
;
230 * Program coex mode and weight registers to
233 REG_WRITE(ah
, AR_BT_COEX_MODE
, btcoex
->bt_coex_mode
);
234 REG_WRITE(ah
, AR_BT_COEX_MODE2
, btcoex
->bt_coex_mode2
);
237 if (AR_SREV_9300_20_OR_LATER(ah
)) {
238 REG_WRITE(ah
, AR_BT_COEX_WL_WEIGHTS0
, btcoex
->wlan_weight
[0]);
239 REG_WRITE(ah
, AR_BT_COEX_WL_WEIGHTS1
, btcoex
->wlan_weight
[1]);
240 for (i
= 0; i
< AR9300_NUM_BT_WEIGHTS
; i
++)
241 REG_WRITE(ah
, AR_BT_COEX_BT_WEIGHTS(i
),
242 btcoex
->bt_weight
[i
]);
244 REG_WRITE(ah
, AR_BT_COEX_WEIGHT
, btcoex
->bt_coex_weights
);
248 if (AR_SREV_9271(ah
)) {
249 val
= REG_READ(ah
, 0x50040);
251 REG_WRITE(ah
, 0x50040, val
);
254 REG_RMW_FIELD(ah
, AR_QUIET1
, AR_QUIET1_QUIET_ACK_CTS_ENABLE
, 1);
255 REG_RMW_FIELD(ah
, AR_PCU_MISC
, AR_PCU_BT_ANT_PREVENT_RX
, 0);
257 ath9k_hw_cfg_output(ah
, btcoex
->wlanactive_gpio
,
258 AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL
);
261 static void ath9k_hw_btcoex_enable_mci(struct ath_hw
*ah
)
263 struct ath_btcoex_hw
*btcoex
= &ah
->btcoex_hw
;
266 for (i
= 0; i
< AR9300_NUM_BT_WEIGHTS
; i
++)
267 REG_WRITE(ah
, AR_MCI_COEX_WL_WEIGHTS(i
),
268 btcoex
->wlan_weight
[i
]);
270 REG_RMW_FIELD(ah
, AR_QUIET1
, AR_QUIET1_QUIET_ACK_CTS_ENABLE
, 1);
271 btcoex
->enabled
= true;
274 void ath9k_hw_btcoex_enable(struct ath_hw
*ah
)
276 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
278 switch (ath9k_hw_get_btcoex_scheme(ah
)) {
279 case ATH_BTCOEX_CFG_NONE
:
281 case ATH_BTCOEX_CFG_2WIRE
:
282 ath9k_hw_btcoex_enable_2wire(ah
);
284 case ATH_BTCOEX_CFG_3WIRE
:
285 if (AR_SREV_9462(ah
)) {
286 ath9k_hw_btcoex_enable_mci(ah
);
289 ath9k_hw_btcoex_enable_3wire(ah
);
293 REG_RMW(ah
, AR_GPIO_PDPU
,
294 (0x2 << (btcoex_hw
->btactive_gpio
* 2)),
295 (0x3 << (btcoex_hw
->btactive_gpio
* 2)));
297 ah
->btcoex_hw
.enabled
= true;
299 EXPORT_SYMBOL(ath9k_hw_btcoex_enable
);
301 void ath9k_hw_btcoex_disable(struct ath_hw
*ah
)
303 struct ath_btcoex_hw
*btcoex_hw
= &ah
->btcoex_hw
;
306 btcoex_hw
->enabled
= false;
307 if (AR_SREV_9462(ah
)) {
308 ath9k_hw_btcoex_bt_stomp(ah
, ATH_BTCOEX_STOMP_NONE
);
309 for (i
= 0; i
< AR9300_NUM_BT_WEIGHTS
; i
++)
310 REG_WRITE(ah
, AR_MCI_COEX_WL_WEIGHTS(i
),
311 btcoex_hw
->wlan_weight
[i
]);
314 ath9k_hw_set_gpio(ah
, btcoex_hw
->wlanactive_gpio
, 0);
316 ath9k_hw_cfg_output(ah
, btcoex_hw
->wlanactive_gpio
,
317 AR_GPIO_OUTPUT_MUX_AS_OUTPUT
);
319 if (btcoex_hw
->scheme
== ATH_BTCOEX_CFG_3WIRE
) {
320 REG_WRITE(ah
, AR_BT_COEX_MODE
, AR_BT_QUIET
| AR_BT_MODE
);
321 REG_WRITE(ah
, AR_BT_COEX_MODE2
, 0);
323 if (AR_SREV_9300_20_OR_LATER(ah
)) {
324 REG_WRITE(ah
, AR_BT_COEX_WL_WEIGHTS0
, 0);
325 REG_WRITE(ah
, AR_BT_COEX_WL_WEIGHTS1
, 0);
326 for (i
= 0; i
< AR9300_NUM_BT_WEIGHTS
; i
++)
327 REG_WRITE(ah
, AR_BT_COEX_BT_WEIGHTS(i
), 0);
329 REG_WRITE(ah
, AR_BT_COEX_WEIGHT
, 0);
333 EXPORT_SYMBOL(ath9k_hw_btcoex_disable
);
335 static void ar9003_btcoex_bt_stomp(struct ath_hw
*ah
,
336 enum ath_stomp_type stomp_type
)
338 struct ath_btcoex_hw
*btcoex
= &ah
->btcoex_hw
;
339 const u32
*weight
= ar9003_wlan_weights
[stomp_type
];
342 if (AR_SREV_9462(ah
)) {
343 if ((stomp_type
== ATH_BTCOEX_STOMP_LOW
) &&
344 btcoex
->mci
.stomp_ftp
)
345 stomp_type
= ATH_BTCOEX_STOMP_LOW_FTP
;
346 weight
= ar9462_wlan_weights
[stomp_type
];
349 for (i
= 0; i
< AR9300_NUM_WLAN_WEIGHTS
; i
++) {
350 btcoex
->bt_weight
[i
] = AR9300_BT_WGHT
;
351 btcoex
->wlan_weight
[i
] = weight
[i
];
356 * Configures appropriate weight based on stomp type.
358 void ath9k_hw_btcoex_bt_stomp(struct ath_hw
*ah
,
359 enum ath_stomp_type stomp_type
)
361 if (AR_SREV_9300_20_OR_LATER(ah
)) {
362 ar9003_btcoex_bt_stomp(ah
, stomp_type
);
366 switch (stomp_type
) {
367 case ATH_BTCOEX_STOMP_ALL
:
368 ath9k_hw_btcoex_set_weight(ah
, AR_BT_COEX_WGHT
,
369 AR_STOMP_ALL_WLAN_WGHT
);
371 case ATH_BTCOEX_STOMP_LOW
:
372 ath9k_hw_btcoex_set_weight(ah
, AR_BT_COEX_WGHT
,
373 AR_STOMP_LOW_WLAN_WGHT
);
375 case ATH_BTCOEX_STOMP_NONE
:
376 ath9k_hw_btcoex_set_weight(ah
, AR_BT_COEX_WGHT
,
377 AR_STOMP_NONE_WLAN_WGHT
);
380 ath_dbg(ath9k_hw_common(ah
), BTCOEX
, "Invalid Stomptype\n");
384 EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp
);