2 * omap-dmic.c -- OMAP ASoC DMIC DAI driver
4 * Copyright (C) 2010 - 2011 Texas Instruments
6 * Author: David Lambert <dlambert@ti.com>
7 * Misael Lopez Cruz <misael.lopez@ti.com>
8 * Liam Girdwood <lrg@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/err.h>
31 #include <linux/clk.h>
33 #include <linux/slab.h>
34 #include <linux/pm_runtime.h>
35 #include <linux/of_device.h>
38 #include <sound/core.h>
39 #include <sound/pcm.h>
40 #include <sound/pcm_params.h>
41 #include <sound/initval.h>
42 #include <sound/soc.h>
45 #include "omap-dmic.h"
49 void __iomem
*io_base
;
62 * Stream DMA parameters
64 static struct omap_pcm_dma_data omap_dmic_dai_dma_params
= {
65 .name
= "DMIC capture",
66 .data_type
= OMAP_DMA_DATA_TYPE_S32
,
67 .sync_mode
= OMAP_DMA_SYNC_PACKET
,
70 static inline void omap_dmic_write(struct omap_dmic
*dmic
, u16 reg
, u32 val
)
72 __raw_writel(val
, dmic
->io_base
+ reg
);
75 static inline int omap_dmic_read(struct omap_dmic
*dmic
, u16 reg
)
77 return __raw_readl(dmic
->io_base
+ reg
);
80 static inline void omap_dmic_start(struct omap_dmic
*dmic
)
82 u32 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
84 /* Configure DMA controller */
85 omap_dmic_write(dmic
, OMAP_DMIC_DMAENABLE_SET_REG
,
86 OMAP_DMIC_DMA_ENABLE
);
88 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, ctrl
| dmic
->ch_enabled
);
91 static inline void omap_dmic_stop(struct omap_dmic
*dmic
)
93 u32 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
94 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
,
95 ctrl
& ~OMAP_DMIC_UP_ENABLE_MASK
);
97 /* Disable DMA request generation */
98 omap_dmic_write(dmic
, OMAP_DMIC_DMAENABLE_CLR_REG
,
99 OMAP_DMIC_DMA_ENABLE
);
103 static inline int dmic_is_enabled(struct omap_dmic
*dmic
)
105 return omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
) &
106 OMAP_DMIC_UP_ENABLE_MASK
;
109 static int omap_dmic_dai_startup(struct snd_pcm_substream
*substream
,
110 struct snd_soc_dai
*dai
)
112 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
115 mutex_lock(&dmic
->mutex
);
122 mutex_unlock(&dmic
->mutex
);
127 static void omap_dmic_dai_shutdown(struct snd_pcm_substream
*substream
,
128 struct snd_soc_dai
*dai
)
130 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
132 mutex_lock(&dmic
->mutex
);
137 mutex_unlock(&dmic
->mutex
);
140 static int omap_dmic_select_divider(struct omap_dmic
*dmic
, int sample_rate
)
142 int divider
= -EINVAL
;
145 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
148 if (sample_rate
== 192000) {
149 if (dmic
->fclk_freq
== 19200000 && dmic
->out_freq
== 3840000)
150 divider
= 0x6; /* Divider: 5 (192KHz sampling rate) */
153 "invalid clock configuration for 192KHz\n");
158 switch (dmic
->out_freq
) {
160 if (dmic
->fclk_freq
!= 24576000)
162 divider
= 0x4; /* Divider: 16 */
165 switch (dmic
->fclk_freq
) {
167 divider
= 0x5; /* Divider: 5 */
170 divider
= 0x0; /* Divider: 8 */
173 divider
= 0x2; /* Divider: 10 */
180 if (dmic
->fclk_freq
!= 24576000)
182 divider
= 0x3; /* Divider: 8 */
185 if (dmic
->fclk_freq
!= 19200000)
187 divider
= 0x1; /* Divider: 5 (96KHz sampling rate) */
190 dev_err(dmic
->dev
, "invalid out frequency: %dHz\n",
198 dev_err(dmic
->dev
, "invalid out frequency %dHz for %dHz input\n",
199 dmic
->out_freq
, dmic
->fclk_freq
);
203 static int omap_dmic_dai_hw_params(struct snd_pcm_substream
*substream
,
204 struct snd_pcm_hw_params
*params
,
205 struct snd_soc_dai
*dai
)
207 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
210 dmic
->clk_div
= omap_dmic_select_divider(dmic
, params_rate(params
));
211 if (dmic
->clk_div
< 0) {
212 dev_err(dmic
->dev
, "no valid divider for %dHz from %dHz\n",
213 dmic
->out_freq
, dmic
->fclk_freq
);
217 dmic
->ch_enabled
= 0;
218 channels
= params_channels(params
);
221 dmic
->ch_enabled
|= OMAP_DMIC_UP3_ENABLE
;
223 dmic
->ch_enabled
|= OMAP_DMIC_UP2_ENABLE
;
225 dmic
->ch_enabled
|= OMAP_DMIC_UP1_ENABLE
;
228 dev_err(dmic
->dev
, "invalid number of legacy channels\n");
232 /* packet size is threshold * channels */
233 omap_dmic_dai_dma_params
.packet_size
= dmic
->threshold
* channels
;
234 snd_soc_dai_set_dma_data(dai
, substream
, &omap_dmic_dai_dma_params
);
239 static int omap_dmic_dai_prepare(struct snd_pcm_substream
*substream
,
240 struct snd_soc_dai
*dai
)
242 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
245 /* Configure uplink threshold */
246 omap_dmic_write(dmic
, OMAP_DMIC_FIFO_CTRL_REG
, dmic
->threshold
);
248 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
250 /* Set dmic out format */
251 ctrl
&= ~(OMAP_DMIC_FORMAT
| OMAP_DMIC_POLAR_MASK
);
252 ctrl
|= (OMAP_DMICOUTFORMAT_LJUST
| OMAP_DMIC_POLAR1
|
253 OMAP_DMIC_POLAR2
| OMAP_DMIC_POLAR3
);
255 /* Configure dmic clock divider */
256 ctrl
&= ~OMAP_DMIC_CLK_DIV_MASK
;
257 ctrl
|= OMAP_DMIC_CLK_DIV(dmic
->clk_div
);
259 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, ctrl
);
261 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
,
262 ctrl
| OMAP_DMICOUTFORMAT_LJUST
| OMAP_DMIC_POLAR1
|
263 OMAP_DMIC_POLAR2
| OMAP_DMIC_POLAR3
);
268 static int omap_dmic_dai_trigger(struct snd_pcm_substream
*substream
,
269 int cmd
, struct snd_soc_dai
*dai
)
271 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
274 case SNDRV_PCM_TRIGGER_START
:
275 omap_dmic_start(dmic
);
277 case SNDRV_PCM_TRIGGER_STOP
:
278 omap_dmic_stop(dmic
);
287 static int omap_dmic_select_fclk(struct omap_dmic
*dmic
, int clk_id
,
290 struct clk
*parent_clk
;
291 char *parent_clk_name
;
301 dev_err(dmic
->dev
, "invalid input frequency: %dHz\n", freq
);
306 if (dmic
->sysclk
== clk_id
) {
307 dmic
->fclk_freq
= freq
;
311 /* re-parent not allowed if a stream is ongoing */
312 if (dmic
->active
&& dmic_is_enabled(dmic
)) {
313 dev_err(dmic
->dev
, "can't re-parent when DMIC active\n");
318 case OMAP_DMIC_SYSCLK_PAD_CLKS
:
319 parent_clk_name
= "pad_clks_ck";
321 case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS
:
322 parent_clk_name
= "slimbus_clk";
324 case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS
:
325 parent_clk_name
= "dmic_sync_mux_ck";
328 dev_err(dmic
->dev
, "fclk clk_id (%d) not supported\n", clk_id
);
332 parent_clk
= clk_get(dmic
->dev
, parent_clk_name
);
333 if (IS_ERR(parent_clk
)) {
334 dev_err(dmic
->dev
, "can't get %s\n", parent_clk_name
);
338 mutex_lock(&dmic
->mutex
);
340 /* disable clock while reparenting */
341 pm_runtime_put_sync(dmic
->dev
);
342 ret
= clk_set_parent(dmic
->fclk
, parent_clk
);
343 pm_runtime_get_sync(dmic
->dev
);
345 ret
= clk_set_parent(dmic
->fclk
, parent_clk
);
347 mutex_unlock(&dmic
->mutex
);
350 dev_err(dmic
->dev
, "re-parent failed\n");
354 dmic
->sysclk
= clk_id
;
355 dmic
->fclk_freq
= freq
;
363 static int omap_dmic_select_outclk(struct omap_dmic
*dmic
, int clk_id
,
368 if (clk_id
!= OMAP_DMIC_ABE_DMIC_CLK
) {
369 dev_err(dmic
->dev
, "output clk_id (%d) not supported\n",
379 dmic
->out_freq
= freq
;
382 dev_err(dmic
->dev
, "invalid out frequency: %dHz\n", freq
);
390 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai
*dai
, int clk_id
,
391 unsigned int freq
, int dir
)
393 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
395 if (dir
== SND_SOC_CLOCK_IN
)
396 return omap_dmic_select_fclk(dmic
, clk_id
, freq
);
397 else if (dir
== SND_SOC_CLOCK_OUT
)
398 return omap_dmic_select_outclk(dmic
, clk_id
, freq
);
400 dev_err(dmic
->dev
, "invalid clock direction (%d)\n", dir
);
404 static const struct snd_soc_dai_ops omap_dmic_dai_ops
= {
405 .startup
= omap_dmic_dai_startup
,
406 .shutdown
= omap_dmic_dai_shutdown
,
407 .hw_params
= omap_dmic_dai_hw_params
,
408 .prepare
= omap_dmic_dai_prepare
,
409 .trigger
= omap_dmic_dai_trigger
,
410 .set_sysclk
= omap_dmic_set_dai_sysclk
,
413 static int omap_dmic_probe(struct snd_soc_dai
*dai
)
415 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
417 pm_runtime_enable(dmic
->dev
);
419 /* Disable lines while request is ongoing */
420 pm_runtime_get_sync(dmic
->dev
);
421 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, 0x00);
422 pm_runtime_put_sync(dmic
->dev
);
424 /* Configure DMIC threshold value */
425 dmic
->threshold
= OMAP_DMIC_THRES_MAX
- 3;
429 static int omap_dmic_remove(struct snd_soc_dai
*dai
)
431 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
433 pm_runtime_disable(dmic
->dev
);
438 static struct snd_soc_dai_driver omap_dmic_dai
= {
440 .probe
= omap_dmic_probe
,
441 .remove
= omap_dmic_remove
,
445 .rates
= SNDRV_PCM_RATE_96000
| SNDRV_PCM_RATE_192000
,
446 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
449 .ops
= &omap_dmic_dai_ops
,
452 static __devinit
int asoc_dmic_probe(struct platform_device
*pdev
)
454 struct omap_dmic
*dmic
;
455 struct resource
*res
;
458 dmic
= devm_kzalloc(&pdev
->dev
, sizeof(struct omap_dmic
), GFP_KERNEL
);
462 platform_set_drvdata(pdev
, dmic
);
463 dmic
->dev
= &pdev
->dev
;
464 dmic
->sysclk
= OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS
;
466 mutex_init(&dmic
->mutex
);
468 dmic
->fclk
= clk_get(dmic
->dev
, "dmic_fck");
469 if (IS_ERR(dmic
->fclk
)) {
470 dev_err(dmic
->dev
, "cant get dmic_fck\n");
474 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "dma");
476 dev_err(dmic
->dev
, "invalid dma memory resource\n");
480 omap_dmic_dai_dma_params
.port_addr
= res
->start
+ OMAP_DMIC_DATA_REG
;
482 res
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
484 dev_err(dmic
->dev
, "invalid dma resource\n");
488 omap_dmic_dai_dma_params
.dma_req
= res
->start
;
490 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "mpu");
492 dev_err(dmic
->dev
, "invalid memory resource\n");
497 if (!devm_request_mem_region(&pdev
->dev
, res
->start
,
498 resource_size(res
), pdev
->name
)) {
499 dev_err(dmic
->dev
, "memory region already claimed\n");
504 dmic
->io_base
= devm_ioremap(&pdev
->dev
, res
->start
,
506 if (!dmic
->io_base
) {
511 ret
= snd_soc_register_dai(&pdev
->dev
, &omap_dmic_dai
);
522 static int __devexit
asoc_dmic_remove(struct platform_device
*pdev
)
524 struct omap_dmic
*dmic
= platform_get_drvdata(pdev
);
526 snd_soc_unregister_dai(&pdev
->dev
);
532 static const struct of_device_id omap_dmic_of_match
[] = {
533 { .compatible
= "ti,omap4-dmic", },
536 MODULE_DEVICE_TABLE(of
, omap_dmic_of_match
);
538 static struct platform_driver asoc_dmic_driver
= {
541 .owner
= THIS_MODULE
,
542 .of_match_table
= omap_dmic_of_match
,
544 .probe
= asoc_dmic_probe
,
545 .remove
= __devexit_p(asoc_dmic_remove
),
548 module_platform_driver(asoc_dmic_driver
);
550 MODULE_ALIAS("platform:omap-dmic");
551 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
552 MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
553 MODULE_LICENSE("GPL");