2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 /include/ "skeleton.dtsi"
15 interrupt-parent = <&icoll>;
27 compatible = "arm,arm926ejs";
32 compatible = "simple-bus";
35 reg = <0x80000000 0x80000>;
39 compatible = "simple-bus";
42 reg = <0x80000000 0x40000>;
45 icoll: interrupt-controller@80000000 {
46 compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";
48 #interrupt-cells = <1>;
49 reg = <0x80000000 0x2000>;
53 compatible = "fsl,imx23-dma-apbh";
54 reg = <0x80004000 0x2000>;
58 reg = <0x80008000 0x2000>;
63 compatible = "fsl,imx23-gpmi-nand";
66 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
67 reg-names = "gpmi-nand", "bch";
68 interrupts = <13>, <56>;
69 interrupt-names = "gpmi-dma", "bch";
70 fsl,gpmi-dma-channel = <4>;
75 reg = <0x80010000 0x2000>;
77 fsl,ssp-dma-channel = <1>;
82 reg = <0x80014000 0x2000>;
89 compatible = "fsl,imx23-pinctrl", "simple-bus";
90 reg = <0x80018000 0x2000>;
93 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
98 #interrupt-cells = <2>;
102 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
106 interrupt-controller;
107 #interrupt-cells = <2>;
111 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
115 interrupt-controller;
116 #interrupt-cells = <2>;
119 duart_pins_a: duart@0 {
122 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
123 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
125 fsl,drive-strength = <0>;
130 auart0_pins_a: auart0@0 {
133 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
134 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
135 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
136 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
138 fsl,drive-strength = <0>;
143 gpmi_pins_a: gpmi-nand@0 {
146 0x0000 /* MX23_PAD_GPMI_D00__GPMI_D00 */
147 0x0010 /* MX23_PAD_GPMI_D01__GPMI_D01 */
148 0x0020 /* MX23_PAD_GPMI_D02__GPMI_D02 */
149 0x0030 /* MX23_PAD_GPMI_D03__GPMI_D03 */
150 0x0040 /* MX23_PAD_GPMI_D04__GPMI_D04 */
151 0x0050 /* MX23_PAD_GPMI_D05__GPMI_D05 */
152 0x0060 /* MX23_PAD_GPMI_D06__GPMI_D06 */
153 0x0070 /* MX23_PAD_GPMI_D07__GPMI_D07 */
154 0x0100 /* MX23_PAD_GPMI_CLE__GPMI_CLE */
155 0x0110 /* MX23_PAD_GPMI_ALE__GPMI_ALE */
156 0x0130 /* MX23_PAD_GPMI_RDY0__GPMI_RDY0 */
157 0x0140 /* MX23_PAD_GPMI_RDY1__GPMI_RDY1 */
158 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
159 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
160 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
161 0x21b0 /* MX23_PAD_GPMI_CE1N__GPMI_CE1N */
162 0x21c0 /* MX23_PAD_GPMI_CE0N__GPMI_CE0N */
164 fsl,drive-strength = <0>;
169 gpmi_pins_fixup: gpmi-pins-fixup {
171 0x0170 /* MX23_PAD_GPMI_WPN__GPMI_WPN */
172 0x0180 /* MX23_PAD_GPMI_WRN__GPMI_WRN */
173 0x0190 /* MX23_PAD_GPMI_RDN__GPMI_RDN */
175 fsl,drive-strength = <2>;
178 mmc0_4bit_pins_a: mmc0-4bit@0 {
181 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
182 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
183 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
184 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
185 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
186 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
187 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
189 fsl,drive-strength = <1>;
194 mmc0_8bit_pins_a: mmc0-8bit@0 {
197 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
198 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
199 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
200 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
201 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
202 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
203 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
204 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
205 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
206 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
207 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
209 fsl,drive-strength = <1>;
214 mmc0_pins_fixup: mmc0-pins-fixup {
216 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
217 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
222 pwm2_pins_a: pwm2@0 {
225 0x11c0 /* MX23_PAD_PWM2__PWM2 */
227 fsl,drive-strength = <0>;
232 lcdif_24bit_pins_a: lcdif-24bit@0 {
235 0x1000 /* MX23_PAD_LCD_D00__LCD_D0 */
236 0x1010 /* MX23_PAD_LCD_D01__LCD_D1 */
237 0x1020 /* MX23_PAD_LCD_D02__LCD_D2 */
238 0x1030 /* MX23_PAD_LCD_D03__LCD_D3 */
239 0x1040 /* MX23_PAD_LCD_D04__LCD_D4 */
240 0x1050 /* MX23_PAD_LCD_D05__LCD_D5 */
241 0x1060 /* MX23_PAD_LCD_D06__LCD_D6 */
242 0x1070 /* MX23_PAD_LCD_D07__LCD_D7 */
243 0x1080 /* MX23_PAD_LCD_D08__LCD_D8 */
244 0x1090 /* MX23_PAD_LCD_D09__LCD_D9 */
245 0x10a0 /* MX23_PAD_LCD_D10__LCD_D10 */
246 0x10b0 /* MX23_PAD_LCD_D11__LCD_D11 */
247 0x10c0 /* MX23_PAD_LCD_D12__LCD_D12 */
248 0x10d0 /* MX23_PAD_LCD_D13__LCD_D13 */
249 0x10e0 /* MX23_PAD_LCD_D14__LCD_D14 */
250 0x10f0 /* MX23_PAD_LCD_D15__LCD_D15 */
251 0x1100 /* MX23_PAD_LCD_D16__LCD_D16 */
252 0x1110 /* MX23_PAD_LCD_D17__LCD_D17 */
253 0x0081 /* MX23_PAD_GPMI_D08__LCD_D18 */
254 0x0091 /* MX23_PAD_GPMI_D09__LCD_D19 */
255 0x00a1 /* MX23_PAD_GPMI_D10__LCD_D20 */
256 0x00b1 /* MX23_PAD_GPMI_D11__LCD_D21 */
257 0x00c1 /* MX23_PAD_GPMI_D12__LCD_D22 */
258 0x00d1 /* MX23_PAD_GPMI_D13__LCD_D23 */
259 0x1160 /* MX23_PAD_LCD_DOTCK__LCD_DOTCK */
260 0x1170 /* MX23_PAD_LCD_ENABLE__LCD_ENABLE */
261 0x1180 /* MX23_PAD_LCD_HSYNC__LCD_HSYNC */
262 0x1190 /* MX23_PAD_LCD_VSYNC__LCD_VSYNC */
264 fsl,drive-strength = <0>;
271 reg = <0x8001c000 2000>;
276 reg = <0x80020000 0x2000>;
281 compatible = "fsl,imx23-dma-apbx";
282 reg = <0x80024000 0x2000>;
286 reg = <0x80028000 0x2000>;
291 reg = <0x8002a000 0x2000>;
296 reg = <0x8002c000 0x2000>;
301 reg = <0x8002e000 0x2000>;
306 compatible = "fsl,imx23-lcdif";
307 reg = <0x80030000 2000>;
308 interrupts = <46 45>;
313 reg = <0x80034000 0x2000>;
315 fsl,ssp-dma-channel = <2>;
320 reg = <0x80038000 0x2000>;
326 compatible = "simple-bus";
327 #address-cells = <1>;
329 reg = <0x80040000 0x40000>;
333 reg = <0x80040000 0x2000>;
337 saif0: saif@80042000 {
338 reg = <0x80042000 0x2000>;
343 reg = <0x80044000 0x2000>;
347 saif1: saif@80046000 {
348 reg = <0x80046000 0x2000>;
353 reg = <0x80048000 0x2000>;
358 reg = <0x8004c000 0x2000>;
363 reg = <0x80050000 0x2000>;
368 reg = <0x80054000 2000>;
373 reg = <0x80058000 0x2000>;
378 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
379 reg = <0x8005c000 0x2000>;
384 compatible = "fsl,imx23-pwm";
385 reg = <0x80064000 0x2000>;
387 fsl,pwm-number = <5>;
392 reg = <0x80068000 0x2000>;
396 auart0: serial@8006c000 {
397 compatible = "fsl,imx23-auart";
398 reg = <0x8006c000 0x2000>;
399 interrupts = <24 25 23>;
403 auart1: serial@8006e000 {
404 compatible = "fsl,imx23-auart";
405 reg = <0x8006e000 0x2000>;
406 interrupts = <59 60 58>;
410 duart: serial@80070000 {
411 compatible = "arm,pl011", "arm,primecell";
412 reg = <0x80070000 0x2000>;
418 reg = <0x8007c000 0x2000>;
425 compatible = "simple-bus";
426 #address-cells = <1>;
428 reg = <0x80080000 0x80000>;
432 reg = <0x80080000 0x40000>;