2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 /include/ "skeleton.dtsi"
14 compatible = "ti,omap3430", "ti,omap3";
25 compatible = "arm,cortex-a8";
30 * The soc node represents the soc top level view. It is uses for IPs
31 * that are not memory mapped in the MPU view or for the MPU itself.
34 compatible = "ti,omap-infra";
36 compatible = "ti,omap3-mpu";
41 compatible = "ti,iva2.2";
45 compatible = "ti,omap3-c64";
51 * XXX: Use a flat representation of the OMAP3 interconnect.
52 * The real OMAP interconnect network is quite complex.
53 * Since that will not bring real advantage to represent that in DT for
54 * the moment, just use a fake OCP bus entry to represent the whole bus
58 compatible = "simple-bus";
62 ti,hwmods = "l3_main";
64 intc: interrupt-controller@48200000 {
65 compatible = "ti,omap2-intc";
67 #interrupt-cells = <1>;
69 reg = <0x48200000 0x1000>;
72 gpio1: gpio@48310000 {
73 compatible = "ti,omap3-gpio";
78 #interrupt-cells = <1>;
81 gpio2: gpio@49050000 {
82 compatible = "ti,omap3-gpio";
87 #interrupt-cells = <1>;
90 gpio3: gpio@49052000 {
91 compatible = "ti,omap3-gpio";
96 #interrupt-cells = <1>;
99 gpio4: gpio@49054000 {
100 compatible = "ti,omap3-gpio";
104 interrupt-controller;
105 #interrupt-cells = <1>;
108 gpio5: gpio@49056000 {
109 compatible = "ti,omap3-gpio";
113 interrupt-controller;
114 #interrupt-cells = <1>;
117 gpio6: gpio@49058000 {
118 compatible = "ti,omap3-gpio";
122 interrupt-controller;
123 #interrupt-cells = <1>;
126 uart1: serial@4806a000 {
127 compatible = "ti,omap3-uart";
129 clock-frequency = <48000000>;
132 uart2: serial@4806c000 {
133 compatible = "ti,omap3-uart";
135 clock-frequency = <48000000>;
138 uart3: serial@49020000 {
139 compatible = "ti,omap3-uart";
141 clock-frequency = <48000000>;
144 uart4: serial@49042000 {
145 compatible = "ti,omap3-uart";
147 clock-frequency = <48000000>;
151 compatible = "ti,omap3-i2c";
152 #address-cells = <1>;
158 compatible = "ti,omap3-i2c";
159 #address-cells = <1>;
165 compatible = "ti,omap3-i2c";
166 #address-cells = <1>;
171 mcspi1: spi@48098000 {
172 compatible = "ti,omap2-mcspi";
173 #address-cells = <1>;
175 ti,hwmods = "mcspi1";
179 mcspi2: spi@4809a000 {
180 compatible = "ti,omap2-mcspi";
181 #address-cells = <1>;
183 ti,hwmods = "mcspi2";
187 mcspi3: spi@480b8000 {
188 compatible = "ti,omap2-mcspi";
189 #address-cells = <1>;
191 ti,hwmods = "mcspi3";
195 mcspi4: spi@480ba000 {
196 compatible = "ti,omap2-mcspi";
197 #address-cells = <1>;
199 ti,hwmods = "mcspi4";
204 compatible = "ti,omap3-hsmmc";
210 compatible = "ti,omap3-hsmmc";
215 compatible = "ti,omap3-hsmmc";
220 compatible = "ti,omap3-wdt";
221 ti,hwmods = "wd_timer2";