arch/arm/mach-exynos/mach-smdkv310.c

   1 /* linux/arch/arm/mach-exynos4/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/delay.h>
  13 #include <linux/gpio.h>
  14 #include <linux/lcd.h>
  15 #include <linux/mmc/host.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/smsc911x.h>
  18 #include <linux/io.h>
  19 #include <linux/i2c.h>
  20 #include <linux/input.h>
  21 #include <linux/pwm_backlight.h>
  22 #include <linux/platform_data/s3c-hsotg.h>
  23
  24 #include <asm/mach/arch.h>
  25 #include <asm/hardware/gic.h>
  26 #include <asm/mach-types.h>
  27
  28 #include <video/platform_lcd.h>
  29 #include <plat/regs-serial.h>
  30 #include <plat/regs-srom.h>
  31 #include <plat/regs-fb-v4.h>
  32 #include <plat/cpu.h>
  33 #include <plat/devs.h>
  34 #include <plat/fb.h>
  35 #include <plat/keypad.h>
  36 #include <plat/sdhci.h>
  37 #include <plat/iic.h>
  38 #include <plat/gpio-cfg.h>
  39 #include <plat/backlight.h>
  40 #include <plat/mfc.h>
  41 #include <plat/ehci.h>
  42 #include <plat/clock.h>
  43 #include <plat/hdmi.h>
  44
  45 #include <mach/map.h>
  46 #include <mach/ohci.h>
  47
  48 #include <drm/exynos_drm.h>
  49 #include "common.h"
  50
  51 /* Following are default values for UCON, ULCON and UFCON UART registers */
  52 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  53                                  S3C2410_UCON_RXILEVEL |        \
  54                                  S3C2410_UCON_TXIRQMODE |       \
  55                                  S3C2410_UCON_RXIRQMODE |       \
  56                                  S3C2410_UCON_RXFIFO_TOI |      \
  57                                  S3C2443_UCON_RXERR_IRQEN)
  58
  59 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  60
  61 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  62                                  S5PV210_UFCON_TXTRIG4 |        \
  63                                  S5PV210_UFCON_RXTRIG4)
  64
  65 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  66         [0] = {
  67                 .hwport         = 0,
  68                 .flags          = 0,
  69                 .ucon           = SMDKV310_UCON_DEFAULT,
  70                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  71                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  72         },
  73         [1] = {
  74                 .hwport         = 1,
  75                 .flags          = 0,
  76                 .ucon           = SMDKV310_UCON_DEFAULT,
  77                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  78                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  79         },
  80         [2] = {
  81                 .hwport         = 2,
  82                 .flags          = 0,
  83                 .ucon           = SMDKV310_UCON_DEFAULT,
  84                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  85                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  86         },
  87         [3] = {
  88                 .hwport         = 3,
  89                 .flags          = 0,
  90                 .ucon           = SMDKV310_UCON_DEFAULT,
  91                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  92                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  93         },
  94 };
  95
  96 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  97         .cd_type                = S3C_SDHCI_CD_INTERNAL,
  98 #ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
  99         .max_width              = 8,
 100         .host_caps              = MMC_CAP_8_BIT_DATA,
 101 #endif
 102 };
 103
 104 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
 105         .cd_type                = S3C_SDHCI_CD_GPIO,
 106         .ext_cd_gpio            = EXYNOS4_GPK0(2),
 107         .ext_cd_gpio_invert     = 1,
 108 };
 109
 110 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
 111         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 112 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
 113         .max_width              = 8,
 114         .host_caps              = MMC_CAP_8_BIT_DATA,
 115 #endif
 116 };
 117
 118 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 119         .cd_type                = S3C_SDHCI_CD_GPIO,
 120         .ext_cd_gpio            = EXYNOS4_GPK2(2),
 121         .ext_cd_gpio_invert     = 1,
 122 };
 123
 124 static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
 125                                    unsigned int power)
 126 {
 127         if (power) {
 128 #if !defined(CONFIG_BACKLIGHT_PWM)
 129                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
 130                 gpio_free(EXYNOS4_GPD0(1));
 131 #endif
 132                 /* fire nRESET on power up */
 133                 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
 134                 mdelay(100);
 135
 136                 gpio_set_value(EXYNOS4_GPX0(6), 0);
 137                 mdelay(10);
 138
 139                 gpio_set_value(EXYNOS4_GPX0(6), 1);
 140                 mdelay(10);
 141
 142                 gpio_free(EXYNOS4_GPX0(6));
 143         } else {
 144 #if !defined(CONFIG_BACKLIGHT_PWM)
 145                 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
 146                 gpio_free(EXYNOS4_GPD0(1));
 147 #endif
 148         }
 149 }
 150
 151 static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
 152         .set_power              = lcd_lte480wv_set_power,
 153 };
 154
 155 static struct platform_device smdkv310_lcd_lte480wv = {
 156         .name                   = "platform-lcd",
 157         .dev.parent             = &s5p_device_fimd0.dev,
 158         .dev.platform_data      = &smdkv310_lcd_lte480wv_data,
 159 };
 160
 161 #ifdef CONFIG_DRM_EXYNOS
 162 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
 163         .panel  = {
 164                 .timing = {
 165                         .left_margin    = 13,
 166                         .right_margin   = 8,
 167                         .upper_margin   = 7,
 168                         .lower_margin   = 5,
 169                         .hsync_len      = 3,
 170                         .vsync_len      = 1,
 171                         .xres           = 800,
 172                         .yres           = 480,
 173                 },
 174         },
 175         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 176         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 177         .default_win    = 0,
 178         .bpp            = 32,
 179 };
 180 #else
 181 static struct s3c_fb_pd_win smdkv310_fb_win0 = {
 182         .max_bpp        = 32,
 183         .default_bpp    = 24,
 184         .xres           = 800,
 185         .yres           = 480,
 186 };
 187
 188 static struct fb_videomode smdkv310_lcd_timing = {
 189         .left_margin    = 13,
 190         .right_margin   = 8,
 191         .upper_margin   = 7,
 192         .lower_margin   = 5,
 193         .hsync_len      = 3,
 194         .vsync_len      = 1,
 195         .xres           = 800,
 196         .yres           = 480,
 197 };
 198
 199 static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
 200         .win[0]         = &smdkv310_fb_win0,
 201         .vtiming        = &smdkv310_lcd_timing,
 202         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 203         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 204         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
 205 };
 206 #endif
 207
 208 static struct resource smdkv310_smsc911x_resources[] = {
 209         [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
 210         [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
 211                                                 | IRQF_TRIGGER_LOW),
 212 };
 213
 214 static struct smsc911x_platform_config smsc9215_config = {
 215         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 216         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
 217         .flags          = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
 218         .phy_interface  = PHY_INTERFACE_MODE_MII,
 219         .mac            = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
 220 };
 221
 222 static struct platform_device smdkv310_smsc911x = {
 223         .name           = "smsc911x",
 224         .id             = -1,
 225         .num_resources  = ARRAY_SIZE(smdkv310_smsc911x_resources),
 226         .resource       = smdkv310_smsc911x_resources,
 227         .dev            = {
 228                 .platform_data  = &smsc9215_config,
 229         },
 230 };
 231
 232 static uint32_t smdkv310_keymap[] __initdata = {
 233         /* KEY(row, col, keycode) */
 234         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 235         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 236         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 237         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 238 };
 239
 240 static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
 241         .keymap         = smdkv310_keymap,
 242         .keymap_size    = ARRAY_SIZE(smdkv310_keymap),
 243 };
 244
 245 static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
 246         .keymap_data    = &smdkv310_keymap_data,
 247         .rows           = 2,
 248         .cols           = 8,
 249 };
 250
 251 static struct i2c_board_info i2c_devs1[] __initdata = {
 252         {I2C_BOARD_INFO("wm8994", 0x1a),},
 253 };
 254
 255 /* USB EHCI */
 256 static struct s5p_ehci_platdata smdkv310_ehci_pdata;
 257
 258 static void __init smdkv310_ehci_init(void)
 259 {
 260         struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
 261
 262         s5p_ehci_set_platdata(pdata);
 263 }
 264
 265 /* USB OHCI */
 266 static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
 267
 268 static void __init smdkv310_ohci_init(void)
 269 {
 270         struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
 271
 272         exynos4_ohci_set_platdata(pdata);
 273 }
 274
 275 /* USB OTG */
 276 static struct s3c_hsotg_plat smdkv310_hsotg_pdata;
 277
 278 /* Audio device */
 279 static struct platform_device smdkv310_device_audio = {
 280         .name = "smdk-audio",
 281         .id = -1,
 282 };
 283
 284 static struct platform_device *smdkv310_devices[] __initdata = {
 285         &s3c_device_hsmmc0,
 286         &s3c_device_hsmmc1,
 287         &s3c_device_hsmmc2,
 288         &s3c_device_hsmmc3,
 289         &s3c_device_i2c1,
 290         &s5p_device_i2c_hdmiphy,
 291         &s3c_device_rtc,
 292         &s3c_device_usb_hsotg,
 293         &s3c_device_wdt,
 294         &s5p_device_ehci,
 295         &s5p_device_fimc0,
 296         &s5p_device_fimc1,
 297         &s5p_device_fimc2,
 298         &s5p_device_fimc3,
 299         &s5p_device_fimc_md,
 300         &s5p_device_g2d,
 301         &s5p_device_jpeg,
 302 #ifdef CONFIG_DRM_EXYNOS
 303         &exynos_device_drm,
 304 #endif
 305         &exynos4_device_ac97,
 306         &exynos4_device_i2s0,
 307         &exynos4_device_ohci,
 308         &samsung_device_keypad,
 309         &s5p_device_mfc,
 310         &s5p_device_mfc_l,
 311         &s5p_device_mfc_r,
 312         &exynos4_device_spdif,
 313         &samsung_asoc_dma,
 314         &samsung_asoc_idma,
 315         &s5p_device_fimd0,
 316         &smdkv310_device_audio,
 317         &smdkv310_lcd_lte480wv,
 318         &smdkv310_smsc911x,
 319         &exynos4_device_ahci,
 320         &s5p_device_hdmi,
 321         &s5p_device_mixer,
 322 };
 323
 324 static void __init smdkv310_smsc911x_init(void)
 325 {
 326         u32 cs1;
 327
 328         /* configure nCS1 width to 16 bits */
 329         cs1 = __raw_readl(S5P_SROM_BW) &
 330                 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
 331         cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
 332                 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
 333                 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
 334                 S5P_SROM_BW__NCS1__SHIFT;
 335         __raw_writel(cs1, S5P_SROM_BW);
 336
 337         /* set timing for nCS1 suitable for ethernet chip */
 338         __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
 339                      (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
 340                      (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
 341                      (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
 342                      (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
 343                      (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
 344                      (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
 345 }
 346
 347 /* LCD Backlight data */
 348 static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
 349         .no = EXYNOS4_GPD0(1),
 350         .func = S3C_GPIO_SFN(2),
 351 };
 352
 353 static struct platform_pwm_backlight_data smdkv310_bl_data = {
 354         .pwm_id = 1,
 355         .pwm_period_ns  = 1000,
 356 };
 357
 358 /* I2C module and id for HDMIPHY */
 359 static struct i2c_board_info hdmiphy_info = {
 360         I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
 361 };
 362
 363 static void s5p_tv_setup(void)
 364 {
 365         /* direct HPD to HDMI chip */
 366         WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
 367         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
 368         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
 369 }
 370
 371 static void __init smdkv310_map_io(void)
 372 {
 373         exynos_init_io(NULL, 0);
 374         s3c24xx_init_clocks(clk_xusbxti.rate);
 375         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 376 }
 377
 378 static void __init smdkv310_reserve(void)
 379 {
 380         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
 381 }
 382
 383 static void __init smdkv310_machine_init(void)
 384 {
 385         s3c_i2c1_set_platdata(NULL);
 386         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 387
 388         smdkv310_smsc911x_init();
 389
 390         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 391         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 392         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 393         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 394
 395         s5p_tv_setup();
 396         s5p_i2c_hdmiphy_set_platdata(NULL);
 397         s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
 398
 399         samsung_keypad_set_platdata(&smdkv310_keypad_data);
 400
 401         samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
 402 #ifdef CONFIG_DRM_EXYNOS
 403         s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
 404         exynos4_fimd0_gpio_setup_24bpp();
 405 #else
 406         s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
 407 #endif
 408
 409         smdkv310_ehci_init();
 410         smdkv310_ohci_init();
 411         s3c_hsotg_set_platdata(&smdkv310_hsotg_pdata);
 412
 413         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 414 }
 415
 416 MACHINE_START(SMDKV310, "SMDKV310")
 417         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 418         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 419         .atag_offset    = 0x100,
 420         .init_irq       = exynos4_init_irq,
 421         .map_io         = smdkv310_map_io,
 422         .handle_irq     = gic_handle_irq,
 423         .init_machine   = smdkv310_machine_init,
 424         .timer          = &exynos4_timer,
 425         .reserve        = &smdkv310_reserve,
 426         .restart        = exynos4_restart,
 427 MACHINE_END
 428
 429 MACHINE_START(SMDKC210, "SMDKC210")
 430         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 431         .atag_offset    = 0x100,
 432         .init_irq       = exynos4_init_irq,
 433         .map_io         = smdkv310_map_io,
 434         .handle_irq     = gic_handle_irq,
 435         .init_machine   = smdkv310_machine_init,
 436         .init_late      = exynos_init_late,
 437         .timer          = &exynos4_timer,
 438         .reserve        = &smdkv310_reserve,
 439         .restart        = exynos4_restart,
 440 MACHINE_END