Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / arch / arm / mach-mxs / include / mach / uncompress.h
blobef28114954467007d2d6083a7b3540e5309ba490
1 /*
2 * arch/arm/mach-mxs/include/mach/uncompress.h
4 * Copyright (C) 1999 ARM Limited
5 * Copyright (C) Shane Nay (shane@minirl.com)
6 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 #ifndef __MACH_MXS_UNCOMPRESS_H__
19 #define __MACH_MXS_UNCOMPRESS_H__
21 unsigned long mxs_duart_base;
23 #define MXS_DUART(x) (*(volatile unsigned long *)(mxs_duart_base + (x)))
25 #define MXS_DUART_DR 0x00
26 #define MXS_DUART_FR 0x18
27 #define MXS_DUART_FR_TXFE (1 << 7)
28 #define MXS_DUART_CR 0x30
29 #define MXS_DUART_CR_UARTEN (1 << 0)
32 * The following code assumes the serial port has already been
33 * initialized by the bootloader. If it's not, the output is
34 * simply discarded.
37 static void putc(int ch)
39 if (!mxs_duart_base)
40 return;
41 if (!(MXS_DUART(MXS_DUART_CR) & MXS_DUART_CR_UARTEN))
42 return;
44 while (!(MXS_DUART(MXS_DUART_FR) & MXS_DUART_FR_TXFE))
45 barrier();
47 MXS_DUART(MXS_DUART_DR) = ch;
50 static inline void flush(void)
54 #define MX23_DUART_BASE_ADDR 0x80070000
55 #define MX28_DUART_BASE_ADDR 0x80074000
56 #define MXS_DIGCTL_CHIPID 0x8001c310
58 static inline void __arch_decomp_setup(unsigned long arch_id)
60 u16 chipid = (*(volatile unsigned long *) MXS_DIGCTL_CHIPID) >> 16;
62 switch (chipid) {
63 case 0x3780:
64 mxs_duart_base = MX23_DUART_BASE_ADDR;
65 break;
66 case 0x2800:
67 mxs_duart_base = MX28_DUART_BASE_ADDR;
68 break;
69 default:
70 break;
74 #define arch_decomp_setup() __arch_decomp_setup(arch_id)
75 #define arch_decomp_wdog()
77 #endif /* __MACH_MXS_UNCOMPRESS_H__ */