Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / arch / arm / mach-tegra / flowctrl.h
blob19428173855efdbca2cfa127e383d3c2c60da89b
1 /*
2 * arch/arm/mach-tegra/flowctrl.h
4 * functions and macros to control the flowcontroller
6 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #ifndef __MACH_TEGRA_FLOWCTRL_H
22 #define __MACH_TEGRA_FLOWCTRL_H
24 #define FLOW_CTRL_HALT_CPU0_EVENTS 0x0
25 #define FLOW_CTRL_WAITEVENT (2 << 29)
26 #define FLOW_CTRL_WAIT_FOR_INTERRUPT (4 << 29)
27 #define FLOW_CTRL_JTAG_RESUME (1 << 28)
28 #define FLOW_CTRL_HALT_CPU_IRQ (1 << 10)
29 #define FLOW_CTRL_HALT_CPU_FIQ (1 << 8)
30 #define FLOW_CTRL_CPU0_CSR 0x8
31 #define FLOW_CTRL_CSR_INTR_FLAG (1 << 15)
32 #define FLOW_CTRL_CSR_EVENT_FLAG (1 << 14)
33 #define FLOW_CTRL_CSR_ENABLE (1 << 0)
34 #define FLOW_CTRL_HALT_CPU1_EVENTS 0x14
35 #define FLOW_CTRL_CPU1_CSR 0x18
37 #ifndef __ASSEMBLY__
38 void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value);
39 void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value);
40 #endif
42 #endif