arch/m68k/platform/coldfire/m525x.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      525x.c
   5  *
   6  *      Copyright (C) 2012, Steven King <sfking@fdwdc.com>
   7  */
   8
   9 /***************************************************************************/
  10
  11 #include <linux/kernel.h>
  12 #include <linux/param.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/platform_device.h>
  16 #include <asm/machdep.h>
  17 #include <asm/coldfire.h>
  18 #include <asm/mcfsim.h>
  19
  20 /***************************************************************************/
  21
  22 static void __init m525x_qspi_init(void)
  23 {
  24 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
  25         /* set the GPIO function for the qspi cs gpios */
  26         /* FIXME: replace with pinmux/pinctl support */
  27         u32 f = readl(MCFSIM2_GPIOFUNC);
  28         f |= (1 << MCFQSPI_CS2) | (1 << MCFQSPI_CS1) | (1 << MCFQSPI_CS0);
  29         writel(f, MCFSIM2_GPIOFUNC);
  30
  31         /* QSPI irq setup */
  32         writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
  33                MCF_MBAR + MCFSIM_QSPIICR);
  34         mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
  35 #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
  36 }
  37
  38 static void __init m525x_i2c_init(void)
  39 {
  40 #if IS_ENABLED(CONFIG_I2C_COLDFIRE)
  41         u32 r;
  42
  43         /* first I2C controller uses regular irq setup */
  44         writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
  45                         MCF_MBAR + MCFSIM_I2CICR);
  46         mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
  47
  48         /* second I2C controller is completely different */
  49         r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));
  50         r &= ~MCFINTC2_INTPRI_BITS(0xf, MCF_IRQ_I2C1);
  51         r |= MCFINTC2_INTPRI_BITS(0x5, MCF_IRQ_I2C1);
  52         writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1));
  53 #endif /* IS_ENABLED(CONFIG_I2C_COLDFIRE) */
  54 }
  55
  56 /***************************************************************************/
  57
  58 void __init config_BSP(char *commandp, int size)
  59 {
  60         mach_sched_init = hw_timer_init;
  61
  62         m525x_qspi_init();
  63         m525x_i2c_init();
  64 }
  65
  66 /***************************************************************************/