2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright IBM Corp. 2007
16 * Copyright 2011 Freescale Semiconductor, Inc.
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
21 #include <linux/jiffies.h>
22 #include <linux/hrtimer.h>
23 #include <linux/types.h>
24 #include <linux/string.h>
25 #include <linux/kvm_host.h>
26 #include <linux/clockchips.h>
30 #include <asm/byteorder.h>
31 #include <asm/kvm_ppc.h>
32 #include <asm/disassemble.h>
39 #define OP_31_XOP_TRAP 4
40 #define OP_31_XOP_LWZX 23
41 #define OP_31_XOP_TRAP_64 68
42 #define OP_31_XOP_LBZX 87
43 #define OP_31_XOP_STWX 151
44 #define OP_31_XOP_STBX 215
45 #define OP_31_XOP_LBZUX 119
46 #define OP_31_XOP_STBUX 247
47 #define OP_31_XOP_LHZX 279
48 #define OP_31_XOP_LHZUX 311
49 #define OP_31_XOP_MFSPR 339
50 #define OP_31_XOP_LHAX 343
51 #define OP_31_XOP_STHX 407
52 #define OP_31_XOP_STHUX 439
53 #define OP_31_XOP_MTSPR 467
54 #define OP_31_XOP_DCBI 470
55 #define OP_31_XOP_LWBRX 534
56 #define OP_31_XOP_TLBSYNC 566
57 #define OP_31_XOP_STWBRX 662
58 #define OP_31_XOP_LHBRX 790
59 #define OP_31_XOP_STHBRX 918
78 void kvmppc_emulate_dec(struct kvm_vcpu
*vcpu
)
80 unsigned long dec_nsec
;
81 unsigned long long dec_time
;
83 pr_debug("mtDEC: %x\n", vcpu
->arch
.dec
);
84 hrtimer_try_to_cancel(&vcpu
->arch
.dec_timer
);
86 #ifdef CONFIG_PPC_BOOK3S
87 /* mtdec lowers the interrupt line when positive. */
88 kvmppc_core_dequeue_dec(vcpu
);
90 /* POWER4+ triggers a dec interrupt if the value is < 0 */
91 if (vcpu
->arch
.dec
& 0x80000000) {
92 kvmppc_core_queue_dec(vcpu
);
98 /* On BOOKE, DEC = 0 is as good as decrementer not enabled */
99 if (vcpu
->arch
.dec
== 0)
104 * The decrementer ticks at the same rate as the timebase, so
105 * that's how we convert the guest DEC value to the number of
109 dec_time
= vcpu
->arch
.dec
;
111 * Guest timebase ticks at the same frequency as host decrementer.
112 * So use the host decrementer calculations for decrementer emulation.
114 dec_time
= dec_time
<< decrementer_clockevent
.shift
;
115 do_div(dec_time
, decrementer_clockevent
.mult
);
116 dec_nsec
= do_div(dec_time
, NSEC_PER_SEC
);
117 hrtimer_start(&vcpu
->arch
.dec_timer
,
118 ktime_set(dec_time
, dec_nsec
), HRTIMER_MODE_REL
);
119 vcpu
->arch
.dec_jiffies
= get_tb();
122 u32
kvmppc_get_dec(struct kvm_vcpu
*vcpu
, u64 tb
)
124 u64 jd
= tb
- vcpu
->arch
.dec_jiffies
;
127 if (vcpu
->arch
.dec
< jd
)
131 return vcpu
->arch
.dec
- jd
;
146 * XXX is_bigendian should depend on MMU mapping or MSR[LE]
148 /* XXX Should probably auto-generate instruction decoding for a particular core
149 * from opcode tables in the future. */
150 int kvmppc_emulate_instruction(struct kvm_run
*run
, struct kvm_vcpu
*vcpu
)
152 u32 inst
= kvmppc_get_last_inst(vcpu
);
153 int ra
= get_ra(inst
);
154 int rs
= get_rs(inst
);
155 int rt
= get_rt(inst
);
156 int sprn
= get_sprn(inst
);
157 enum emulation_result emulated
= EMULATE_DONE
;
161 /* this default type might be overwritten by subcategories */
162 kvmppc_set_exit_type(vcpu
, EMULATED_INST_EXITS
);
164 pr_debug("Emulating opcode %d / %d\n", get_op(inst
), get_xop(inst
));
166 switch (get_op(inst
)) {
168 #ifdef CONFIG_PPC_BOOK3S
170 kvmppc_core_queue_program(vcpu
, SRR1_PROGTRAP
);
172 kvmppc_core_queue_program(vcpu
,
173 vcpu
->arch
.shared
->esr
| ESR_PTR
);
179 switch (get_xop(inst
)) {
183 case OP_31_XOP_TRAP_64
:
185 #ifdef CONFIG_PPC_BOOK3S
186 kvmppc_core_queue_program(vcpu
, SRR1_PROGTRAP
);
188 kvmppc_core_queue_program(vcpu
,
189 vcpu
->arch
.shared
->esr
| ESR_PTR
);
194 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 4, 1);
198 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 1, 1);
201 case OP_31_XOP_LBZUX
:
202 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 1, 1);
203 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
207 emulated
= kvmppc_handle_store(run
, vcpu
,
208 kvmppc_get_gpr(vcpu
, rs
),
213 emulated
= kvmppc_handle_store(run
, vcpu
,
214 kvmppc_get_gpr(vcpu
, rs
),
218 case OP_31_XOP_STBUX
:
219 emulated
= kvmppc_handle_store(run
, vcpu
,
220 kvmppc_get_gpr(vcpu
, rs
),
222 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
226 emulated
= kvmppc_handle_loads(run
, vcpu
, rt
, 2, 1);
230 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 2, 1);
233 case OP_31_XOP_LHZUX
:
234 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 2, 1);
235 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
238 case OP_31_XOP_MFSPR
:
241 spr_val
= vcpu
->arch
.shared
->srr0
;
244 spr_val
= vcpu
->arch
.shared
->srr1
;
247 spr_val
= vcpu
->arch
.pvr
;
250 spr_val
= vcpu
->vcpu_id
;
256 /* Note: mftb and TBRL/TBWL are user-accessible, so
257 * the guest can always access the real TB anyways.
258 * In fact, we probably will never see these traps. */
260 spr_val
= get_tb() >> 32;
267 spr_val
= vcpu
->arch
.shared
->sprg0
;
270 spr_val
= vcpu
->arch
.shared
->sprg1
;
273 spr_val
= vcpu
->arch
.shared
->sprg2
;
276 spr_val
= vcpu
->arch
.shared
->sprg3
;
278 /* Note: SPRG4-7 are user-readable, so we don't get
282 spr_val
= kvmppc_get_dec(vcpu
, get_tb());
285 emulated
= kvmppc_core_emulate_mfspr(vcpu
, sprn
,
287 if (unlikely(emulated
== EMULATE_FAIL
)) {
288 printk(KERN_INFO
"mfspr: unknown spr "
293 kvmppc_set_gpr(vcpu
, rt
, spr_val
);
294 kvmppc_set_exit_type(vcpu
, EMULATED_MFSPR_EXITS
);
298 emulated
= kvmppc_handle_store(run
, vcpu
,
299 kvmppc_get_gpr(vcpu
, rs
),
303 case OP_31_XOP_STHUX
:
304 emulated
= kvmppc_handle_store(run
, vcpu
,
305 kvmppc_get_gpr(vcpu
, rs
),
307 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
310 case OP_31_XOP_MTSPR
:
311 spr_val
= kvmppc_get_gpr(vcpu
, rs
);
314 vcpu
->arch
.shared
->srr0
= spr_val
;
317 vcpu
->arch
.shared
->srr1
= spr_val
;
320 /* XXX We need to context-switch the timebase for
321 * watchdog and FIT. */
322 case SPRN_TBWL
: break;
323 case SPRN_TBWU
: break;
325 case SPRN_MSSSR0
: break;
328 vcpu
->arch
.dec
= spr_val
;
329 kvmppc_emulate_dec(vcpu
);
333 vcpu
->arch
.shared
->sprg0
= spr_val
;
336 vcpu
->arch
.shared
->sprg1
= spr_val
;
339 vcpu
->arch
.shared
->sprg2
= spr_val
;
342 vcpu
->arch
.shared
->sprg3
= spr_val
;
346 emulated
= kvmppc_core_emulate_mtspr(vcpu
, sprn
,
348 if (emulated
== EMULATE_FAIL
)
349 printk(KERN_INFO
"mtspr: unknown spr "
353 kvmppc_set_exit_type(vcpu
, EMULATED_MTSPR_EXITS
);
357 /* Do nothing. The guest is performing dcbi because
358 * hardware DMA is not snooped by the dcache, but
359 * emulated DMA either goes through the dcache as
360 * normal writes, or the host kernel has handled dcache
364 case OP_31_XOP_LWBRX
:
365 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 4, 0);
368 case OP_31_XOP_TLBSYNC
:
371 case OP_31_XOP_STWBRX
:
372 emulated
= kvmppc_handle_store(run
, vcpu
,
373 kvmppc_get_gpr(vcpu
, rs
),
377 case OP_31_XOP_LHBRX
:
378 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 2, 0);
381 case OP_31_XOP_STHBRX
:
382 emulated
= kvmppc_handle_store(run
, vcpu
,
383 kvmppc_get_gpr(vcpu
, rs
),
388 /* Attempt core-specific emulation below. */
389 emulated
= EMULATE_FAIL
;
394 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 4, 1);
397 /* TBD: Add support for other 64 bit load variants like ldu, ldux, ldx etc. */
400 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 8, 1);
404 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 4, 1);
405 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
409 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 1, 1);
413 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 1, 1);
414 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
418 emulated
= kvmppc_handle_store(run
, vcpu
,
419 kvmppc_get_gpr(vcpu
, rs
),
423 /* TBD: Add support for other 64 bit store variants like stdu, stdux, stdx etc. */
426 emulated
= kvmppc_handle_store(run
, vcpu
,
427 kvmppc_get_gpr(vcpu
, rs
),
432 emulated
= kvmppc_handle_store(run
, vcpu
,
433 kvmppc_get_gpr(vcpu
, rs
),
435 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
439 emulated
= kvmppc_handle_store(run
, vcpu
,
440 kvmppc_get_gpr(vcpu
, rs
),
445 emulated
= kvmppc_handle_store(run
, vcpu
,
446 kvmppc_get_gpr(vcpu
, rs
),
448 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
452 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 2, 1);
456 emulated
= kvmppc_handle_load(run
, vcpu
, rt
, 2, 1);
457 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
461 emulated
= kvmppc_handle_loads(run
, vcpu
, rt
, 2, 1);
465 emulated
= kvmppc_handle_loads(run
, vcpu
, rt
, 2, 1);
466 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
470 emulated
= kvmppc_handle_store(run
, vcpu
,
471 kvmppc_get_gpr(vcpu
, rs
),
476 emulated
= kvmppc_handle_store(run
, vcpu
,
477 kvmppc_get_gpr(vcpu
, rs
),
479 kvmppc_set_gpr(vcpu
, ra
, vcpu
->arch
.vaddr_accessed
);
483 emulated
= EMULATE_FAIL
;
486 if (emulated
== EMULATE_FAIL
) {
487 emulated
= kvmppc_core_emulate_op(run
, vcpu
, inst
, &advance
);
488 if (emulated
== EMULATE_AGAIN
) {
490 } else if (emulated
== EMULATE_FAIL
) {
492 printk(KERN_ERR
"Couldn't emulate instruction 0x%08x "
493 "(op %d xop %d)\n", inst
, get_op(inst
), get_xop(inst
));
494 kvmppc_core_queue_program(vcpu
, 0);
498 trace_kvm_ppc_instr(inst
, kvmppc_get_pc(vcpu
), emulated
);
500 /* Advance past emulated instruction. */
502 kvmppc_set_pc(vcpu
, kvmppc_get_pc(vcpu
) + 4);