arch/powerpc/platforms/85xx/mpc85xx_rdb.c

   1 /*
   2  * MPC85xx RDB Board Setup
   3  *
   4  * Copyright 2009,2012 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/pci.h>
  15 #include <linux/kdev_t.h>
  16 #include <linux/delay.h>
  17 #include <linux/seq_file.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/of_platform.h>
  20
  21 #include <asm/time.h>
  22 #include <asm/machdep.h>
  23 #include <asm/pci-bridge.h>
  24 #include <mm/mmu_decl.h>
  25 #include <asm/prom.h>
  26 #include <asm/udbg.h>
  27 #include <asm/mpic.h>
  28 #include <asm/qe.h>
  29 #include <asm/qe_ic.h>
  30 #include <asm/fsl_guts.h>
  31
  32 #include <sysdev/fsl_soc.h>
  33 #include <sysdev/fsl_pci.h>
  34 #include "smp.h"
  35
  36 #include "mpc85xx.h"
  37
  38 #undef DEBUG
  39
  40 #ifdef DEBUG
  41 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  42 #else
  43 #define DBG(fmt, args...)
  44 #endif
  45
  46
  47 void __init mpc85xx_rdb_pic_init(void)
  48 {
  49         struct mpic *mpic;
  50         unsigned long root = of_get_flat_dt_root();
  51
  52 #ifdef CONFIG_QUICC_ENGINE
  53         struct device_node *np;
  54 #endif
  55
  56         if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
  57                 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
  58                         MPIC_BIG_ENDIAN |
  59                         MPIC_SINGLE_DEST_CPU,
  60                         0, 256, " OpenPIC  ");
  61         } else {
  62                 mpic = mpic_alloc(NULL, 0,
  63                   MPIC_BIG_ENDIAN |
  64                   MPIC_SINGLE_DEST_CPU,
  65                   0, 256, " OpenPIC  ");
  66         }
  67
  68         BUG_ON(mpic == NULL);
  69         mpic_init(mpic);
  70
  71 #ifdef CONFIG_QUICC_ENGINE
  72         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
  73         if (np) {
  74                 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
  75                                 qe_ic_cascade_high_mpic);
  76                 of_node_put(np);
  77
  78         } else
  79                 pr_err("%s: Could not find qe-ic node\n", __func__);
  80 #endif
  81
  82 }
  83
  84 /*
  85  * Setup the architecture
  86  */
  87 static void __init mpc85xx_rdb_setup_arch(void)
  88 {
  89 #if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
  90         struct device_node *np;
  91 #endif
  92
  93         if (ppc_md.progress)
  94                 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
  95
  96 #ifdef CONFIG_PCI
  97         for_each_node_by_type(np, "pci") {
  98                 if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
  99                         fsl_add_bridge(np, 0);
 100         }
 101
 102 #endif
 103
 104         mpc85xx_smp_init();
 105
 106 #ifdef CONFIG_QUICC_ENGINE
 107         np = of_find_compatible_node(NULL, NULL, "fsl,qe");
 108         if (!np) {
 109                 pr_err("%s: Could not find Quicc Engine node\n", __func__);
 110                 goto qe_fail;
 111         }
 112
 113         qe_reset();
 114         of_node_put(np);
 115
 116         np = of_find_node_by_name(NULL, "par_io");
 117         if (np) {
 118                 struct device_node *ucc;
 119
 120                 par_io_init(np);
 121                 of_node_put(np);
 122
 123                 for_each_node_by_name(ucc, "ucc")
 124                         par_io_of_config(ucc);
 125
 126         }
 127 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
 128         if (machine_is(p1025_rdb)) {
 129
 130                 struct ccsr_guts __iomem *guts;
 131
 132                 np = of_find_node_by_name(NULL, "global-utilities");
 133                 if (np) {
 134                         guts = of_iomap(np, 0);
 135                         if (!guts) {
 136
 137                                 pr_err("mpc85xx-rdb: could not map global utilities register\n");
 138
 139                         } else {
 140                         /* P1025 has pins muxed for QE and other functions. To
 141                         * enable QE UEC mode, we need to set bit QE0 for UCC1
 142                         * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
 143                         * and QE12 for QE MII management singals in PMUXCR
 144                         * register.
 145                         */
 146                                 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
 147                                                 MPC85xx_PMUXCR_QE(3) |
 148                                                 MPC85xx_PMUXCR_QE(9) |
 149                                                 MPC85xx_PMUXCR_QE(12));
 150                                 iounmap(guts);
 151                         }
 152                         of_node_put(np);
 153                 }
 154
 155         }
 156 #endif
 157
 158 qe_fail:
 159 #endif  /* CONFIG_QUICC_ENGINE */
 160
 161         printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 162 }
 163
 164 machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
 165 machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
 166 machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
 167 machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
 168 machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 169 machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 170 machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 171 machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
 172 machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 173
 174 /*
 175  * Called very early, device-tree isn't unflattened
 176  */
 177 static int __init p2020_rdb_probe(void)
 178 {
 179         unsigned long root = of_get_flat_dt_root();
 180
 181         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB"))
 182                 return 1;
 183         return 0;
 184 }
 185
 186 static int __init p1020_rdb_probe(void)
 187 {
 188         unsigned long root = of_get_flat_dt_root();
 189
 190         if (of_flat_dt_is_compatible(root, "fsl,P1020RDB"))
 191                 return 1;
 192         return 0;
 193 }
 194
 195 static int __init p1020_rdb_pc_probe(void)
 196 {
 197         unsigned long root = of_get_flat_dt_root();
 198
 199         return of_flat_dt_is_compatible(root, "fsl,P1020RDB-PC");
 200 }
 201
 202 static int __init p1021_rdb_pc_probe(void)
 203 {
 204         unsigned long root = of_get_flat_dt_root();
 205
 206         if (of_flat_dt_is_compatible(root, "fsl,P1021RDB-PC"))
 207                 return 1;
 208         return 0;
 209 }
 210
 211 static int __init p2020_rdb_pc_probe(void)
 212 {
 213         unsigned long root = of_get_flat_dt_root();
 214
 215         if (of_flat_dt_is_compatible(root, "fsl,P2020RDB-PC"))
 216                 return 1;
 217         return 0;
 218 }
 219
 220 static int __init p1025_rdb_probe(void)
 221 {
 222         unsigned long root = of_get_flat_dt_root();
 223
 224         return of_flat_dt_is_compatible(root, "fsl,P1025RDB");
 225 }
 226
 227 static int __init p1020_mbg_pc_probe(void)
 228 {
 229         unsigned long root = of_get_flat_dt_root();
 230
 231         return of_flat_dt_is_compatible(root, "fsl,P1020MBG-PC");
 232 }
 233
 234 static int __init p1020_utm_pc_probe(void)
 235 {
 236         unsigned long root = of_get_flat_dt_root();
 237
 238         return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
 239 }
 240
 241 static int __init p1024_rdb_probe(void)
 242 {
 243         unsigned long root = of_get_flat_dt_root();
 244
 245         return of_flat_dt_is_compatible(root, "fsl,P1024RDB");
 246 }
 247
 248 define_machine(p2020_rdb) {
 249         .name                   = "P2020 RDB",
 250         .probe                  = p2020_rdb_probe,
 251         .setup_arch             = mpc85xx_rdb_setup_arch,
 252         .init_IRQ               = mpc85xx_rdb_pic_init,
 253 #ifdef CONFIG_PCI
 254         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 255 #endif
 256         .get_irq                = mpic_get_irq,
 257         .restart                = fsl_rstcr_restart,
 258         .calibrate_decr         = generic_calibrate_decr,
 259         .progress               = udbg_progress,
 260 };
 261
 262 define_machine(p1020_rdb) {
 263         .name                   = "P1020 RDB",
 264         .probe                  = p1020_rdb_probe,
 265         .setup_arch             = mpc85xx_rdb_setup_arch,
 266         .init_IRQ               = mpc85xx_rdb_pic_init,
 267 #ifdef CONFIG_PCI
 268         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 269 #endif
 270         .get_irq                = mpic_get_irq,
 271         .restart                = fsl_rstcr_restart,
 272         .calibrate_decr         = generic_calibrate_decr,
 273         .progress               = udbg_progress,
 274 };
 275
 276 define_machine(p1021_rdb_pc) {
 277         .name                   = "P1021 RDB-PC",
 278         .probe                  = p1021_rdb_pc_probe,
 279         .setup_arch             = mpc85xx_rdb_setup_arch,
 280         .init_IRQ               = mpc85xx_rdb_pic_init,
 281 #ifdef CONFIG_PCI
 282         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 283 #endif
 284         .get_irq                = mpic_get_irq,
 285         .restart                = fsl_rstcr_restart,
 286         .calibrate_decr         = generic_calibrate_decr,
 287         .progress               = udbg_progress,
 288 };
 289
 290 define_machine(p2020_rdb_pc) {
 291         .name                   = "P2020RDB-PC",
 292         .probe                  = p2020_rdb_pc_probe,
 293         .setup_arch             = mpc85xx_rdb_setup_arch,
 294         .init_IRQ               = mpc85xx_rdb_pic_init,
 295 #ifdef CONFIG_PCI
 296         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 297 #endif
 298         .get_irq                = mpic_get_irq,
 299         .restart                = fsl_rstcr_restart,
 300         .calibrate_decr         = generic_calibrate_decr,
 301         .progress               = udbg_progress,
 302 };
 303
 304 define_machine(p1025_rdb) {
 305         .name                   = "P1025 RDB",
 306         .probe                  = p1025_rdb_probe,
 307         .setup_arch             = mpc85xx_rdb_setup_arch,
 308         .init_IRQ               = mpc85xx_rdb_pic_init,
 309 #ifdef CONFIG_PCI
 310         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 311 #endif
 312         .get_irq                = mpic_get_irq,
 313         .restart                = fsl_rstcr_restart,
 314         .calibrate_decr         = generic_calibrate_decr,
 315         .progress               = udbg_progress,
 316 };
 317
 318 define_machine(p1020_mbg_pc) {
 319         .name                   = "P1020 MBG-PC",
 320         .probe                  = p1020_mbg_pc_probe,
 321         .setup_arch             = mpc85xx_rdb_setup_arch,
 322         .init_IRQ               = mpc85xx_rdb_pic_init,
 323 #ifdef CONFIG_PCI
 324         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 325 #endif
 326         .get_irq                = mpic_get_irq,
 327         .restart                = fsl_rstcr_restart,
 328         .calibrate_decr         = generic_calibrate_decr,
 329         .progress               = udbg_progress,
 330 };
 331
 332 define_machine(p1020_utm_pc) {
 333         .name                   = "P1020 UTM-PC",
 334         .probe                  = p1020_utm_pc_probe,
 335         .setup_arch             = mpc85xx_rdb_setup_arch,
 336         .init_IRQ               = mpc85xx_rdb_pic_init,
 337 #ifdef CONFIG_PCI
 338         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 339 #endif
 340         .get_irq                = mpic_get_irq,
 341         .restart                = fsl_rstcr_restart,
 342         .calibrate_decr         = generic_calibrate_decr,
 343         .progress               = udbg_progress,
 344 };
 345
 346 define_machine(p1020_rdb_pc) {
 347         .name                   = "P1020RDB-PC",
 348         .probe                  = p1020_rdb_pc_probe,
 349         .setup_arch             = mpc85xx_rdb_setup_arch,
 350         .init_IRQ               = mpc85xx_rdb_pic_init,
 351 #ifdef CONFIG_PCI
 352         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 353 #endif
 354         .get_irq                = mpic_get_irq,
 355         .restart                = fsl_rstcr_restart,
 356         .calibrate_decr         = generic_calibrate_decr,
 357         .progress               = udbg_progress,
 358 };
 359
 360 define_machine(p1024_rdb) {
 361         .name                   = "P1024 RDB",
 362         .probe                  = p1024_rdb_probe,
 363         .setup_arch             = mpc85xx_rdb_setup_arch,
 364         .init_IRQ               = mpc85xx_rdb_pic_init,
 365 #ifdef CONFIG_PCI
 366         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
 367 #endif
 368         .get_irq                = mpic_get_irq,
 369         .restart                = fsl_rstcr_restart,
 370         .calibrate_decr         = generic_calibrate_decr,
 371         .progress               = udbg_progress,
 372 };