arch/s390/include/asm/barrier.h

   1 /*
   2  * Copyright IBM Corp. 1999, 2009
   3  *
   4  * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
   5  */
   6
   7 #ifndef __ASM_BARRIER_H
   8 #define __ASM_BARRIER_H
   9
  10 /*
  11  * Force strict CPU ordering.
  12  * And yes, this is required on UP too when we're talking
  13  * to devices.
  14  */
  15
  16 static inline void mb(void)
  17 {
  18 #ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
  19         /* Fast-BCR without checkpoint synchronization */
  20         asm volatile("bcr 14,0" : : : "memory");
  21 #else
  22         asm volatile("bcr 15,0" : : : "memory");
  23 #endif
  24 }
  25
  26 #define rmb()                           mb()
  27 #define wmb()                           mb()
  28 #define read_barrier_depends()          do { } while(0)
  29 #define smp_mb()                        mb()
  30 #define smp_rmb()                       rmb()
  31 #define smp_wmb()                       wmb()
  32 #define smp_read_barrier_depends()      read_barrier_depends()
  33 #define smp_mb__before_clear_bit()      smp_mb()
  34 #define smp_mb__after_clear_bit()       smp_mb()
  35
  36 #define set_mb(var, value)              do { var = value; mb(); } while (0)
  37
  38 #endif /* __ASM_BARRIER_H */