Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / arch / s390 / include / asm / ptrace.h
blobd5f08ea566ed9ac9d03085f8c6ea5cfe378befd5
1 /*
2 * S390 version
3 * Copyright IBM Corp. 1999, 2000
4 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
5 */
7 #ifndef _S390_PTRACE_H
8 #define _S390_PTRACE_H
11 * Offsets in the user_regs_struct. They are used for the ptrace
12 * system call and in entry.S
14 #ifndef __s390x__
16 #define PT_PSWMASK 0x00
17 #define PT_PSWADDR 0x04
18 #define PT_GPR0 0x08
19 #define PT_GPR1 0x0C
20 #define PT_GPR2 0x10
21 #define PT_GPR3 0x14
22 #define PT_GPR4 0x18
23 #define PT_GPR5 0x1C
24 #define PT_GPR6 0x20
25 #define PT_GPR7 0x24
26 #define PT_GPR8 0x28
27 #define PT_GPR9 0x2C
28 #define PT_GPR10 0x30
29 #define PT_GPR11 0x34
30 #define PT_GPR12 0x38
31 #define PT_GPR13 0x3C
32 #define PT_GPR14 0x40
33 #define PT_GPR15 0x44
34 #define PT_ACR0 0x48
35 #define PT_ACR1 0x4C
36 #define PT_ACR2 0x50
37 #define PT_ACR3 0x54
38 #define PT_ACR4 0x58
39 #define PT_ACR5 0x5C
40 #define PT_ACR6 0x60
41 #define PT_ACR7 0x64
42 #define PT_ACR8 0x68
43 #define PT_ACR9 0x6C
44 #define PT_ACR10 0x70
45 #define PT_ACR11 0x74
46 #define PT_ACR12 0x78
47 #define PT_ACR13 0x7C
48 #define PT_ACR14 0x80
49 #define PT_ACR15 0x84
50 #define PT_ORIGGPR2 0x88
51 #define PT_FPC 0x90
53 * A nasty fact of life that the ptrace api
54 * only supports passing of longs.
56 #define PT_FPR0_HI 0x98
57 #define PT_FPR0_LO 0x9C
58 #define PT_FPR1_HI 0xA0
59 #define PT_FPR1_LO 0xA4
60 #define PT_FPR2_HI 0xA8
61 #define PT_FPR2_LO 0xAC
62 #define PT_FPR3_HI 0xB0
63 #define PT_FPR3_LO 0xB4
64 #define PT_FPR4_HI 0xB8
65 #define PT_FPR4_LO 0xBC
66 #define PT_FPR5_HI 0xC0
67 #define PT_FPR5_LO 0xC4
68 #define PT_FPR6_HI 0xC8
69 #define PT_FPR6_LO 0xCC
70 #define PT_FPR7_HI 0xD0
71 #define PT_FPR7_LO 0xD4
72 #define PT_FPR8_HI 0xD8
73 #define PT_FPR8_LO 0XDC
74 #define PT_FPR9_HI 0xE0
75 #define PT_FPR9_LO 0xE4
76 #define PT_FPR10_HI 0xE8
77 #define PT_FPR10_LO 0xEC
78 #define PT_FPR11_HI 0xF0
79 #define PT_FPR11_LO 0xF4
80 #define PT_FPR12_HI 0xF8
81 #define PT_FPR12_LO 0xFC
82 #define PT_FPR13_HI 0x100
83 #define PT_FPR13_LO 0x104
84 #define PT_FPR14_HI 0x108
85 #define PT_FPR14_LO 0x10C
86 #define PT_FPR15_HI 0x110
87 #define PT_FPR15_LO 0x114
88 #define PT_CR_9 0x118
89 #define PT_CR_10 0x11C
90 #define PT_CR_11 0x120
91 #define PT_IEEE_IP 0x13C
92 #define PT_LASTOFF PT_IEEE_IP
93 #define PT_ENDREGS 0x140-1
95 #define GPR_SIZE 4
96 #define CR_SIZE 4
98 #define STACK_FRAME_OVERHEAD 96 /* size of minimum stack frame */
100 #else /* __s390x__ */
102 #define PT_PSWMASK 0x00
103 #define PT_PSWADDR 0x08
104 #define PT_GPR0 0x10
105 #define PT_GPR1 0x18
106 #define PT_GPR2 0x20
107 #define PT_GPR3 0x28
108 #define PT_GPR4 0x30
109 #define PT_GPR5 0x38
110 #define PT_GPR6 0x40
111 #define PT_GPR7 0x48
112 #define PT_GPR8 0x50
113 #define PT_GPR9 0x58
114 #define PT_GPR10 0x60
115 #define PT_GPR11 0x68
116 #define PT_GPR12 0x70
117 #define PT_GPR13 0x78
118 #define PT_GPR14 0x80
119 #define PT_GPR15 0x88
120 #define PT_ACR0 0x90
121 #define PT_ACR1 0x94
122 #define PT_ACR2 0x98
123 #define PT_ACR3 0x9C
124 #define PT_ACR4 0xA0
125 #define PT_ACR5 0xA4
126 #define PT_ACR6 0xA8
127 #define PT_ACR7 0xAC
128 #define PT_ACR8 0xB0
129 #define PT_ACR9 0xB4
130 #define PT_ACR10 0xB8
131 #define PT_ACR11 0xBC
132 #define PT_ACR12 0xC0
133 #define PT_ACR13 0xC4
134 #define PT_ACR14 0xC8
135 #define PT_ACR15 0xCC
136 #define PT_ORIGGPR2 0xD0
137 #define PT_FPC 0xD8
138 #define PT_FPR0 0xE0
139 #define PT_FPR1 0xE8
140 #define PT_FPR2 0xF0
141 #define PT_FPR3 0xF8
142 #define PT_FPR4 0x100
143 #define PT_FPR5 0x108
144 #define PT_FPR6 0x110
145 #define PT_FPR7 0x118
146 #define PT_FPR8 0x120
147 #define PT_FPR9 0x128
148 #define PT_FPR10 0x130
149 #define PT_FPR11 0x138
150 #define PT_FPR12 0x140
151 #define PT_FPR13 0x148
152 #define PT_FPR14 0x150
153 #define PT_FPR15 0x158
154 #define PT_CR_9 0x160
155 #define PT_CR_10 0x168
156 #define PT_CR_11 0x170
157 #define PT_IEEE_IP 0x1A8
158 #define PT_LASTOFF PT_IEEE_IP
159 #define PT_ENDREGS 0x1B0-1
161 #define GPR_SIZE 8
162 #define CR_SIZE 8
164 #define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */
166 #endif /* __s390x__ */
168 #define NUM_GPRS 16
169 #define NUM_FPRS 16
170 #define NUM_CRS 16
171 #define NUM_ACRS 16
173 #define NUM_CR_WORDS 3
175 #define FPR_SIZE 8
176 #define FPC_SIZE 4
177 #define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */
178 #define ACR_SIZE 4
181 #define PTRACE_OLDSETOPTIONS 21
183 #ifndef __ASSEMBLY__
184 #include <linux/stddef.h>
185 #include <linux/types.h>
187 typedef union
189 float f;
190 double d;
191 __u64 ui;
192 struct
194 __u32 hi;
195 __u32 lo;
196 } fp;
197 } freg_t;
199 typedef struct
201 __u32 fpc;
202 freg_t fprs[NUM_FPRS];
203 } s390_fp_regs;
205 #define FPC_EXCEPTION_MASK 0xF8000000
206 #define FPC_FLAGS_MASK 0x00F80000
207 #define FPC_DXC_MASK 0x0000FF00
208 #define FPC_RM_MASK 0x00000003
209 #define FPC_VALID_MASK 0xF8F8FF03
211 /* this typedef defines how a Program Status Word looks like */
212 typedef struct
214 unsigned long mask;
215 unsigned long addr;
216 } __attribute__ ((aligned(8))) psw_t;
218 typedef struct
220 __u32 mask;
221 __u32 addr;
222 } __attribute__ ((aligned(8))) psw_compat_t;
224 #ifndef __s390x__
226 #define PSW_MASK_PER 0x40000000UL
227 #define PSW_MASK_DAT 0x04000000UL
228 #define PSW_MASK_IO 0x02000000UL
229 #define PSW_MASK_EXT 0x01000000UL
230 #define PSW_MASK_KEY 0x00F00000UL
231 #define PSW_MASK_BASE 0x00080000UL /* always one */
232 #define PSW_MASK_MCHECK 0x00040000UL
233 #define PSW_MASK_WAIT 0x00020000UL
234 #define PSW_MASK_PSTATE 0x00010000UL
235 #define PSW_MASK_ASC 0x0000C000UL
236 #define PSW_MASK_CC 0x00003000UL
237 #define PSW_MASK_PM 0x00000F00UL
238 #define PSW_MASK_EA 0x00000000UL
239 #define PSW_MASK_BA 0x00000000UL
241 #define PSW_MASK_USER 0x00003F00UL
243 #define PSW_ADDR_AMODE 0x80000000UL
244 #define PSW_ADDR_INSN 0x7FFFFFFFUL
246 #define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 20)
248 #define PSW_ASC_PRIMARY 0x00000000UL
249 #define PSW_ASC_ACCREG 0x00004000UL
250 #define PSW_ASC_SECONDARY 0x00008000UL
251 #define PSW_ASC_HOME 0x0000C000UL
253 #else /* __s390x__ */
255 #define PSW_MASK_PER 0x4000000000000000UL
256 #define PSW_MASK_DAT 0x0400000000000000UL
257 #define PSW_MASK_IO 0x0200000000000000UL
258 #define PSW_MASK_EXT 0x0100000000000000UL
259 #define PSW_MASK_BASE 0x0000000000000000UL
260 #define PSW_MASK_KEY 0x00F0000000000000UL
261 #define PSW_MASK_MCHECK 0x0004000000000000UL
262 #define PSW_MASK_WAIT 0x0002000000000000UL
263 #define PSW_MASK_PSTATE 0x0001000000000000UL
264 #define PSW_MASK_ASC 0x0000C00000000000UL
265 #define PSW_MASK_CC 0x0000300000000000UL
266 #define PSW_MASK_PM 0x00000F0000000000UL
267 #define PSW_MASK_EA 0x0000000100000000UL
268 #define PSW_MASK_BA 0x0000000080000000UL
270 #define PSW_MASK_USER 0x00003F0180000000UL
272 #define PSW_ADDR_AMODE 0x0000000000000000UL
273 #define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL
275 #define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 52)
277 #define PSW_ASC_PRIMARY 0x0000000000000000UL
278 #define PSW_ASC_ACCREG 0x0000400000000000UL
279 #define PSW_ASC_SECONDARY 0x0000800000000000UL
280 #define PSW_ASC_HOME 0x0000C00000000000UL
282 #endif /* __s390x__ */
284 #ifdef __KERNEL__
285 extern long psw_kernel_bits;
286 extern long psw_user_bits;
287 #endif
290 * The s390_regs structure is used to define the elf_gregset_t.
292 typedef struct
294 psw_t psw;
295 unsigned long gprs[NUM_GPRS];
296 unsigned int acrs[NUM_ACRS];
297 unsigned long orig_gpr2;
298 } s390_regs;
300 typedef struct
302 psw_compat_t psw;
303 __u32 gprs[NUM_GPRS];
304 __u32 acrs[NUM_ACRS];
305 __u32 orig_gpr2;
306 } s390_compat_regs;
308 typedef struct
310 __u32 gprs_high[NUM_GPRS];
311 } s390_compat_regs_high;
313 #ifdef __KERNEL__
316 * The pt_regs struct defines the way the registers are stored on
317 * the stack during a system call.
319 struct pt_regs
321 unsigned long args[1];
322 psw_t psw;
323 unsigned long gprs[NUM_GPRS];
324 unsigned long orig_gpr2;
325 unsigned int int_code;
326 unsigned long int_parm_long;
330 * Program event recording (PER) register set.
332 struct per_regs {
333 unsigned long control; /* PER control bits */
334 unsigned long start; /* PER starting address */
335 unsigned long end; /* PER ending address */
339 * PER event contains information about the cause of the last PER exception.
341 struct per_event {
342 unsigned short cause; /* PER code, ATMID and AI */
343 unsigned long address; /* PER address */
344 unsigned char paid; /* PER access identification */
348 * Simplified per_info structure used to decode the ptrace user space ABI.
350 struct per_struct_kernel {
351 unsigned long cr9; /* PER control bits */
352 unsigned long cr10; /* PER starting address */
353 unsigned long cr11; /* PER ending address */
354 unsigned long bits; /* Obsolete software bits */
355 unsigned long starting_addr; /* User specified start address */
356 unsigned long ending_addr; /* User specified end address */
357 unsigned short perc_atmid; /* PER trap ATMID */
358 unsigned long address; /* PER trap instruction address */
359 unsigned char access_id; /* PER trap access identification */
362 #define PER_EVENT_MASK 0xE9000000UL
364 #define PER_EVENT_BRANCH 0x80000000UL
365 #define PER_EVENT_IFETCH 0x40000000UL
366 #define PER_EVENT_STORE 0x20000000UL
367 #define PER_EVENT_STORE_REAL 0x08000000UL
368 #define PER_EVENT_NULLIFICATION 0x01000000UL
370 #define PER_CONTROL_MASK 0x00a00000UL
372 #define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
373 #define PER_CONTROL_ALTERATION 0x00200000UL
375 #endif
378 * Now for the user space program event recording (trace) definitions.
379 * The following structures are used only for the ptrace interface, don't
380 * touch or even look at it if you don't want to modify the user-space
381 * ptrace interface. In particular stay away from it for in-kernel PER.
383 typedef struct
385 unsigned long cr[NUM_CR_WORDS];
386 } per_cr_words;
388 #define PER_EM_MASK 0xE8000000UL
390 typedef struct
392 #ifdef __s390x__
393 unsigned : 32;
394 #endif /* __s390x__ */
395 unsigned em_branching : 1;
396 unsigned em_instruction_fetch : 1;
398 * Switching on storage alteration automatically fixes
399 * the storage alteration event bit in the users std.
401 unsigned em_storage_alteration : 1;
402 unsigned em_gpr_alt_unused : 1;
403 unsigned em_store_real_address : 1;
404 unsigned : 3;
405 unsigned branch_addr_ctl : 1;
406 unsigned : 1;
407 unsigned storage_alt_space_ctl : 1;
408 unsigned : 21;
409 unsigned long starting_addr;
410 unsigned long ending_addr;
411 } per_cr_bits;
413 typedef struct
415 unsigned short perc_atmid;
416 unsigned long address;
417 unsigned char access_id;
418 } per_lowcore_words;
420 typedef struct
422 unsigned perc_branching : 1;
423 unsigned perc_instruction_fetch : 1;
424 unsigned perc_storage_alteration : 1;
425 unsigned perc_gpr_alt_unused : 1;
426 unsigned perc_store_real_address : 1;
427 unsigned : 3;
428 unsigned atmid_psw_bit_31 : 1;
429 unsigned atmid_validity_bit : 1;
430 unsigned atmid_psw_bit_32 : 1;
431 unsigned atmid_psw_bit_5 : 1;
432 unsigned atmid_psw_bit_16 : 1;
433 unsigned atmid_psw_bit_17 : 1;
434 unsigned si : 2;
435 unsigned long address;
436 unsigned : 4;
437 unsigned access_id : 4;
438 } per_lowcore_bits;
440 typedef struct
442 union {
443 per_cr_words words;
444 per_cr_bits bits;
445 } control_regs;
447 * Use these flags instead of setting em_instruction_fetch
448 * directly they are used so that single stepping can be
449 * switched on & off while not affecting other tracing
451 unsigned single_step : 1;
452 unsigned instruction_fetch : 1;
453 unsigned : 30;
455 * These addresses are copied into cr10 & cr11 if single
456 * stepping is switched off
458 unsigned long starting_addr;
459 unsigned long ending_addr;
460 union {
461 per_lowcore_words words;
462 per_lowcore_bits bits;
463 } lowcore;
464 } per_struct;
466 typedef struct
468 unsigned int len;
469 unsigned long kernel_addr;
470 unsigned long process_addr;
471 } ptrace_area;
474 * S/390 specific non posix ptrace requests. I chose unusual values so
475 * they are unlikely to clash with future ptrace definitions.
477 #define PTRACE_PEEKUSR_AREA 0x5000
478 #define PTRACE_POKEUSR_AREA 0x5001
479 #define PTRACE_PEEKTEXT_AREA 0x5002
480 #define PTRACE_PEEKDATA_AREA 0x5003
481 #define PTRACE_POKETEXT_AREA 0x5004
482 #define PTRACE_POKEDATA_AREA 0x5005
483 #define PTRACE_GET_LAST_BREAK 0x5006
484 #define PTRACE_PEEK_SYSTEM_CALL 0x5007
485 #define PTRACE_POKE_SYSTEM_CALL 0x5008
488 * PT_PROT definition is loosely based on hppa bsd definition in
489 * gdb/hppab-nat.c
491 #define PTRACE_PROT 21
493 typedef enum
495 ptprot_set_access_watchpoint,
496 ptprot_set_write_watchpoint,
497 ptprot_disable_watchpoint
498 } ptprot_flags;
500 typedef struct
502 unsigned long lowaddr;
503 unsigned long hiaddr;
504 ptprot_flags prot;
505 } ptprot_area;
507 /* Sequence of bytes for breakpoint illegal instruction. */
508 #define S390_BREAKPOINT {0x0,0x1}
509 #define S390_BREAKPOINT_U16 ((__u16)0x0001)
510 #define S390_SYSCALL_OPCODE ((__u16)0x0a00)
511 #define S390_SYSCALL_SIZE 2
514 * The user_regs_struct defines the way the user registers are
515 * store on the stack for signal handling.
517 struct user_regs_struct
519 psw_t psw;
520 unsigned long gprs[NUM_GPRS];
521 unsigned int acrs[NUM_ACRS];
522 unsigned long orig_gpr2;
523 s390_fp_regs fp_regs;
525 * These per registers are in here so that gdb can modify them
526 * itself as there is no "official" ptrace interface for hardware
527 * watchpoints. This is the way intel does it.
529 per_struct per_info;
530 unsigned long ieee_instruction_pointer; /* obsolete, always 0 */
533 #ifdef __KERNEL__
535 * These are defined as per linux/ptrace.h, which see.
537 #define arch_has_single_step() (1)
539 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
540 #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
541 #define user_stack_pointer(regs)((regs)->gprs[15])
542 #define profile_pc(regs) instruction_pointer(regs)
544 static inline long regs_return_value(struct pt_regs *regs)
546 return regs->gprs[2];
549 int regs_query_register_offset(const char *name);
550 const char *regs_query_register_name(unsigned int offset);
551 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
552 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
554 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
556 return regs->gprs[15] & PSW_ADDR_INSN;
559 #endif /* __KERNEL__ */
560 #endif /* __ASSEMBLY__ */
562 #endif /* _S390_PTRACE_H */