Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / char / hw_random / omap-rng.c
blob4fbdceb6f773d7e45189a22347668c34a0b52c63
1 /*
2 * omap-rng.c - RNG driver for TI OMAP CPU family
4 * Author: Deepak Saxena <dsaxena@plexity.net>
6 * Copyright 2005 (c) MontaVista Software, Inc.
8 * Mostly based on original driver:
10 * Copyright (C) 2005 Nokia Corporation
11 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/random.h>
21 #include <linux/clk.h>
22 #include <linux/err.h>
23 #include <linux/platform_device.h>
24 #include <linux/hw_random.h>
25 #include <linux/delay.h>
27 #include <asm/io.h>
29 #include <plat/cpu.h>
31 #define RNG_OUT_REG 0x00 /* Output register */
32 #define RNG_STAT_REG 0x04 /* Status register
33 [0] = STAT_BUSY */
34 #define RNG_ALARM_REG 0x24 /* Alarm register
35 [7:0] = ALARM_COUNTER */
36 #define RNG_CONFIG_REG 0x28 /* Configuration register
37 [11:6] = RESET_COUNT
38 [5:3] = RING2_DELAY
39 [2:0] = RING1_DELAY */
40 #define RNG_REV_REG 0x3c /* Revision register
41 [7:0] = REV_NB */
42 #define RNG_MASK_REG 0x40 /* Mask and reset register
43 [2] = IT_EN
44 [1] = SOFTRESET
45 [0] = AUTOIDLE */
46 #define RNG_SYSSTATUS 0x44 /* System status
47 [0] = RESETDONE */
49 static void __iomem *rng_base;
50 static struct clk *rng_ick;
51 static struct platform_device *rng_dev;
53 static inline u32 omap_rng_read_reg(int reg)
55 return __raw_readl(rng_base + reg);
58 static inline void omap_rng_write_reg(int reg, u32 val)
60 __raw_writel(val, rng_base + reg);
63 static int omap_rng_data_present(struct hwrng *rng, int wait)
65 int data, i;
67 for (i = 0; i < 20; i++) {
68 data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
69 if (data || !wait)
70 break;
71 /* RNG produces data fast enough (2+ MBit/sec, even
72 * during "rngtest" loads, that these delays don't
73 * seem to trigger. We *could* use the RNG IRQ, but
74 * that'd be higher overhead ... so why bother?
76 udelay(10);
78 return data;
81 static int omap_rng_data_read(struct hwrng *rng, u32 *data)
83 *data = omap_rng_read_reg(RNG_OUT_REG);
85 return 4;
88 static struct hwrng omap_rng_ops = {
89 .name = "omap",
90 .data_present = omap_rng_data_present,
91 .data_read = omap_rng_data_read,
94 static int __devinit omap_rng_probe(struct platform_device *pdev)
96 struct resource *res;
97 int ret;
100 * A bit ugly, and it will never actually happen but there can
101 * be only one RNG and this catches any bork
103 if (rng_dev)
104 return -EBUSY;
106 if (cpu_is_omap24xx()) {
107 rng_ick = clk_get(&pdev->dev, "ick");
108 if (IS_ERR(rng_ick)) {
109 dev_err(&pdev->dev, "Could not get rng_ick\n");
110 ret = PTR_ERR(rng_ick);
111 return ret;
112 } else
113 clk_enable(rng_ick);
116 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
118 rng_base = devm_request_and_ioremap(&pdev->dev, res);
119 if (!rng_base) {
120 ret = -ENOMEM;
121 goto err_ioremap;
123 dev_set_drvdata(&pdev->dev, res);
125 ret = hwrng_register(&omap_rng_ops);
126 if (ret)
127 goto err_register;
129 dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
130 omap_rng_read_reg(RNG_REV_REG));
131 omap_rng_write_reg(RNG_MASK_REG, 0x1);
133 rng_dev = pdev;
135 return 0;
137 err_register:
138 rng_base = NULL;
139 err_ioremap:
140 if (cpu_is_omap24xx()) {
141 clk_disable(rng_ick);
142 clk_put(rng_ick);
144 return ret;
147 static int __exit omap_rng_remove(struct platform_device *pdev)
149 hwrng_unregister(&omap_rng_ops);
151 omap_rng_write_reg(RNG_MASK_REG, 0x0);
153 if (cpu_is_omap24xx()) {
154 clk_disable(rng_ick);
155 clk_put(rng_ick);
158 rng_base = NULL;
160 return 0;
163 #ifdef CONFIG_PM_SLEEP
165 static int omap_rng_suspend(struct device *dev)
167 omap_rng_write_reg(RNG_MASK_REG, 0x0);
168 return 0;
171 static int omap_rng_resume(struct device *dev)
173 omap_rng_write_reg(RNG_MASK_REG, 0x1);
174 return 0;
177 static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume);
178 #define OMAP_RNG_PM (&omap_rng_pm)
180 #else
182 #define OMAP_RNG_PM NULL
184 #endif
186 /* work with hotplug and coldplug */
187 MODULE_ALIAS("platform:omap_rng");
189 static struct platform_driver omap_rng_driver = {
190 .driver = {
191 .name = "omap_rng",
192 .owner = THIS_MODULE,
193 .pm = OMAP_RNG_PM,
195 .probe = omap_rng_probe,
196 .remove = __exit_p(omap_rng_remove),
199 static int __init omap_rng_init(void)
201 if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
202 return -ENODEV;
204 return platform_driver_register(&omap_rng_driver);
207 static void __exit omap_rng_exit(void)
209 platform_driver_unregister(&omap_rng_driver);
212 module_init(omap_rng_init);
213 module_exit(omap_rng_exit);
215 MODULE_AUTHOR("Deepak Saxena (and others)");
216 MODULE_LICENSE("GPL");