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Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / gpu / drm / i915 / intel_sdvo.c
blob20cb52dfcb5a066225c4461428a0c4fa60f58dc2
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char *tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
68 struct intel_sdvo {
69 struct intel_encoder base;
70
71 struct i2c_adapter *i2c;
72 u8 slave_addr;
73
74 struct i2c_adapter ddc;
75
76 /* Register for the SDVO device: SDVOB or SDVOC */
77 uint32_t sdvo_reg;
78
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
81
82 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
86 struct intel_sdvo_caps caps;
87
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
90
91 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
97 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
102 /**
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
120 /* This is for current tv format name */
121 int tv_format_index;
122
123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
129
130 /**
131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
133 */
134 bool is_lvds;
135
136 /**
137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
141 /* DDC bus used by this SDVO encoder */
142 uint8_t ddc_bus;
143 };
144
145 struct intel_sdvo_connector {
146 struct intel_connector base;
147
148 /* Mark the type of connector */
149 uint16_t output_flag;
150
151 enum hdmi_force_audio force_audio;
152
153 /* This contains all current supported TV format */
154 u8 tv_format_supported[TV_FORMAT_NUM];
155 int format_supported_num;
156 struct drm_property *tv_format;
157
158 /* add the property for the SDVO-TV */
159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
174 struct drm_property *dot_crawl;
175
176 /* add the property for the SDVO-TV/LVDS */
177 struct drm_property *brightness;
178
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
181
182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
196 u32 cur_dot_crawl, max_dot_crawl;
197 };
198
199 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
200 {
201 return container_of(encoder, struct intel_sdvo, base.base);
202 }
203
204 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205 {
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
208 }
209
210 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211 {
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213 }
214
215 static bool
216 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
217 static bool
218 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
220 int type);
221 static bool
222 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
224
225 /**
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
229 */
230 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
231 {
232 struct drm_device *dev = intel_sdvo->base.base.dev;
233 struct drm_i915_private *dev_priv = dev->dev_private;
234 u32 bval = val, cval = val;
235 int i;
236
237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
240 return;
241 }
242
243 if (intel_sdvo->sdvo_reg == SDVOB) {
244 cval = I915_READ(SDVOC);
245 } else {
246 bval = I915_READ(SDVOB);
247 }
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++)
254 {
255 I915_WRITE(SDVOB, bval);
256 I915_READ(SDVOB);
257 I915_WRITE(SDVOC, cval);
258 I915_READ(SDVOC);
259 }
260 }
261
262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 {
264 struct i2c_msg msgs[] = {
265 {
266 .addr = intel_sdvo->slave_addr,
267 .flags = 0,
268 .len = 1,
269 .buf = &addr,
270 },
271 {
272 .addr = intel_sdvo->slave_addr,
273 .flags = I2C_M_RD,
274 .len = 1,
275 .buf = ch,
276 }
277 };
278 int ret;
279
280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281 return true;
282
283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284 return false;
285 }
286
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
290 u8 cmd;
291 const char *name;
292 } sdvo_cmd_names[] = {
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404 };
405
406 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
407
408 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
409 const void *args, int args_len)
410 {
411 int i;
412
413 DRM_DEBUG_KMS("%s: W: %02X ",
414 SDVO_NAME(intel_sdvo), cmd);
415 for (i = 0; i < args_len; i++)
416 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
417 for (; i < 8; i++)
418 DRM_LOG_KMS(" ");
419 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
420 if (cmd == sdvo_cmd_names[i].cmd) {
421 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
422 break;
423 }
424 }
425 if (i == ARRAY_SIZE(sdvo_cmd_names))
426 DRM_LOG_KMS("(%02X)", cmd);
427 DRM_LOG_KMS("\n");
428 }
429
430 static const char *cmd_status_names[] = {
431 "Power on",
432 "Success",
433 "Not supported",
434 "Invalid arg",
435 "Pending",
436 "Target not specified",
437 "Scaling not supported"
438 };
439
440 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441 const void *args, int args_len)
442 {
443 u8 *buf, status;
444 struct i2c_msg *msgs;
445 int i, ret = true;
446
447 /* Would be simpler to allocate both in one go ? */
448 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
449 if (!buf)
450 return false;
451
452 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
453 if (!msgs) {
454 kfree(buf);
455 return false;
456 }
457
458 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460 for (i = 0; i < args_len; i++) {
461 msgs[i].addr = intel_sdvo->slave_addr;
462 msgs[i].flags = 0;
463 msgs[i].len = 2;
464 msgs[i].buf = buf + 2 *i;
465 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466 buf[2*i + 1] = ((u8*)args)[i];
467 }
468 msgs[i].addr = intel_sdvo->slave_addr;
469 msgs[i].flags = 0;
470 msgs[i].len = 2;
471 msgs[i].buf = buf + 2*i;
472 buf[2*i + 0] = SDVO_I2C_OPCODE;
473 buf[2*i + 1] = cmd;
474
475 /* the following two are to read the response */
476 status = SDVO_I2C_CMD_STATUS;
477 msgs[i+1].addr = intel_sdvo->slave_addr;
478 msgs[i+1].flags = 0;
479 msgs[i+1].len = 1;
480 msgs[i+1].buf = &status;
481
482 msgs[i+2].addr = intel_sdvo->slave_addr;
483 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].len = 1;
485 msgs[i+2].buf = &status;
486
487 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 if (ret < 0) {
489 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
490 ret = false;
491 goto out;
492 }
493 if (ret != i+3) {
494 /* failure in I2C transfer */
495 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
496 ret = false;
497 }
498
499 out:
500 kfree(msgs);
501 kfree(buf);
502 return ret;
503 }
504
505 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506 void *response, int response_len)
507 {
508 u8 retry = 5;
509 u8 status;
510 int i;
511
512 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
514 /*
515 * The documentation states that all commands will be
516 * processed within 15µs, and that we need only poll
517 * the status byte a maximum of 3 times in order for the
518 * command to be complete.
519 *
520 * Check 5 times in case the hardware failed to read the docs.
521 */
522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS,
524 &status))
525 goto log_fail;
526
527 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 udelay(15);
529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_CMD_STATUS,
531 &status))
532 goto log_fail;
533 }
534
535 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
536 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
537 else
538 DRM_LOG_KMS("(??? %d)", status);
539
540 if (status != SDVO_CMD_STATUS_SUCCESS)
541 goto log_fail;
542
543 /* Read the command response */
544 for (i = 0; i < response_len; i++) {
545 if (!intel_sdvo_read_byte(intel_sdvo,
546 SDVO_I2C_RETURN_0 + i,
547 &((u8 *)response)[i]))
548 goto log_fail;
549 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
550 }
551 DRM_LOG_KMS("\n");
552 return true;
553
554 log_fail:
555 DRM_LOG_KMS("... failed\n");
556 return false;
557 }
558
559 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
560 {
561 if (mode->clock >= 100000)
562 return 1;
563 else if (mode->clock >= 50000)
564 return 2;
565 else
566 return 4;
567 }
568
569 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 u8 ddc_bus)
571 {
572 /* This must be the immediately preceding write before the i2c xfer */
573 return intel_sdvo_write_cmd(intel_sdvo,
574 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575 &ddc_bus, 1);
576 }
577
578 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579 {
580 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return false;
582
583 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
584 }
585
586 static bool
587 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588 {
589 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return false;
591
592 return intel_sdvo_read_response(intel_sdvo, value, len);
593 }
594
595 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
596 {
597 struct intel_sdvo_set_target_input_args targets = {0};
598 return intel_sdvo_set_value(intel_sdvo,
599 SDVO_CMD_SET_TARGET_INPUT,
600 &targets, sizeof(targets));
601 }
602
603 /**
604 * Return whether each input is trained.
605 *
606 * This function is making an assumption about the layout of the response,
607 * which should be checked against the docs.
608 */
609 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
610 {
611 struct intel_sdvo_get_trained_inputs_response response;
612
613 BUILD_BUG_ON(sizeof(response) != 1);
614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615 &response, sizeof(response)))
616 return false;
617
618 *input_1 = response.input0_trained;
619 *input_2 = response.input1_trained;
620 return true;
621 }
622
623 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
624 u16 outputs)
625 {
626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ACTIVE_OUTPUTS,
628 &outputs, sizeof(outputs));
629 }
630
631 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
632 int mode)
633 {
634 u8 state = SDVO_ENCODER_STATE_ON;
635
636 switch (mode) {
637 case DRM_MODE_DPMS_ON:
638 state = SDVO_ENCODER_STATE_ON;
639 break;
640 case DRM_MODE_DPMS_STANDBY:
641 state = SDVO_ENCODER_STATE_STANDBY;
642 break;
643 case DRM_MODE_DPMS_SUSPEND:
644 state = SDVO_ENCODER_STATE_SUSPEND;
645 break;
646 case DRM_MODE_DPMS_OFF:
647 state = SDVO_ENCODER_STATE_OFF;
648 break;
649 }
650
651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
653 }
654
655 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
656 int *clock_min,
657 int *clock_max)
658 {
659 struct intel_sdvo_pixel_clock_range clocks;
660
661 BUILD_BUG_ON(sizeof(clocks) != 4);
662 if (!intel_sdvo_get_value(intel_sdvo,
663 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664 &clocks, sizeof(clocks)))
665 return false;
666
667 /* Convert the values from units of 10 kHz to kHz. */
668 *clock_min = clocks.min * 10;
669 *clock_max = clocks.max * 10;
670 return true;
671 }
672
673 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
674 u16 outputs)
675 {
676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_TARGET_OUTPUT,
678 &outputs, sizeof(outputs));
679 }
680
681 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
682 struct intel_sdvo_dtd *dtd)
683 {
684 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
686 }
687
688 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
689 struct intel_sdvo_dtd *dtd)
690 {
691 return intel_sdvo_set_timing(intel_sdvo,
692 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693 }
694
695 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
696 struct intel_sdvo_dtd *dtd)
697 {
698 return intel_sdvo_set_timing(intel_sdvo,
699 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700 }
701
702 static bool
703 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
704 uint16_t clock,
705 uint16_t width,
706 uint16_t height)
707 {
708 struct intel_sdvo_preferred_input_timing_args args;
709
710 memset(&args, 0, sizeof(args));
711 args.clock = clock;
712 args.width = width;
713 args.height = height;
714 args.interlace = 0;
715
716 if (intel_sdvo->is_lvds &&
717 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
719 args.scaled = 1;
720
721 return intel_sdvo_set_value(intel_sdvo,
722 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723 &args, sizeof(args));
724 }
725
726 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
727 struct intel_sdvo_dtd *dtd)
728 {
729 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
730 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
731 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
732 &dtd->part1, sizeof(dtd->part1)) &&
733 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
734 &dtd->part2, sizeof(dtd->part2));
735 }
736
737 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
738 {
739 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
740 }
741
742 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
743 const struct drm_display_mode *mode)
744 {
745 uint16_t width, height;
746 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
747 uint16_t h_sync_offset, v_sync_offset;
748 int mode_clock;
749
750 width = mode->hdisplay;
751 height = mode->vdisplay;
752
753 /* do some mode translations */
754 h_blank_len = mode->htotal - mode->hdisplay;
755 h_sync_len = mode->hsync_end - mode->hsync_start;
756
757 v_blank_len = mode->vtotal - mode->vdisplay;
758 v_sync_len = mode->vsync_end - mode->vsync_start;
759
760 h_sync_offset = mode->hsync_start - mode->hdisplay;
761 v_sync_offset = mode->vsync_start - mode->vdisplay;
762
763 mode_clock = mode->clock;
764 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
765 mode_clock /= 10;
766 dtd->part1.clock = mode_clock;
767
768 dtd->part1.h_active = width & 0xff;
769 dtd->part1.h_blank = h_blank_len & 0xff;
770 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
771 ((h_blank_len >> 8) & 0xf);
772 dtd->part1.v_active = height & 0xff;
773 dtd->part1.v_blank = v_blank_len & 0xff;
774 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
775 ((v_blank_len >> 8) & 0xf);
776
777 dtd->part2.h_sync_off = h_sync_offset & 0xff;
778 dtd->part2.h_sync_width = h_sync_len & 0xff;
779 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
780 (v_sync_len & 0xf);
781 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
782 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
783 ((v_sync_len & 0x30) >> 4);
784
785 dtd->part2.dtd_flags = 0x18;
786 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
787 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
788 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
789 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
790 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
791 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
792
793 dtd->part2.sdvo_flags = 0;
794 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
795 dtd->part2.reserved = 0;
796 }
797
798 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
799 const struct intel_sdvo_dtd *dtd)
800 {
801 mode->hdisplay = dtd->part1.h_active;
802 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
803 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
804 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
805 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
806 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
807 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
808 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
809
810 mode->vdisplay = dtd->part1.v_active;
811 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
812 mode->vsync_start = mode->vdisplay;
813 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
814 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
815 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
816 mode->vsync_end = mode->vsync_start +
817 (dtd->part2.v_sync_off_width & 0xf);
818 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
819 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
820 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
821
822 mode->clock = dtd->part1.clock * 10;
823
824 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
825 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
826 mode->flags |= DRM_MODE_FLAG_INTERLACE;
827 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
828 mode->flags |= DRM_MODE_FLAG_PHSYNC;
829 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
830 mode->flags |= DRM_MODE_FLAG_PVSYNC;
831 }
832
833 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
834 {
835 struct intel_sdvo_encode encode;
836
837 BUILD_BUG_ON(sizeof(encode) != 2);
838 return intel_sdvo_get_value(intel_sdvo,
839 SDVO_CMD_GET_SUPP_ENCODE,
840 &encode, sizeof(encode));
841 }
842
843 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
844 uint8_t mode)
845 {
846 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
847 }
848
849 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
850 uint8_t mode)
851 {
852 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
853 }
854
855 #if 0
856 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
857 {
858 int i, j;
859 uint8_t set_buf_index[2];
860 uint8_t av_split;
861 uint8_t buf_size;
862 uint8_t buf[48];
863 uint8_t *pos;
864
865 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
866
867 for (i = 0; i <= av_split; i++) {
868 set_buf_index[0] = i; set_buf_index[1] = 0;
869 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
870 set_buf_index, 2);
871 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
872 intel_sdvo_read_response(encoder, &buf_size, 1);
873
874 pos = buf;
875 for (j = 0; j <= buf_size; j += 8) {
876 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
877 NULL, 0);
878 intel_sdvo_read_response(encoder, pos, 8);
879 pos += 8;
880 }
881 }
882 }
883 #endif
884
885 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
886 unsigned if_index, uint8_t tx_rate,
887 uint8_t *data, unsigned length)
888 {
889 uint8_t set_buf_index[2] = { if_index, 0 };
890 uint8_t hbuf_size, tmp[8];
891 int i;
892
893 if (!intel_sdvo_set_value(intel_sdvo,
894 SDVO_CMD_SET_HBUF_INDEX,
895 set_buf_index, 2))
896 return false;
897
898 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
899 &hbuf_size, 1))
900 return false;
901
902 /* Buffer size is 0 based, hooray! */
903 hbuf_size++;
904
905 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
906 if_index, length, hbuf_size);
907
908 for (i = 0; i < hbuf_size; i += 8) {
909 memset(tmp, 0, 8);
910 if (i < length)
911 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
912
913 if (!intel_sdvo_set_value(intel_sdvo,
914 SDVO_CMD_SET_HBUF_DATA,
915 tmp, 8))
916 return false;
917 }
918
919 return intel_sdvo_set_value(intel_sdvo,
920 SDVO_CMD_SET_HBUF_TXRATE,
921 &tx_rate, 1);
922 }
923
924 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
925 {
926 struct dip_infoframe avi_if = {
927 .type = DIP_TYPE_AVI,
928 .ver = DIP_VERSION_AVI,
929 .len = DIP_LEN_AVI,
930 };
931 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
932
933 intel_dip_infoframe_csum(&avi_if);
934
935 /* sdvo spec says that the ecc is handled by the hw, and it looks like
936 * we must not send the ecc field, either. */
937 memcpy(sdvo_data, &avi_if, 3);
938 sdvo_data[3] = avi_if.checksum;
939 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
940
941 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
942 SDVO_HBUF_TX_VSYNC,
943 sdvo_data, sizeof(sdvo_data));
944 }
945
946 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
947 {
948 struct intel_sdvo_tv_format format;
949 uint32_t format_map;
950
951 format_map = 1 << intel_sdvo->tv_format_index;
952 memset(&format, 0, sizeof(format));
953 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
954
955 BUILD_BUG_ON(sizeof(format) != 6);
956 return intel_sdvo_set_value(intel_sdvo,
957 SDVO_CMD_SET_TV_FORMAT,
958 &format, sizeof(format));
959 }
960
961 static bool
962 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
963 const struct drm_display_mode *mode)
964 {
965 struct intel_sdvo_dtd output_dtd;
966
967 if (!intel_sdvo_set_target_output(intel_sdvo,
968 intel_sdvo->attached_output))
969 return false;
970
971 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
972 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
973 return false;
974
975 return true;
976 }
977
978 /* Asks the sdvo controller for the preferred input mode given the output mode.
979 * Unfortunately we have to set up the full output mode to do that. */
980 static bool
981 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
982 const struct drm_display_mode *mode,
983 struct drm_display_mode *adjusted_mode)
984 {
985 struct intel_sdvo_dtd input_dtd;
986
987 /* Reset the input timing to the screen. Assume always input 0. */
988 if (!intel_sdvo_set_target_input(intel_sdvo))
989 return false;
990
991 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
992 mode->clock / 10,
993 mode->hdisplay,
994 mode->vdisplay))
995 return false;
996
997 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
998 &input_dtd))
999 return false;
1000
1001 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1002
1003 return true;
1004 }
1005
1006 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1007 const struct drm_display_mode *mode,
1008 struct drm_display_mode *adjusted_mode)
1009 {
1010 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1011 int multiplier;
1012
1013 /* We need to construct preferred input timings based on our
1014 * output timings. To do that, we have to set the output
1015 * timings, even though this isn't really the right place in
1016 * the sequence to do it. Oh well.
1017 */
1018 if (intel_sdvo->is_tv) {
1019 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1020 return false;
1021
1022 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1023 mode,
1024 adjusted_mode);
1025 } else if (intel_sdvo->is_lvds) {
1026 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1027 intel_sdvo->sdvo_lvds_fixed_mode))
1028 return false;
1029
1030 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1031 mode,
1032 adjusted_mode);
1033 }
1034
1035 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1036 * SDVO device will factor out the multiplier during mode_set.
1037 */
1038 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1039 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1040
1041 return true;
1042 }
1043
1044 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1045 struct drm_display_mode *mode,
1046 struct drm_display_mode *adjusted_mode)
1047 {
1048 struct drm_device *dev = encoder->dev;
1049 struct drm_i915_private *dev_priv = dev->dev_private;
1050 struct drm_crtc *crtc = encoder->crtc;
1051 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1052 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1053 u32 sdvox;
1054 struct intel_sdvo_in_out_map in_out;
1055 struct intel_sdvo_dtd input_dtd, output_dtd;
1056 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1057 int rate;
1058
1059 if (!mode)
1060 return;
1061
1062 /* First, set the input mapping for the first input to our controlled
1063 * output. This is only correct if we're a single-input device, in
1064 * which case the first input is the output from the appropriate SDVO
1065 * channel on the motherboard. In a two-input device, the first input
1066 * will be SDVOB and the second SDVOC.
1067 */
1068 in_out.in0 = intel_sdvo->attached_output;
1069 in_out.in1 = 0;
1070
1071 intel_sdvo_set_value(intel_sdvo,
1072 SDVO_CMD_SET_IN_OUT_MAP,
1073 &in_out, sizeof(in_out));
1074
1075 /* Set the output timings to the screen */
1076 if (!intel_sdvo_set_target_output(intel_sdvo,
1077 intel_sdvo->attached_output))
1078 return;
1079
1080 /* lvds has a special fixed output timing. */
1081 if (intel_sdvo->is_lvds)
1082 intel_sdvo_get_dtd_from_mode(&output_dtd,
1083 intel_sdvo->sdvo_lvds_fixed_mode);
1084 else
1085 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1086 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1087 DRM_INFO("Setting output timings on %s failed\n",
1088 SDVO_NAME(intel_sdvo));
1089
1090 /* Set the input timing to the screen. Assume always input 0. */
1091 if (!intel_sdvo_set_target_input(intel_sdvo))
1092 return;
1093
1094 if (intel_sdvo->has_hdmi_monitor) {
1095 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1096 intel_sdvo_set_colorimetry(intel_sdvo,
1097 SDVO_COLORIMETRY_RGB256);
1098 intel_sdvo_set_avi_infoframe(intel_sdvo);
1099 } else
1100 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1101
1102 if (intel_sdvo->is_tv &&
1103 !intel_sdvo_set_tv_format(intel_sdvo))
1104 return;
1105
1106 /* We have tried to get input timing in mode_fixup, and filled into
1107 * adjusted_mode.
1108 */
1109 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1110 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1111 DRM_INFO("Setting input timings on %s failed\n",
1112 SDVO_NAME(intel_sdvo));
1113
1114 switch (pixel_multiplier) {
1115 default:
1116 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1117 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1118 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1119 }
1120 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1121 return;
1122
1123 /* Set the SDVO control regs. */
1124 if (INTEL_INFO(dev)->gen >= 4) {
1125 /* The real mode polarity is set by the SDVO commands, using
1126 * struct intel_sdvo_dtd. */
1127 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1128 if (intel_sdvo->is_hdmi)
1129 sdvox |= intel_sdvo->color_range;
1130 if (INTEL_INFO(dev)->gen < 5)
1131 sdvox |= SDVO_BORDER_ENABLE;
1132 } else {
1133 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1134 switch (intel_sdvo->sdvo_reg) {
1135 case SDVOB:
1136 sdvox &= SDVOB_PRESERVE_MASK;
1137 break;
1138 case SDVOC:
1139 sdvox &= SDVOC_PRESERVE_MASK;
1140 break;
1141 }
1142 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1143 }
1144
1145 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1146 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1147 else
1148 sdvox |= TRANSCODER(intel_crtc->pipe);
1149
1150 if (intel_sdvo->has_hdmi_audio)
1151 sdvox |= SDVO_AUDIO_ENABLE;
1152
1153 if (INTEL_INFO(dev)->gen >= 4) {
1154 /* done in crtc_mode_set as the dpll_md reg must be written early */
1155 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1156 /* done in crtc_mode_set as it lives inside the dpll register */
1157 } else {
1158 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1159 }
1160
1161 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1162 INTEL_INFO(dev)->gen < 5)
1163 sdvox |= SDVO_STALL_SELECT;
1164 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1165 }
1166
1167 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1168 {
1169 struct drm_device *dev = encoder->dev;
1170 struct drm_i915_private *dev_priv = dev->dev_private;
1171 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1172 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1173 u32 temp;
1174
1175 if (mode != DRM_MODE_DPMS_ON) {
1176 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1177 if (0)
1178 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1179
1180 if (mode == DRM_MODE_DPMS_OFF) {
1181 temp = I915_READ(intel_sdvo->sdvo_reg);
1182 if ((temp & SDVO_ENABLE) != 0) {
1183 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1184 }
1185 }
1186 } else {
1187 bool input1, input2;
1188 int i;
1189 u8 status;
1190
1191 temp = I915_READ(intel_sdvo->sdvo_reg);
1192 if ((temp & SDVO_ENABLE) == 0)
1193 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1194 for (i = 0; i < 2; i++)
1195 intel_wait_for_vblank(dev, intel_crtc->pipe);
1196
1197 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1198 /* Warn if the device reported failure to sync.
1199 * A lot of SDVO devices fail to notify of sync, but it's
1200 * a given it the status is a success, we succeeded.
1201 */
1202 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1203 DRM_DEBUG_KMS("First %s output reported failure to "
1204 "sync\n", SDVO_NAME(intel_sdvo));
1205 }
1206
1207 if (0)
1208 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1209 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1210 }
1211 return;
1212 }
1213
1214 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1215 struct drm_display_mode *mode)
1216 {
1217 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1218
1219 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1220 return MODE_NO_DBLESCAN;
1221
1222 if (intel_sdvo->pixel_clock_min > mode->clock)
1223 return MODE_CLOCK_LOW;
1224
1225 if (intel_sdvo->pixel_clock_max < mode->clock)
1226 return MODE_CLOCK_HIGH;
1227
1228 if (intel_sdvo->is_lvds) {
1229 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1230 return MODE_PANEL;
1231
1232 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1233 return MODE_PANEL;
1234 }
1235
1236 return MODE_OK;
1237 }
1238
1239 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1240 {
1241 BUILD_BUG_ON(sizeof(*caps) != 8);
1242 if (!intel_sdvo_get_value(intel_sdvo,
1243 SDVO_CMD_GET_DEVICE_CAPS,
1244 caps, sizeof(*caps)))
1245 return false;
1246
1247 DRM_DEBUG_KMS("SDVO capabilities:\n"
1248 " vendor_id: %d\n"
1249 " device_id: %d\n"
1250 " device_rev_id: %d\n"
1251 " sdvo_version_major: %d\n"
1252 " sdvo_version_minor: %d\n"
1253 " sdvo_inputs_mask: %d\n"
1254 " smooth_scaling: %d\n"
1255 " sharp_scaling: %d\n"
1256 " up_scaling: %d\n"
1257 " down_scaling: %d\n"
1258 " stall_support: %d\n"
1259 " output_flags: %d\n",
1260 caps->vendor_id,
1261 caps->device_id,
1262 caps->device_rev_id,
1263 caps->sdvo_version_major,
1264 caps->sdvo_version_minor,
1265 caps->sdvo_inputs_mask,
1266 caps->smooth_scaling,
1267 caps->sharp_scaling,
1268 caps->up_scaling,
1269 caps->down_scaling,
1270 caps->stall_support,
1271 caps->output_flags);
1272
1273 return true;
1274 }
1275
1276 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1277 {
1278 struct drm_device *dev = intel_sdvo->base.base.dev;
1279 u8 response[2];
1280
1281 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1282 * on the line. */
1283 if (IS_I945G(dev) || IS_I945GM(dev))
1284 return false;
1285
1286 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1287 &response, 2) && response[0];
1288 }
1289
1290 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1291 {
1292 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1293
1294 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1295 }
1296
1297 static bool
1298 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1299 {
1300 /* Is there more than one type of output? */
1301 return hweight16(intel_sdvo->caps.output_flags) > 1;
1302 }
1303
1304 static struct edid *
1305 intel_sdvo_get_edid(struct drm_connector *connector)
1306 {
1307 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1308 return drm_get_edid(connector, &sdvo->ddc);
1309 }
1310
1311 /* Mac mini hack -- use the same DDC as the analog connector */
1312 static struct edid *
1313 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1314 {
1315 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1316
1317 return drm_get_edid(connector,
1318 intel_gmbus_get_adapter(dev_priv,
1319 dev_priv->crt_ddc_pin));
1320 }
1321
1322 static enum drm_connector_status
1323 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1324 {
1325 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1326 enum drm_connector_status status;
1327 struct edid *edid;
1328
1329 edid = intel_sdvo_get_edid(connector);
1330
1331 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1332 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1333
1334 /*
1335 * Don't use the 1 as the argument of DDC bus switch to get
1336 * the EDID. It is used for SDVO SPD ROM.
1337 */
1338 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1339 intel_sdvo->ddc_bus = ddc;
1340 edid = intel_sdvo_get_edid(connector);
1341 if (edid)
1342 break;
1343 }
1344 /*
1345 * If we found the EDID on the other bus,
1346 * assume that is the correct DDC bus.
1347 */
1348 if (edid == NULL)
1349 intel_sdvo->ddc_bus = saved_ddc;
1350 }
1351
1352 /*
1353 * When there is no edid and no monitor is connected with VGA
1354 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1355 */
1356 if (edid == NULL)
1357 edid = intel_sdvo_get_analog_edid(connector);
1358
1359 status = connector_status_unknown;
1360 if (edid != NULL) {
1361 /* DDC bus is shared, match EDID to connector type */
1362 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1363 status = connector_status_connected;
1364 if (intel_sdvo->is_hdmi) {
1365 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1366 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1367 }
1368 } else
1369 status = connector_status_disconnected;
1370 connector->display_info.raw_edid = NULL;
1371 kfree(edid);
1372 }
1373
1374 if (status == connector_status_connected) {
1375 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1376 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1377 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1378 }
1379
1380 return status;
1381 }
1382
1383 static bool
1384 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1385 struct edid *edid)
1386 {
1387 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1388 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1389
1390 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1391 connector_is_digital, monitor_is_digital);
1392 return connector_is_digital == monitor_is_digital;
1393 }
1394
1395 static enum drm_connector_status
1396 intel_sdvo_detect(struct drm_connector *connector, bool force)
1397 {
1398 uint16_t response;
1399 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1400 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1401 enum drm_connector_status ret;
1402
1403 if (!intel_sdvo_write_cmd(intel_sdvo,
1404 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1405 return connector_status_unknown;
1406
1407 /* add 30ms delay when the output type might be TV */
1408 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1409 msleep(30);
1410
1411 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1412 return connector_status_unknown;
1413
1414 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1415 response & 0xff, response >> 8,
1416 intel_sdvo_connector->output_flag);
1417
1418 if (response == 0)
1419 return connector_status_disconnected;
1420
1421 intel_sdvo->attached_output = response;
1422
1423 intel_sdvo->has_hdmi_monitor = false;
1424 intel_sdvo->has_hdmi_audio = false;
1425
1426 if ((intel_sdvo_connector->output_flag & response) == 0)
1427 ret = connector_status_disconnected;
1428 else if (IS_TMDS(intel_sdvo_connector))
1429 ret = intel_sdvo_tmds_sink_detect(connector);
1430 else {
1431 struct edid *edid;
1432
1433 /* if we have an edid check it matches the connection */
1434 edid = intel_sdvo_get_edid(connector);
1435 if (edid == NULL)
1436 edid = intel_sdvo_get_analog_edid(connector);
1437 if (edid != NULL) {
1438 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1439 edid))
1440 ret = connector_status_connected;
1441 else
1442 ret = connector_status_disconnected;
1443
1444 connector->display_info.raw_edid = NULL;
1445 kfree(edid);
1446 } else
1447 ret = connector_status_connected;
1448 }
1449
1450 /* May update encoder flag for like clock for SDVO TV, etc.*/
1451 if (ret == connector_status_connected) {
1452 intel_sdvo->is_tv = false;
1453 intel_sdvo->is_lvds = false;
1454 intel_sdvo->base.needs_tv_clock = false;
1455
1456 if (response & SDVO_TV_MASK) {
1457 intel_sdvo->is_tv = true;
1458 intel_sdvo->base.needs_tv_clock = true;
1459 }
1460 if (response & SDVO_LVDS_MASK)
1461 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1462 }
1463
1464 return ret;
1465 }
1466
1467 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1468 {
1469 struct edid *edid;
1470
1471 /* set the bus switch and get the modes */
1472 edid = intel_sdvo_get_edid(connector);
1473
1474 /*
1475 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1476 * link between analog and digital outputs. So, if the regular SDVO
1477 * DDC fails, check to see if the analog output is disconnected, in
1478 * which case we'll look there for the digital DDC data.
1479 */
1480 if (edid == NULL)
1481 edid = intel_sdvo_get_analog_edid(connector);
1482
1483 if (edid != NULL) {
1484 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1485 edid)) {
1486 drm_mode_connector_update_edid_property(connector, edid);
1487 drm_add_edid_modes(connector, edid);
1488 }
1489
1490 connector->display_info.raw_edid = NULL;
1491 kfree(edid);
1492 }
1493 }
1494
1495 /*
1496 * Set of SDVO TV modes.
1497 * Note! This is in reply order (see loop in get_tv_modes).
1498 * XXX: all 60Hz refresh?
1499 */
1500 static const struct drm_display_mode sdvo_tv_modes[] = {
1501 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1502 416, 0, 200, 201, 232, 233, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1505 416, 0, 240, 241, 272, 273, 0,
1506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1508 496, 0, 300, 301, 332, 333, 0,
1509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1511 736, 0, 350, 351, 382, 383, 0,
1512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1514 736, 0, 400, 401, 432, 433, 0,
1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1517 736, 0, 480, 481, 512, 513, 0,
1518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1520 800, 0, 480, 481, 512, 513, 0,
1521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1523 800, 0, 576, 577, 608, 609, 0,
1524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1525 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1526 816, 0, 350, 351, 382, 383, 0,
1527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1529 816, 0, 400, 401, 432, 433, 0,
1530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1531 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1532 816, 0, 480, 481, 512, 513, 0,
1533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1534 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1535 816, 0, 540, 541, 572, 573, 0,
1536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1537 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1538 816, 0, 576, 577, 608, 609, 0,
1539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1540 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1541 864, 0, 576, 577, 608, 609, 0,
1542 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1543 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1544 896, 0, 600, 601, 632, 633, 0,
1545 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1546 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1547 928, 0, 624, 625, 656, 657, 0,
1548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1549 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1550 1016, 0, 766, 767, 798, 799, 0,
1551 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1552 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1553 1120, 0, 768, 769, 800, 801, 0,
1554 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1555 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1556 1376, 0, 1024, 1025, 1056, 1057, 0,
1557 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1558 };
1559
1560 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1561 {
1562 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1563 struct intel_sdvo_sdtv_resolution_request tv_res;
1564 uint32_t reply = 0, format_map = 0;
1565 int i;
1566
1567 /* Read the list of supported input resolutions for the selected TV
1568 * format.
1569 */
1570 format_map = 1 << intel_sdvo->tv_format_index;
1571 memcpy(&tv_res, &format_map,
1572 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1573
1574 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1575 return;
1576
1577 BUILD_BUG_ON(sizeof(tv_res) != 3);
1578 if (!intel_sdvo_write_cmd(intel_sdvo,
1579 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1580 &tv_res, sizeof(tv_res)))
1581 return;
1582 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1583 return;
1584
1585 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1586 if (reply & (1 << i)) {
1587 struct drm_display_mode *nmode;
1588 nmode = drm_mode_duplicate(connector->dev,
1589 &sdvo_tv_modes[i]);
1590 if (nmode)
1591 drm_mode_probed_add(connector, nmode);
1592 }
1593 }
1594
1595 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1596 {
1597 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1598 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1599 struct drm_display_mode *newmode;
1600
1601 /*
1602 * Attempt to get the mode list from DDC.
1603 * Assume that the preferred modes are
1604 * arranged in priority order.
1605 */
1606 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1607 if (list_empty(&connector->probed_modes) == false)
1608 goto end;
1609
1610 /* Fetch modes from VBT */
1611 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1612 newmode = drm_mode_duplicate(connector->dev,
1613 dev_priv->sdvo_lvds_vbt_mode);
1614 if (newmode != NULL) {
1615 /* Guarantee the mode is preferred */
1616 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1617 DRM_MODE_TYPE_DRIVER);
1618 drm_mode_probed_add(connector, newmode);
1619 }
1620 }
1621
1622 end:
1623 list_for_each_entry(newmode, &connector->probed_modes, head) {
1624 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1625 intel_sdvo->sdvo_lvds_fixed_mode =
1626 drm_mode_duplicate(connector->dev, newmode);
1627
1628 intel_sdvo->is_lvds = true;
1629 break;
1630 }
1631 }
1632
1633 }
1634
1635 static int intel_sdvo_get_modes(struct drm_connector *connector)
1636 {
1637 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1638
1639 if (IS_TV(intel_sdvo_connector))
1640 intel_sdvo_get_tv_modes(connector);
1641 else if (IS_LVDS(intel_sdvo_connector))
1642 intel_sdvo_get_lvds_modes(connector);
1643 else
1644 intel_sdvo_get_ddc_modes(connector);
1645
1646 return !list_empty(&connector->probed_modes);
1647 }
1648
1649 static void
1650 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1651 {
1652 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1653 struct drm_device *dev = connector->dev;
1654
1655 if (intel_sdvo_connector->left)
1656 drm_property_destroy(dev, intel_sdvo_connector->left);
1657 if (intel_sdvo_connector->right)
1658 drm_property_destroy(dev, intel_sdvo_connector->right);
1659 if (intel_sdvo_connector->top)
1660 drm_property_destroy(dev, intel_sdvo_connector->top);
1661 if (intel_sdvo_connector->bottom)
1662 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1663 if (intel_sdvo_connector->hpos)
1664 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1665 if (intel_sdvo_connector->vpos)
1666 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1667 if (intel_sdvo_connector->saturation)
1668 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1669 if (intel_sdvo_connector->contrast)
1670 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1671 if (intel_sdvo_connector->hue)
1672 drm_property_destroy(dev, intel_sdvo_connector->hue);
1673 if (intel_sdvo_connector->sharpness)
1674 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1675 if (intel_sdvo_connector->flicker_filter)
1676 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1677 if (intel_sdvo_connector->flicker_filter_2d)
1678 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1679 if (intel_sdvo_connector->flicker_filter_adaptive)
1680 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1681 if (intel_sdvo_connector->tv_luma_filter)
1682 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1683 if (intel_sdvo_connector->tv_chroma_filter)
1684 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1685 if (intel_sdvo_connector->dot_crawl)
1686 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1687 if (intel_sdvo_connector->brightness)
1688 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1689 }
1690
1691 static void intel_sdvo_destroy(struct drm_connector *connector)
1692 {
1693 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1694
1695 if (intel_sdvo_connector->tv_format)
1696 drm_property_destroy(connector->dev,
1697 intel_sdvo_connector->tv_format);
1698
1699 intel_sdvo_destroy_enhance_property(connector);
1700 drm_sysfs_connector_remove(connector);
1701 drm_connector_cleanup(connector);
1702 kfree(connector);
1703 }
1704
1705 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1706 {
1707 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1708 struct edid *edid;
1709 bool has_audio = false;
1710
1711 if (!intel_sdvo->is_hdmi)
1712 return false;
1713
1714 edid = intel_sdvo_get_edid(connector);
1715 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1716 has_audio = drm_detect_monitor_audio(edid);
1717 kfree(edid);
1718
1719 return has_audio;
1720 }
1721
1722 static int
1723 intel_sdvo_set_property(struct drm_connector *connector,
1724 struct drm_property *property,
1725 uint64_t val)
1726 {
1727 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1728 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1729 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1730 uint16_t temp_value;
1731 uint8_t cmd;
1732 int ret;
1733
1734 ret = drm_connector_property_set_value(connector, property, val);
1735 if (ret)
1736 return ret;
1737
1738 if (property == dev_priv->force_audio_property) {
1739 int i = val;
1740 bool has_audio;
1741
1742 if (i == intel_sdvo_connector->force_audio)
1743 return 0;
1744
1745 intel_sdvo_connector->force_audio = i;
1746
1747 if (i == HDMI_AUDIO_AUTO)
1748 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1749 else
1750 has_audio = (i == HDMI_AUDIO_ON);
1751
1752 if (has_audio == intel_sdvo->has_hdmi_audio)
1753 return 0;
1754
1755 intel_sdvo->has_hdmi_audio = has_audio;
1756 goto done;
1757 }
1758
1759 if (property == dev_priv->broadcast_rgb_property) {
1760 if (val == !!intel_sdvo->color_range)
1761 return 0;
1762
1763 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1764 goto done;
1765 }
1766
1767 #define CHECK_PROPERTY(name, NAME) \
1768 if (intel_sdvo_connector->name == property) { \
1769 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1770 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1771 cmd = SDVO_CMD_SET_##NAME; \
1772 intel_sdvo_connector->cur_##name = temp_value; \
1773 goto set_value; \
1774 }
1775
1776 if (property == intel_sdvo_connector->tv_format) {
1777 if (val >= TV_FORMAT_NUM)
1778 return -EINVAL;
1779
1780 if (intel_sdvo->tv_format_index ==
1781 intel_sdvo_connector->tv_format_supported[val])
1782 return 0;
1783
1784 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1785 goto done;
1786 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1787 temp_value = val;
1788 if (intel_sdvo_connector->left == property) {
1789 drm_connector_property_set_value(connector,
1790 intel_sdvo_connector->right, val);
1791 if (intel_sdvo_connector->left_margin == temp_value)
1792 return 0;
1793
1794 intel_sdvo_connector->left_margin = temp_value;
1795 intel_sdvo_connector->right_margin = temp_value;
1796 temp_value = intel_sdvo_connector->max_hscan -
1797 intel_sdvo_connector->left_margin;
1798 cmd = SDVO_CMD_SET_OVERSCAN_H;
1799 goto set_value;
1800 } else if (intel_sdvo_connector->right == property) {
1801 drm_connector_property_set_value(connector,
1802 intel_sdvo_connector->left, val);
1803 if (intel_sdvo_connector->right_margin == temp_value)
1804 return 0;
1805
1806 intel_sdvo_connector->left_margin = temp_value;
1807 intel_sdvo_connector->right_margin = temp_value;
1808 temp_value = intel_sdvo_connector->max_hscan -
1809 intel_sdvo_connector->left_margin;
1810 cmd = SDVO_CMD_SET_OVERSCAN_H;
1811 goto set_value;
1812 } else if (intel_sdvo_connector->top == property) {
1813 drm_connector_property_set_value(connector,
1814 intel_sdvo_connector->bottom, val);
1815 if (intel_sdvo_connector->top_margin == temp_value)
1816 return 0;
1817
1818 intel_sdvo_connector->top_margin = temp_value;
1819 intel_sdvo_connector->bottom_margin = temp_value;
1820 temp_value = intel_sdvo_connector->max_vscan -
1821 intel_sdvo_connector->top_margin;
1822 cmd = SDVO_CMD_SET_OVERSCAN_V;
1823 goto set_value;
1824 } else if (intel_sdvo_connector->bottom == property) {
1825 drm_connector_property_set_value(connector,
1826 intel_sdvo_connector->top, val);
1827 if (intel_sdvo_connector->bottom_margin == temp_value)
1828 return 0;
1829
1830 intel_sdvo_connector->top_margin = temp_value;
1831 intel_sdvo_connector->bottom_margin = temp_value;
1832 temp_value = intel_sdvo_connector->max_vscan -
1833 intel_sdvo_connector->top_margin;
1834 cmd = SDVO_CMD_SET_OVERSCAN_V;
1835 goto set_value;
1836 }
1837 CHECK_PROPERTY(hpos, HPOS)
1838 CHECK_PROPERTY(vpos, VPOS)
1839 CHECK_PROPERTY(saturation, SATURATION)
1840 CHECK_PROPERTY(contrast, CONTRAST)
1841 CHECK_PROPERTY(hue, HUE)
1842 CHECK_PROPERTY(brightness, BRIGHTNESS)
1843 CHECK_PROPERTY(sharpness, SHARPNESS)
1844 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1845 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1846 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1847 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1848 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1849 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1850 }
1851
1852 return -EINVAL; /* unknown property */
1853
1854 set_value:
1855 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1856 return -EIO;
1857
1858
1859 done:
1860 if (intel_sdvo->base.base.crtc) {
1861 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1862 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1863 crtc->y, crtc->fb);
1864 }
1865
1866 return 0;
1867 #undef CHECK_PROPERTY
1868 }
1869
1870 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1871 .dpms = intel_sdvo_dpms,
1872 .mode_fixup = intel_sdvo_mode_fixup,
1873 .prepare = intel_encoder_prepare,
1874 .mode_set = intel_sdvo_mode_set,
1875 .commit = intel_encoder_commit,
1876 };
1877
1878 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1879 .dpms = drm_helper_connector_dpms,
1880 .detect = intel_sdvo_detect,
1881 .fill_modes = drm_helper_probe_single_connector_modes,
1882 .set_property = intel_sdvo_set_property,
1883 .destroy = intel_sdvo_destroy,
1884 };
1885
1886 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1887 .get_modes = intel_sdvo_get_modes,
1888 .mode_valid = intel_sdvo_mode_valid,
1889 .best_encoder = intel_best_encoder,
1890 };
1891
1892 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1893 {
1894 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1895
1896 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1897 drm_mode_destroy(encoder->dev,
1898 intel_sdvo->sdvo_lvds_fixed_mode);
1899
1900 i2c_del_adapter(&intel_sdvo->ddc);
1901 intel_encoder_destroy(encoder);
1902 }
1903
1904 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1905 .destroy = intel_sdvo_enc_destroy,
1906 };
1907
1908 static void
1909 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1910 {
1911 uint16_t mask = 0;
1912 unsigned int num_bits;
1913
1914 /* Make a mask of outputs less than or equal to our own priority in the
1915 * list.
1916 */
1917 switch (sdvo->controlled_output) {
1918 case SDVO_OUTPUT_LVDS1:
1919 mask |= SDVO_OUTPUT_LVDS1;
1920 case SDVO_OUTPUT_LVDS0:
1921 mask |= SDVO_OUTPUT_LVDS0;
1922 case SDVO_OUTPUT_TMDS1:
1923 mask |= SDVO_OUTPUT_TMDS1;
1924 case SDVO_OUTPUT_TMDS0:
1925 mask |= SDVO_OUTPUT_TMDS0;
1926 case SDVO_OUTPUT_RGB1:
1927 mask |= SDVO_OUTPUT_RGB1;
1928 case SDVO_OUTPUT_RGB0:
1929 mask |= SDVO_OUTPUT_RGB0;
1930 break;
1931 }
1932
1933 /* Count bits to find what number we are in the priority list. */
1934 mask &= sdvo->caps.output_flags;
1935 num_bits = hweight16(mask);
1936 /* If more than 3 outputs, default to DDC bus 3 for now. */
1937 if (num_bits > 3)
1938 num_bits = 3;
1939
1940 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1941 sdvo->ddc_bus = 1 << num_bits;
1942 }
1943
1944 /**
1945 * Choose the appropriate DDC bus for control bus switch command for this
1946 * SDVO output based on the controlled output.
1947 *
1948 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1949 * outputs, then LVDS outputs.
1950 */
1951 static void
1952 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1953 struct intel_sdvo *sdvo, u32 reg)
1954 {
1955 struct sdvo_device_mapping *mapping;
1956
1957 if (sdvo->is_sdvob)
1958 mapping = &(dev_priv->sdvo_mappings[0]);
1959 else
1960 mapping = &(dev_priv->sdvo_mappings[1]);
1961
1962 if (mapping->initialized)
1963 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1964 else
1965 intel_sdvo_guess_ddc_bus(sdvo);
1966 }
1967
1968 static void
1969 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1970 struct intel_sdvo *sdvo, u32 reg)
1971 {
1972 struct sdvo_device_mapping *mapping;
1973 u8 pin;
1974
1975 if (sdvo->is_sdvob)
1976 mapping = &dev_priv->sdvo_mappings[0];
1977 else
1978 mapping = &dev_priv->sdvo_mappings[1];
1979
1980 pin = GMBUS_PORT_DPB;
1981 if (mapping->initialized)
1982 pin = mapping->i2c_pin;
1983
1984 if (intel_gmbus_is_port_valid(pin)) {
1985 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1986 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1987 intel_gmbus_force_bit(sdvo->i2c, true);
1988 } else {
1989 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1990 }
1991 }
1992
1993 static bool
1994 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1995 {
1996 return intel_sdvo_check_supp_encode(intel_sdvo);
1997 }
1998
1999 static u8
2000 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2001 {
2002 struct drm_i915_private *dev_priv = dev->dev_private;
2003 struct sdvo_device_mapping *my_mapping, *other_mapping;
2004
2005 if (sdvo->is_sdvob) {
2006 my_mapping = &dev_priv->sdvo_mappings[0];
2007 other_mapping = &dev_priv->sdvo_mappings[1];
2008 } else {
2009 my_mapping = &dev_priv->sdvo_mappings[1];
2010 other_mapping = &dev_priv->sdvo_mappings[0];
2011 }
2012
2013 /* If the BIOS described our SDVO device, take advantage of it. */
2014 if (my_mapping->slave_addr)
2015 return my_mapping->slave_addr;
2016
2017 /* If the BIOS only described a different SDVO device, use the
2018 * address that it isn't using.
2019 */
2020 if (other_mapping->slave_addr) {
2021 if (other_mapping->slave_addr == 0x70)
2022 return 0x72;
2023 else
2024 return 0x70;
2025 }
2026
2027 /* No SDVO device info is found for another DVO port,
2028 * so use mapping assumption we had before BIOS parsing.
2029 */
2030 if (sdvo->is_sdvob)
2031 return 0x70;
2032 else
2033 return 0x72;
2034 }
2035
2036 static void
2037 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2038 struct intel_sdvo *encoder)
2039 {
2040 drm_connector_init(encoder->base.base.dev,
2041 &connector->base.base,
2042 &intel_sdvo_connector_funcs,
2043 connector->base.base.connector_type);
2044
2045 drm_connector_helper_add(&connector->base.base,
2046 &intel_sdvo_connector_helper_funcs);
2047
2048 connector->base.base.interlace_allowed = 1;
2049 connector->base.base.doublescan_allowed = 0;
2050 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2051
2052 intel_connector_attach_encoder(&connector->base, &encoder->base);
2053 drm_sysfs_connector_add(&connector->base.base);
2054 }
2055
2056 static void
2057 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2058 {
2059 struct drm_device *dev = connector->base.base.dev;
2060
2061 intel_attach_force_audio_property(&connector->base.base);
2062 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2063 intel_attach_broadcast_rgb_property(&connector->base.base);
2064 }
2065
2066 static bool
2067 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2068 {
2069 struct drm_encoder *encoder = &intel_sdvo->base.base;
2070 struct drm_connector *connector;
2071 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2072 struct intel_connector *intel_connector;
2073 struct intel_sdvo_connector *intel_sdvo_connector;
2074
2075 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2076 if (!intel_sdvo_connector)
2077 return false;
2078
2079 if (device == 0) {
2080 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2081 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2082 } else if (device == 1) {
2083 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2084 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2085 }
2086
2087 intel_connector = &intel_sdvo_connector->base;
2088 connector = &intel_connector->base;
2089 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2090 connector->polled = DRM_CONNECTOR_POLL_HPD;
2091 intel_sdvo->hotplug_active[0] |= 1 << device;
2092 /* Some SDVO devices have one-shot hotplug interrupts.
2093 * Ensure that they get re-enabled when an interrupt happens.
2094 */
2095 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2096 intel_sdvo_enable_hotplug(intel_encoder);
2097 }
2098 else
2099 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2100 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2101 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2102
2103 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2104 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2105 intel_sdvo->is_hdmi = true;
2106 }
2107 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2108 (1 << INTEL_ANALOG_CLONE_BIT));
2109
2110 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2111 if (intel_sdvo->is_hdmi)
2112 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2113
2114 return true;
2115 }
2116
2117 static bool
2118 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2119 {
2120 struct drm_encoder *encoder = &intel_sdvo->base.base;
2121 struct drm_connector *connector;
2122 struct intel_connector *intel_connector;
2123 struct intel_sdvo_connector *intel_sdvo_connector;
2124
2125 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2126 if (!intel_sdvo_connector)
2127 return false;
2128
2129 intel_connector = &intel_sdvo_connector->base;
2130 connector = &intel_connector->base;
2131 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2132 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2133
2134 intel_sdvo->controlled_output |= type;
2135 intel_sdvo_connector->output_flag = type;
2136
2137 intel_sdvo->is_tv = true;
2138 intel_sdvo->base.needs_tv_clock = true;
2139 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2140
2141 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2142
2143 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2144 goto err;
2145
2146 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2147 goto err;
2148
2149 return true;
2150
2151 err:
2152 intel_sdvo_destroy(connector);
2153 return false;
2154 }
2155
2156 static bool
2157 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2158 {
2159 struct drm_encoder *encoder = &intel_sdvo->base.base;
2160 struct drm_connector *connector;
2161 struct intel_connector *intel_connector;
2162 struct intel_sdvo_connector *intel_sdvo_connector;
2163
2164 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2165 if (!intel_sdvo_connector)
2166 return false;
2167
2168 intel_connector = &intel_sdvo_connector->base;
2169 connector = &intel_connector->base;
2170 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2171 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2172 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2173
2174 if (device == 0) {
2175 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2176 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2177 } else if (device == 1) {
2178 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2179 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2180 }
2181
2182 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2183 (1 << INTEL_ANALOG_CLONE_BIT));
2184
2185 intel_sdvo_connector_init(intel_sdvo_connector,
2186 intel_sdvo);
2187 return true;
2188 }
2189
2190 static bool
2191 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2192 {
2193 struct drm_encoder *encoder = &intel_sdvo->base.base;
2194 struct drm_connector *connector;
2195 struct intel_connector *intel_connector;
2196 struct intel_sdvo_connector *intel_sdvo_connector;
2197
2198 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2199 if (!intel_sdvo_connector)
2200 return false;
2201
2202 intel_connector = &intel_sdvo_connector->base;
2203 connector = &intel_connector->base;
2204 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2205 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2206
2207 if (device == 0) {
2208 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2209 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2210 } else if (device == 1) {
2211 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2212 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2213 }
2214
2215 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2216 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2217
2218 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2219 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2220 goto err;
2221
2222 return true;
2223
2224 err:
2225 intel_sdvo_destroy(connector);
2226 return false;
2227 }
2228
2229 static bool
2230 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2231 {
2232 intel_sdvo->is_tv = false;
2233 intel_sdvo->base.needs_tv_clock = false;
2234 intel_sdvo->is_lvds = false;
2235
2236 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2237
2238 if (flags & SDVO_OUTPUT_TMDS0)
2239 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2240 return false;
2241
2242 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2243 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2244 return false;
2245
2246 /* TV has no XXX1 function block */
2247 if (flags & SDVO_OUTPUT_SVID0)
2248 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2249 return false;
2250
2251 if (flags & SDVO_OUTPUT_CVBS0)
2252 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2253 return false;
2254
2255 if (flags & SDVO_OUTPUT_YPRPB0)
2256 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2257 return false;
2258
2259 if (flags & SDVO_OUTPUT_RGB0)
2260 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2261 return false;
2262
2263 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2264 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2265 return false;
2266
2267 if (flags & SDVO_OUTPUT_LVDS0)
2268 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2269 return false;
2270
2271 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2272 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2273 return false;
2274
2275 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2276 unsigned char bytes[2];
2277
2278 intel_sdvo->controlled_output = 0;
2279 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2280 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2281 SDVO_NAME(intel_sdvo),
2282 bytes[0], bytes[1]);
2283 return false;
2284 }
2285 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2286
2287 return true;
2288 }
2289
2290 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2291 struct intel_sdvo_connector *intel_sdvo_connector,
2292 int type)
2293 {
2294 struct drm_device *dev = intel_sdvo->base.base.dev;
2295 struct intel_sdvo_tv_format format;
2296 uint32_t format_map, i;
2297
2298 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2299 return false;
2300
2301 BUILD_BUG_ON(sizeof(format) != 6);
2302 if (!intel_sdvo_get_value(intel_sdvo,
2303 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2304 &format, sizeof(format)))
2305 return false;
2306
2307 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2308
2309 if (format_map == 0)
2310 return false;
2311
2312 intel_sdvo_connector->format_supported_num = 0;
2313 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2314 if (format_map & (1 << i))
2315 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2316
2317
2318 intel_sdvo_connector->tv_format =
2319 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2320 "mode", intel_sdvo_connector->format_supported_num);
2321 if (!intel_sdvo_connector->tv_format)
2322 return false;
2323
2324 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2325 drm_property_add_enum(
2326 intel_sdvo_connector->tv_format, i,
2327 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2328
2329 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2330 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2331 intel_sdvo_connector->tv_format, 0);
2332 return true;
2333
2334 }
2335
2336 #define ENHANCEMENT(name, NAME) do { \
2337 if (enhancements.name) { \
2338 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2339 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2340 return false; \
2341 intel_sdvo_connector->max_##name = data_value[0]; \
2342 intel_sdvo_connector->cur_##name = response; \
2343 intel_sdvo_connector->name = \
2344 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2345 if (!intel_sdvo_connector->name) return false; \
2346 drm_connector_attach_property(connector, \
2347 intel_sdvo_connector->name, \
2348 intel_sdvo_connector->cur_##name); \
2349 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2350 data_value[0], data_value[1], response); \
2351 } \
2352 } while (0)
2353
2354 static bool
2355 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2356 struct intel_sdvo_connector *intel_sdvo_connector,
2357 struct intel_sdvo_enhancements_reply enhancements)
2358 {
2359 struct drm_device *dev = intel_sdvo->base.base.dev;
2360 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2361 uint16_t response, data_value[2];
2362
2363 /* when horizontal overscan is supported, Add the left/right property */
2364 if (enhancements.overscan_h) {
2365 if (!intel_sdvo_get_value(intel_sdvo,
2366 SDVO_CMD_GET_MAX_OVERSCAN_H,
2367 &data_value, 4))
2368 return false;
2369
2370 if (!intel_sdvo_get_value(intel_sdvo,
2371 SDVO_CMD_GET_OVERSCAN_H,
2372 &response, 2))
2373 return false;
2374
2375 intel_sdvo_connector->max_hscan = data_value[0];
2376 intel_sdvo_connector->left_margin = data_value[0] - response;
2377 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2378 intel_sdvo_connector->left =
2379 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2380 if (!intel_sdvo_connector->left)
2381 return false;
2382
2383 drm_connector_attach_property(connector,
2384 intel_sdvo_connector->left,
2385 intel_sdvo_connector->left_margin);
2386
2387 intel_sdvo_connector->right =
2388 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2389 if (!intel_sdvo_connector->right)
2390 return false;
2391
2392 drm_connector_attach_property(connector,
2393 intel_sdvo_connector->right,
2394 intel_sdvo_connector->right_margin);
2395 DRM_DEBUG_KMS("h_overscan: max %d, "
2396 "default %d, current %d\n",
2397 data_value[0], data_value[1], response);
2398 }
2399
2400 if (enhancements.overscan_v) {
2401 if (!intel_sdvo_get_value(intel_sdvo,
2402 SDVO_CMD_GET_MAX_OVERSCAN_V,
2403 &data_value, 4))
2404 return false;
2405
2406 if (!intel_sdvo_get_value(intel_sdvo,
2407 SDVO_CMD_GET_OVERSCAN_V,
2408 &response, 2))
2409 return false;
2410
2411 intel_sdvo_connector->max_vscan = data_value[0];
2412 intel_sdvo_connector->top_margin = data_value[0] - response;
2413 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2414 intel_sdvo_connector->top =
2415 drm_property_create_range(dev, 0,
2416 "top_margin", 0, data_value[0]);
2417 if (!intel_sdvo_connector->top)
2418 return false;
2419
2420 drm_connector_attach_property(connector,
2421 intel_sdvo_connector->top,
2422 intel_sdvo_connector->top_margin);
2423
2424 intel_sdvo_connector->bottom =
2425 drm_property_create_range(dev, 0,
2426 "bottom_margin", 0, data_value[0]);
2427 if (!intel_sdvo_connector->bottom)
2428 return false;
2429
2430 drm_connector_attach_property(connector,
2431 intel_sdvo_connector->bottom,
2432 intel_sdvo_connector->bottom_margin);
2433 DRM_DEBUG_KMS("v_overscan: max %d, "
2434 "default %d, current %d\n",
2435 data_value[0], data_value[1], response);
2436 }
2437
2438 ENHANCEMENT(hpos, HPOS);
2439 ENHANCEMENT(vpos, VPOS);
2440 ENHANCEMENT(saturation, SATURATION);
2441 ENHANCEMENT(contrast, CONTRAST);
2442 ENHANCEMENT(hue, HUE);
2443 ENHANCEMENT(sharpness, SHARPNESS);
2444 ENHANCEMENT(brightness, BRIGHTNESS);
2445 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2446 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2447 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2448 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2449 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2450
2451 if (enhancements.dot_crawl) {
2452 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2453 return false;
2454
2455 intel_sdvo_connector->max_dot_crawl = 1;
2456 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2457 intel_sdvo_connector->dot_crawl =
2458 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2459 if (!intel_sdvo_connector->dot_crawl)
2460 return false;
2461
2462 drm_connector_attach_property(connector,
2463 intel_sdvo_connector->dot_crawl,
2464 intel_sdvo_connector->cur_dot_crawl);
2465 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2466 }
2467
2468 return true;
2469 }
2470
2471 static bool
2472 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2473 struct intel_sdvo_connector *intel_sdvo_connector,
2474 struct intel_sdvo_enhancements_reply enhancements)
2475 {
2476 struct drm_device *dev = intel_sdvo->base.base.dev;
2477 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2478 uint16_t response, data_value[2];
2479
2480 ENHANCEMENT(brightness, BRIGHTNESS);
2481
2482 return true;
2483 }
2484 #undef ENHANCEMENT
2485
2486 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2487 struct intel_sdvo_connector *intel_sdvo_connector)
2488 {
2489 union {
2490 struct intel_sdvo_enhancements_reply reply;
2491 uint16_t response;
2492 } enhancements;
2493
2494 BUILD_BUG_ON(sizeof(enhancements) != 2);
2495
2496 enhancements.response = 0;
2497 intel_sdvo_get_value(intel_sdvo,
2498 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2499 &enhancements, sizeof(enhancements));
2500 if (enhancements.response == 0) {
2501 DRM_DEBUG_KMS("No enhancement is supported\n");
2502 return true;
2503 }
2504
2505 if (IS_TV(intel_sdvo_connector))
2506 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2507 else if (IS_LVDS(intel_sdvo_connector))
2508 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2509 else
2510 return true;
2511 }
2512
2513 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2514 struct i2c_msg *msgs,
2515 int num)
2516 {
2517 struct intel_sdvo *sdvo = adapter->algo_data;
2518
2519 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2520 return -EIO;
2521
2522 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2523 }
2524
2525 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2526 {
2527 struct intel_sdvo *sdvo = adapter->algo_data;
2528 return sdvo->i2c->algo->functionality(sdvo->i2c);
2529 }
2530
2531 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2532 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2533 .functionality = intel_sdvo_ddc_proxy_func
2534 };
2535
2536 static bool
2537 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2538 struct drm_device *dev)
2539 {
2540 sdvo->ddc.owner = THIS_MODULE;
2541 sdvo->ddc.class = I2C_CLASS_DDC;
2542 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2543 sdvo->ddc.dev.parent = &dev->pdev->dev;
2544 sdvo->ddc.algo_data = sdvo;
2545 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2546
2547 return i2c_add_adapter(&sdvo->ddc) == 0;
2548 }
2549
2550 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2551 {
2552 struct drm_i915_private *dev_priv = dev->dev_private;
2553 struct intel_encoder *intel_encoder;
2554 struct intel_sdvo *intel_sdvo;
2555 u32 hotplug_mask;
2556 int i;
2557
2558 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2559 if (!intel_sdvo)
2560 return false;
2561
2562 intel_sdvo->sdvo_reg = sdvo_reg;
2563 intel_sdvo->is_sdvob = is_sdvob;
2564 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2565 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2566 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2567 kfree(intel_sdvo);
2568 return false;
2569 }
2570
2571 /* encoder type will be decided later */
2572 intel_encoder = &intel_sdvo->base;
2573 intel_encoder->type = INTEL_OUTPUT_SDVO;
2574 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2575
2576 /* Read the regs to test if we can talk to the device */
2577 for (i = 0; i < 0x40; i++) {
2578 u8 byte;
2579
2580 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2581 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2582 SDVO_NAME(intel_sdvo));
2583 goto err;
2584 }
2585 }
2586
2587 hotplug_mask = 0;
2588 if (IS_G4X(dev)) {
2589 hotplug_mask = intel_sdvo->is_sdvob ?
2590 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2591 } else if (IS_GEN4(dev)) {
2592 hotplug_mask = intel_sdvo->is_sdvob ?
2593 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2594 } else {
2595 hotplug_mask = intel_sdvo->is_sdvob ?
2596 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2597 }
2598
2599 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2600
2601 /* In default case sdvo lvds is false */
2602 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2603 goto err;
2604
2605 if (intel_sdvo_output_setup(intel_sdvo,
2606 intel_sdvo->caps.output_flags) != true) {
2607 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2608 SDVO_NAME(intel_sdvo));
2609 goto err;
2610 }
2611
2612 /* Only enable the hotplug irq if we need it, to work around noisy
2613 * hotplug lines.
2614 */
2615 if (intel_sdvo->hotplug_active[0])
2616 dev_priv->hotplug_supported_mask |= hotplug_mask;
2617
2618 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2619
2620 /* Set the input timing to the screen. Assume always input 0. */
2621 if (!intel_sdvo_set_target_input(intel_sdvo))
2622 goto err;
2623
2624 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2625 &intel_sdvo->pixel_clock_min,
2626 &intel_sdvo->pixel_clock_max))
2627 goto err;
2628
2629 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2630 "clock range %dMHz - %dMHz, "
2631 "input 1: %c, input 2: %c, "
2632 "output 1: %c, output 2: %c\n",
2633 SDVO_NAME(intel_sdvo),
2634 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2635 intel_sdvo->caps.device_rev_id,
2636 intel_sdvo->pixel_clock_min / 1000,
2637 intel_sdvo->pixel_clock_max / 1000,
2638 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2639 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2640 /* check currently supported outputs */
2641 intel_sdvo->caps.output_flags &
2642 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2643 intel_sdvo->caps.output_flags &
2644 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2645 return true;
2646
2647 err:
2648 drm_encoder_cleanup(&intel_encoder->base);
2649 i2c_del_adapter(&intel_sdvo->ddc);
2650 kfree(intel_sdvo);
2651
2652 return false;
2653 }
Linux ARM platform port for MOXA ART SoC