2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
26 #include <linux/module.h>
30 #include "drm_crtc_helper.h"
31 #include "nouveau_drv.h"
32 #include "nouveau_abi16.h"
33 #include "nouveau_hw.h"
34 #include "nouveau_fb.h"
35 #include "nouveau_fbcon.h"
36 #include "nouveau_pm.h"
37 #include "nouveau_fifo.h"
38 #include "nv50_display.h"
40 #include "drm_pciids.h"
42 MODULE_PARM_DESC(agpmode
, "AGP mode (0 to disable AGP)");
43 int nouveau_agpmode
= -1;
44 module_param_named(agpmode
, nouveau_agpmode
, int, 0400);
46 MODULE_PARM_DESC(modeset
, "Enable kernel modesetting");
47 int nouveau_modeset
= -1;
48 module_param_named(modeset
, nouveau_modeset
, int, 0400);
50 MODULE_PARM_DESC(vbios
, "Override default VBIOS location");
52 module_param_named(vbios
, nouveau_vbios
, charp
, 0400);
54 MODULE_PARM_DESC(vram_pushbuf
, "Force DMA push buffers to be in VRAM");
55 int nouveau_vram_pushbuf
;
56 module_param_named(vram_pushbuf
, nouveau_vram_pushbuf
, int, 0400);
58 MODULE_PARM_DESC(vram_notify
, "Force DMA notifiers to be in VRAM");
59 int nouveau_vram_notify
= 0;
60 module_param_named(vram_notify
, nouveau_vram_notify
, int, 0400);
62 MODULE_PARM_DESC(vram_type
, "Override detected VRAM type");
63 char *nouveau_vram_type
;
64 module_param_named(vram_type
, nouveau_vram_type
, charp
, 0400);
66 MODULE_PARM_DESC(duallink
, "Allow dual-link TMDS (>=GeForce 8)");
67 int nouveau_duallink
= 1;
68 module_param_named(duallink
, nouveau_duallink
, int, 0400);
70 MODULE_PARM_DESC(uscript_lvds
, "LVDS output script table ID (>=GeForce 8)");
71 int nouveau_uscript_lvds
= -1;
72 module_param_named(uscript_lvds
, nouveau_uscript_lvds
, int, 0400);
74 MODULE_PARM_DESC(uscript_tmds
, "TMDS output script table ID (>=GeForce 8)");
75 int nouveau_uscript_tmds
= -1;
76 module_param_named(uscript_tmds
, nouveau_uscript_tmds
, int, 0400);
78 MODULE_PARM_DESC(ignorelid
, "Ignore ACPI lid status");
79 int nouveau_ignorelid
= 0;
80 module_param_named(ignorelid
, nouveau_ignorelid
, int, 0400);
82 MODULE_PARM_DESC(noaccel
, "Disable all acceleration");
83 int nouveau_noaccel
= -1;
84 module_param_named(noaccel
, nouveau_noaccel
, int, 0400);
86 MODULE_PARM_DESC(nofbaccel
, "Disable fbcon acceleration");
87 int nouveau_nofbaccel
= 0;
88 module_param_named(nofbaccel
, nouveau_nofbaccel
, int, 0400);
90 MODULE_PARM_DESC(force_post
, "Force POST");
91 int nouveau_force_post
= 0;
92 module_param_named(force_post
, nouveau_force_post
, int, 0400);
94 MODULE_PARM_DESC(override_conntype
, "Ignore DCB connector type");
95 int nouveau_override_conntype
= 0;
96 module_param_named(override_conntype
, nouveau_override_conntype
, int, 0400);
98 MODULE_PARM_DESC(tv_disable
, "Disable TV-out detection");
99 int nouveau_tv_disable
= 0;
100 module_param_named(tv_disable
, nouveau_tv_disable
, int, 0400);
102 MODULE_PARM_DESC(tv_norm
, "Default TV norm.\n"
103 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
104 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
106 "\t\t*NOTE* Ignored for cards with external TV encoders.");
107 char *nouveau_tv_norm
;
108 module_param_named(tv_norm
, nouveau_tv_norm
, charp
, 0400);
110 MODULE_PARM_DESC(reg_debug
, "Register access debug bitmask:\n"
111 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
112 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
113 "\t\t0x100 vgaattr, 0x200 EVO (G80+)");
114 int nouveau_reg_debug
;
115 module_param_named(reg_debug
, nouveau_reg_debug
, int, 0600);
117 MODULE_PARM_DESC(perflvl
, "Performance level (default: boot)");
118 char *nouveau_perflvl
;
119 module_param_named(perflvl
, nouveau_perflvl
, charp
, 0400);
121 MODULE_PARM_DESC(perflvl_wr
, "Allow perflvl changes (warning: dangerous!)");
122 int nouveau_perflvl_wr
;
123 module_param_named(perflvl_wr
, nouveau_perflvl_wr
, int, 0400);
125 MODULE_PARM_DESC(msi
, "Enable MSI (default: off)");
127 module_param_named(msi
, nouveau_msi
, int, 0400);
129 MODULE_PARM_DESC(ctxfw
, "Use external HUB/GPC ucode (fermi)");
131 module_param_named(ctxfw
, nouveau_ctxfw
, int, 0400);
133 MODULE_PARM_DESC(mxmdcb
, "Santise DCB table according to MXM-SIS");
134 int nouveau_mxmdcb
= 1;
135 module_param_named(mxmdcb
, nouveau_mxmdcb
, int, 0400);
137 int nouveau_fbpercrtc
;
139 module_param_named(fbpercrtc
, nouveau_fbpercrtc
, int, 0400);
142 static struct pci_device_id pciidlist
[] = {
144 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_ANY_ID
),
145 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
146 .class_mask
= 0xff << 16,
149 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS
, PCI_ANY_ID
),
150 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
151 .class_mask
= 0xff << 16,
156 MODULE_DEVICE_TABLE(pci
, pciidlist
);
158 static struct drm_driver driver
;
161 nouveau_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
163 return drm_get_pci_dev(pdev
, ent
, &driver
);
167 nouveau_pci_remove(struct pci_dev
*pdev
)
169 struct drm_device
*dev
= pci_get_drvdata(pdev
);
175 nouveau_pci_suspend(struct pci_dev
*pdev
, pm_message_t pm_state
)
177 struct drm_device
*dev
= pci_get_drvdata(pdev
);
178 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
179 struct nouveau_instmem_engine
*pinstmem
= &dev_priv
->engine
.instmem
;
180 struct nouveau_fifo_priv
*pfifo
= nv_engine(dev
, NVOBJ_ENGINE_FIFO
);
181 struct nouveau_channel
*chan
;
182 struct drm_crtc
*crtc
;
185 if (pm_state
.event
== PM_EVENT_PRETHAW
)
188 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
191 if (dev
->mode_config
.num_crtc
) {
192 NV_INFO(dev
, "Disabling display...\n");
193 nouveau_display_fini(dev
);
195 NV_INFO(dev
, "Disabling fbcon...\n");
196 nouveau_fbcon_set_suspend(dev
, 1);
199 NV_INFO(dev
, "Unpinning framebuffer(s)...\n");
200 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
201 struct nouveau_framebuffer
*nouveau_fb
;
203 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
204 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
207 nouveau_bo_unpin(nouveau_fb
->nvbo
);
210 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
211 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
213 nouveau_bo_unmap(nv_crtc
->cursor
.nvbo
);
214 nouveau_bo_unpin(nv_crtc
->cursor
.nvbo
);
217 NV_INFO(dev
, "Evicting buffers...\n");
218 ttm_bo_evict_mm(&dev_priv
->ttm
.bdev
, TTM_PL_VRAM
);
220 NV_INFO(dev
, "Idling channels...\n");
221 for (i
= 0; i
< (pfifo
? pfifo
->channels
: 0); i
++) {
222 chan
= dev_priv
->channels
.ptr
[i
];
224 if (chan
&& chan
->pushbuf_bo
)
225 nouveau_channel_idle(chan
);
228 for (e
= NVOBJ_ENGINE_NR
- 1; e
>= 0; e
--) {
229 if (!dev_priv
->eng
[e
])
232 ret
= dev_priv
->eng
[e
]->fini(dev
, e
, true);
234 NV_ERROR(dev
, "... engine %d failed: %d\n", e
, ret
);
239 ret
= pinstmem
->suspend(dev
);
241 NV_ERROR(dev
, "... failed: %d\n", ret
);
245 NV_INFO(dev
, "Suspending GPU objects...\n");
246 ret
= nouveau_gpuobj_suspend(dev
);
248 NV_ERROR(dev
, "... failed: %d\n", ret
);
249 pinstmem
->resume(dev
);
253 NV_INFO(dev
, "And we're gone!\n");
254 pci_save_state(pdev
);
255 if (pm_state
.event
== PM_EVENT_SUSPEND
) {
256 pci_disable_device(pdev
);
257 pci_set_power_state(pdev
, PCI_D3hot
);
263 NV_INFO(dev
, "Re-enabling acceleration..\n");
264 for (e
= e
+ 1; e
< NVOBJ_ENGINE_NR
; e
++) {
265 if (dev_priv
->eng
[e
])
266 dev_priv
->eng
[e
]->init(dev
, e
);
272 nouveau_pci_resume(struct pci_dev
*pdev
)
274 struct drm_device
*dev
= pci_get_drvdata(pdev
);
275 struct nouveau_fifo_priv
*pfifo
= nv_engine(dev
, NVOBJ_ENGINE_FIFO
);
276 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
277 struct nouveau_engine
*engine
= &dev_priv
->engine
;
278 struct drm_crtc
*crtc
;
281 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
284 NV_INFO(dev
, "We're back, enabling device...\n");
285 pci_set_power_state(pdev
, PCI_D0
);
286 pci_restore_state(pdev
);
287 if (pci_enable_device(pdev
))
289 pci_set_master(dev
->pdev
);
291 /* Make sure the AGP controller is in a consistent state */
292 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
)
293 nouveau_mem_reset_agp(dev
);
295 /* Make the CRTCs accessible */
296 engine
->display
.early_init(dev
);
298 NV_INFO(dev
, "POSTing device...\n");
299 ret
= nouveau_run_vbios_init(dev
);
303 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
) {
304 ret
= nouveau_mem_init_agp(dev
);
306 NV_ERROR(dev
, "error reinitialising AGP: %d\n", ret
);
311 NV_INFO(dev
, "Restoring GPU objects...\n");
312 nouveau_gpuobj_resume(dev
);
314 NV_INFO(dev
, "Reinitialising engines...\n");
315 engine
->instmem
.resume(dev
);
316 engine
->mc
.init(dev
);
317 engine
->timer
.init(dev
);
318 engine
->fb
.init(dev
);
319 for (i
= 0; i
< NVOBJ_ENGINE_NR
; i
++) {
320 if (dev_priv
->eng
[i
])
321 dev_priv
->eng
[i
]->init(dev
, i
);
324 nouveau_irq_postinstall(dev
);
326 /* Re-write SKIPS, they'll have been lost over the suspend */
327 if (nouveau_vram_pushbuf
) {
328 struct nouveau_channel
*chan
;
331 for (i
= 0; i
< (pfifo
? pfifo
->channels
: 0); i
++) {
332 chan
= dev_priv
->channels
.ptr
[i
];
333 if (!chan
|| !chan
->pushbuf_bo
)
336 for (j
= 0; j
< NOUVEAU_DMA_SKIPS
; j
++)
337 nouveau_bo_wr32(chan
->pushbuf_bo
, i
, 0);
341 nouveau_pm_resume(dev
);
343 NV_INFO(dev
, "Restoring mode...\n");
344 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
345 struct nouveau_framebuffer
*nouveau_fb
;
347 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
348 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
351 nouveau_bo_pin(nouveau_fb
->nvbo
, TTM_PL_FLAG_VRAM
);
354 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
355 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
357 ret
= nouveau_bo_pin(nv_crtc
->cursor
.nvbo
, TTM_PL_FLAG_VRAM
);
359 ret
= nouveau_bo_map(nv_crtc
->cursor
.nvbo
);
361 NV_ERROR(dev
, "Could not pin/map cursor.\n");
364 if (dev
->mode_config
.num_crtc
) {
365 nouveau_fbcon_set_suspend(dev
, 0);
366 nouveau_fbcon_zfill_all(dev
);
368 nouveau_display_init(dev
);
371 /* Force CLUT to get re-loaded during modeset */
372 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
373 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
375 nv_crtc
->lut
.depth
= 0;
378 drm_helper_resume_force_mode(dev
);
380 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
381 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
382 u32 offset
= nv_crtc
->cursor
.nvbo
->bo
.offset
;
384 nv_crtc
->cursor
.set_offset(nv_crtc
, offset
);
385 nv_crtc
->cursor
.set_pos(nv_crtc
, nv_crtc
->cursor_saved_x
,
386 nv_crtc
->cursor_saved_y
);
392 static struct drm_ioctl_desc nouveau_ioctls
[] = {
393 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM
, nouveau_abi16_ioctl_getparam
, DRM_UNLOCKED
|DRM_AUTH
),
394 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM
, nouveau_abi16_ioctl_setparam
, DRM_UNLOCKED
|DRM_AUTH
|DRM_MASTER
|DRM_ROOT_ONLY
),
395 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC
, nouveau_abi16_ioctl_channel_alloc
, DRM_UNLOCKED
|DRM_AUTH
),
396 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE
, nouveau_abi16_ioctl_channel_free
, DRM_UNLOCKED
|DRM_AUTH
),
397 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC
, nouveau_abi16_ioctl_grobj_alloc
, DRM_UNLOCKED
|DRM_AUTH
),
398 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC
, nouveau_abi16_ioctl_notifierobj_alloc
, DRM_UNLOCKED
|DRM_AUTH
),
399 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE
, nouveau_abi16_ioctl_gpuobj_free
, DRM_UNLOCKED
|DRM_AUTH
),
400 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW
, nouveau_gem_ioctl_new
, DRM_UNLOCKED
|DRM_AUTH
),
401 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF
, nouveau_gem_ioctl_pushbuf
, DRM_UNLOCKED
|DRM_AUTH
),
402 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP
, nouveau_gem_ioctl_cpu_prep
, DRM_UNLOCKED
|DRM_AUTH
),
403 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI
, nouveau_gem_ioctl_cpu_fini
, DRM_UNLOCKED
|DRM_AUTH
),
404 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO
, nouveau_gem_ioctl_info
, DRM_UNLOCKED
|DRM_AUTH
),
407 static const struct file_operations nouveau_driver_fops
= {
408 .owner
= THIS_MODULE
,
410 .release
= drm_release
,
411 .unlocked_ioctl
= drm_ioctl
,
412 .mmap
= nouveau_ttm_mmap
,
414 .fasync
= drm_fasync
,
416 #if defined(CONFIG_COMPAT)
417 .compat_ioctl
= nouveau_compat_ioctl
,
419 .llseek
= noop_llseek
,
422 static struct drm_driver driver
= {
424 DRIVER_USE_AGP
| DRIVER_PCI_DMA
| DRIVER_SG
|
425 DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
| DRIVER_GEM
|
426 DRIVER_MODESET
| DRIVER_PRIME
,
427 .load
= nouveau_load
,
428 .firstopen
= nouveau_firstopen
,
429 .lastclose
= nouveau_lastclose
,
430 .unload
= nouveau_unload
,
431 .open
= nouveau_open
,
432 .preclose
= nouveau_preclose
,
433 .postclose
= nouveau_postclose
,
434 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
435 .debugfs_init
= nouveau_debugfs_init
,
436 .debugfs_cleanup
= nouveau_debugfs_takedown
,
438 .irq_preinstall
= nouveau_irq_preinstall
,
439 .irq_postinstall
= nouveau_irq_postinstall
,
440 .irq_uninstall
= nouveau_irq_uninstall
,
441 .irq_handler
= nouveau_irq_handler
,
442 .get_vblank_counter
= drm_vblank_count
,
443 .enable_vblank
= nouveau_vblank_enable
,
444 .disable_vblank
= nouveau_vblank_disable
,
445 .ioctls
= nouveau_ioctls
,
446 .fops
= &nouveau_driver_fops
,
448 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
449 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
450 .gem_prime_export
= nouveau_gem_prime_export
,
451 .gem_prime_import
= nouveau_gem_prime_import
,
453 .gem_init_object
= nouveau_gem_object_new
,
454 .gem_free_object
= nouveau_gem_object_del
,
455 .gem_open_object
= nouveau_gem_object_open
,
456 .gem_close_object
= nouveau_gem_object_close
,
458 .dumb_create
= nouveau_display_dumb_create
,
459 .dumb_map_offset
= nouveau_display_dumb_map_offset
,
460 .dumb_destroy
= nouveau_display_dumb_destroy
,
465 .date
= GIT_REVISION
,
469 .major
= DRIVER_MAJOR
,
470 .minor
= DRIVER_MINOR
,
471 .patchlevel
= DRIVER_PATCHLEVEL
,
474 static struct pci_driver nouveau_pci_driver
= {
476 .id_table
= pciidlist
,
477 .probe
= nouveau_pci_probe
,
478 .remove
= nouveau_pci_remove
,
479 .suspend
= nouveau_pci_suspend
,
480 .resume
= nouveau_pci_resume
483 static int __init
nouveau_init(void)
485 driver
.num_ioctls
= ARRAY_SIZE(nouveau_ioctls
);
487 if (nouveau_modeset
== -1) {
488 #ifdef CONFIG_VGA_CONSOLE
489 if (vgacon_text_force())
494 if (!nouveau_modeset
)
497 nouveau_register_dsm_handler();
498 return drm_pci_init(&driver
, &nouveau_pci_driver
);
501 static void __exit
nouveau_exit(void)
503 if (!nouveau_modeset
)
506 drm_pci_exit(&driver
, &nouveau_pci_driver
);
507 nouveau_unregister_dsm_handler();
510 module_init(nouveau_init
);
511 module_exit(nouveau_exit
);
513 MODULE_AUTHOR(DRIVER_AUTHOR
);
514 MODULE_DESCRIPTION(DRIVER_DESC
);
515 MODULE_LICENSE("GPL and additional rights");