Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / gpu / drm / nouveau / nvc0_fb.c
blobf376c39310dfb11e00a944577aba9209e4481451
1 /*
2 * Copyright 2011 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
25 #include "drmP.h"
26 #include "drm.h"
27 #include "nouveau_drv.h"
28 #include "nouveau_drm.h"
30 struct nvc0_fb_priv {
31 struct page *r100c10_page;
32 dma_addr_t r100c10;
35 static inline void
36 nvc0_mfb_subp_isr(struct drm_device *dev, int unit, int subp)
38 u32 subp_base = 0x141000 + (unit * 0x2000) + (subp * 0x400);
39 u32 stat = nv_rd32(dev, subp_base + 0x020);
41 if (stat) {
42 NV_INFO(dev, "PMFB%d_SUBP%d: 0x%08x\n", unit, subp, stat);
43 nv_wr32(dev, subp_base + 0x020, stat);
47 static void
48 nvc0_mfb_isr(struct drm_device *dev)
50 u32 units = nv_rd32(dev, 0x00017c);
51 while (units) {
52 u32 subp, unit = ffs(units) - 1;
53 for (subp = 0; subp < 2; subp++)
54 nvc0_mfb_subp_isr(dev, unit, subp);
55 units &= ~(1 << unit);
58 /* we do something horribly wrong and upset PMFB a lot, so mask off
59 * interrupts from it after the first one until it's fixed
61 nv_mask(dev, 0x000640, 0x02000000, 0x00000000);
64 static void
65 nvc0_fb_destroy(struct drm_device *dev)
67 struct drm_nouveau_private *dev_priv = dev->dev_private;
68 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
69 struct nvc0_fb_priv *priv = pfb->priv;
71 nouveau_irq_unregister(dev, 25);
73 if (priv->r100c10_page) {
74 pci_unmap_page(dev->pdev, priv->r100c10, PAGE_SIZE,
75 PCI_DMA_BIDIRECTIONAL);
76 __free_page(priv->r100c10_page);
79 kfree(priv);
80 pfb->priv = NULL;
83 static int
84 nvc0_fb_create(struct drm_device *dev)
86 struct drm_nouveau_private *dev_priv = dev->dev_private;
87 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
88 struct nvc0_fb_priv *priv;
90 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
91 if (!priv)
92 return -ENOMEM;
93 pfb->priv = priv;
95 priv->r100c10_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
96 if (!priv->r100c10_page) {
97 nvc0_fb_destroy(dev);
98 return -ENOMEM;
101 priv->r100c10 = pci_map_page(dev->pdev, priv->r100c10_page, 0,
102 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
103 if (pci_dma_mapping_error(dev->pdev, priv->r100c10)) {
104 nvc0_fb_destroy(dev);
105 return -EFAULT;
108 nouveau_irq_register(dev, 25, nvc0_mfb_isr);
109 return 0;
113 nvc0_fb_init(struct drm_device *dev)
115 struct drm_nouveau_private *dev_priv = dev->dev_private;
116 struct nvc0_fb_priv *priv;
117 int ret;
119 if (!dev_priv->engine.fb.priv) {
120 ret = nvc0_fb_create(dev);
121 if (ret)
122 return ret;
124 priv = dev_priv->engine.fb.priv;
126 nv_wr32(dev, 0x100c10, priv->r100c10 >> 8);
127 nv_mask(dev, 0x17e820, 0x00100000, 0x00000000); /* NV_PLTCG_INTR_EN */
128 return 0;
131 void
132 nvc0_fb_takedown(struct drm_device *dev)
134 nvc0_fb_destroy(dev);