2 * Copyright 2009 Jerome Glisse.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Jerome Glisse
25 #include <drm/radeon_drm.h>
26 #include "radeon_reg.h"
29 #define RADEON_BENCHMARK_COPY_BLIT 1
30 #define RADEON_BENCHMARK_COPY_DMA 0
32 #define RADEON_BENCHMARK_ITERATIONS 1024
33 #define RADEON_BENCHMARK_COMMON_MODES_N 17
35 static int radeon_benchmark_do_move(struct radeon_device
*rdev
, unsigned size
,
36 uint64_t saddr
, uint64_t daddr
,
39 unsigned long start_jiffies
;
40 unsigned long end_jiffies
;
41 struct radeon_fence
*fence
= NULL
;
44 start_jiffies
= jiffies
;
45 for (i
= 0; i
< n
; i
++) {
47 case RADEON_BENCHMARK_COPY_DMA
:
48 r
= radeon_copy_dma(rdev
, saddr
, daddr
,
49 size
/ RADEON_GPU_PAGE_SIZE
,
52 case RADEON_BENCHMARK_COPY_BLIT
:
53 r
= radeon_copy_blit(rdev
, saddr
, daddr
,
54 size
/ RADEON_GPU_PAGE_SIZE
,
58 DRM_ERROR("Unknown copy method\n");
63 r
= radeon_fence_wait(fence
, false);
66 radeon_fence_unref(&fence
);
68 end_jiffies
= jiffies
;
69 r
= jiffies_to_msecs(end_jiffies
- start_jiffies
);
73 radeon_fence_unref(&fence
);
78 static void radeon_benchmark_log_results(int n
, unsigned size
,
80 unsigned sdomain
, unsigned ddomain
,
83 unsigned int throughput
= (n
* (size
>> 10)) / time
;
84 DRM_INFO("radeon: %s %u bo moves of %u kB from"
85 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
86 kind
, n
, size
>> 10, sdomain
, ddomain
, time
,
87 throughput
* 8, throughput
);
90 static void radeon_benchmark_move(struct radeon_device
*rdev
, unsigned size
,
91 unsigned sdomain
, unsigned ddomain
)
93 struct radeon_bo
*dobj
= NULL
;
94 struct radeon_bo
*sobj
= NULL
;
95 uint64_t saddr
, daddr
;
99 n
= RADEON_BENCHMARK_ITERATIONS
;
100 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true, sdomain
, NULL
, &sobj
);
104 r
= radeon_bo_reserve(sobj
, false);
105 if (unlikely(r
!= 0))
107 r
= radeon_bo_pin(sobj
, sdomain
, &saddr
);
108 radeon_bo_unreserve(sobj
);
112 r
= radeon_bo_create(rdev
, size
, PAGE_SIZE
, true, ddomain
, NULL
, &dobj
);
116 r
= radeon_bo_reserve(dobj
, false);
117 if (unlikely(r
!= 0))
119 r
= radeon_bo_pin(dobj
, ddomain
, &daddr
);
120 radeon_bo_unreserve(dobj
);
125 /* r100 doesn't have dma engine so skip the test */
126 /* also, VRAM-to-VRAM test doesn't make much sense for DMA */
127 /* skip it as well if domains are the same */
128 if ((rdev
->asic
->copy
.dma
) && (sdomain
!= ddomain
)) {
129 time
= radeon_benchmark_do_move(rdev
, size
, saddr
, daddr
,
130 RADEON_BENCHMARK_COPY_DMA
, n
);
134 radeon_benchmark_log_results(n
, size
, time
,
135 sdomain
, ddomain
, "dma");
138 time
= radeon_benchmark_do_move(rdev
, size
, saddr
, daddr
,
139 RADEON_BENCHMARK_COPY_BLIT
, n
);
143 radeon_benchmark_log_results(n
, size
, time
,
144 sdomain
, ddomain
, "blit");
148 r
= radeon_bo_reserve(sobj
, false);
149 if (likely(r
== 0)) {
150 radeon_bo_unpin(sobj
);
151 radeon_bo_unreserve(sobj
);
153 radeon_bo_unref(&sobj
);
156 r
= radeon_bo_reserve(dobj
, false);
157 if (likely(r
== 0)) {
158 radeon_bo_unpin(dobj
);
159 radeon_bo_unreserve(dobj
);
161 radeon_bo_unref(&dobj
);
165 DRM_ERROR("Error while benchmarking BO move.\n");
169 void radeon_benchmark(struct radeon_device
*rdev
, int test_number
)
172 int common_modes
[RADEON_BENCHMARK_COMMON_MODES_N
] = {
192 switch (test_number
) {
194 /* simple test, VRAM to GTT and GTT to VRAM */
195 radeon_benchmark_move(rdev
, 1024*1024, RADEON_GEM_DOMAIN_GTT
,
196 RADEON_GEM_DOMAIN_VRAM
);
197 radeon_benchmark_move(rdev
, 1024*1024, RADEON_GEM_DOMAIN_VRAM
,
198 RADEON_GEM_DOMAIN_GTT
);
201 /* simple test, VRAM to VRAM */
202 radeon_benchmark_move(rdev
, 1024*1024, RADEON_GEM_DOMAIN_VRAM
,
203 RADEON_GEM_DOMAIN_VRAM
);
206 /* GTT to VRAM, buffer size sweep, powers of 2 */
207 for (i
= 1; i
<= 16384; i
<<= 1)
208 radeon_benchmark_move(rdev
, i
* RADEON_GPU_PAGE_SIZE
,
209 RADEON_GEM_DOMAIN_GTT
,
210 RADEON_GEM_DOMAIN_VRAM
);
213 /* VRAM to GTT, buffer size sweep, powers of 2 */
214 for (i
= 1; i
<= 16384; i
<<= 1)
215 radeon_benchmark_move(rdev
, i
* RADEON_GPU_PAGE_SIZE
,
216 RADEON_GEM_DOMAIN_VRAM
,
217 RADEON_GEM_DOMAIN_GTT
);
220 /* VRAM to VRAM, buffer size sweep, powers of 2 */
221 for (i
= 1; i
<= 16384; i
<<= 1)
222 radeon_benchmark_move(rdev
, i
* RADEON_GPU_PAGE_SIZE
,
223 RADEON_GEM_DOMAIN_VRAM
,
224 RADEON_GEM_DOMAIN_VRAM
);
227 /* GTT to VRAM, buffer size sweep, common modes */
228 for (i
= 0; i
< RADEON_BENCHMARK_COMMON_MODES_N
; i
++)
229 radeon_benchmark_move(rdev
, common_modes
[i
],
230 RADEON_GEM_DOMAIN_GTT
,
231 RADEON_GEM_DOMAIN_VRAM
);
234 /* VRAM to GTT, buffer size sweep, common modes */
235 for (i
= 0; i
< RADEON_BENCHMARK_COMMON_MODES_N
; i
++)
236 radeon_benchmark_move(rdev
, common_modes
[i
],
237 RADEON_GEM_DOMAIN_VRAM
,
238 RADEON_GEM_DOMAIN_GTT
);
241 /* VRAM to VRAM, buffer size sweep, common modes */
242 for (i
= 0; i
< RADEON_BENCHMARK_COMMON_MODES_N
; i
++)
243 radeon_benchmark_move(rdev
, common_modes
[i
],
244 RADEON_GEM_DOMAIN_VRAM
,
245 RADEON_GEM_DOMAIN_VRAM
);
249 DRM_ERROR("Unknown benchmark\n");