drivers/gpu/drm/radeon/radeon_irq_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_crtc_helper.h"
  30 #include "radeon_drm.h"
  31 #include "radeon_reg.h"
  32 #include "radeon.h"
  33 #include "atom.h"
  34
  35 #define RADEON_WAIT_IDLE_TIMEOUT 200
  36
  37 /**
  38  * radeon_driver_irq_handler_kms - irq handler for KMS
  39  *
  40  * @DRM_IRQ_ARGS: args
  41  *
  42  * This is the irq handler for the radeon KMS driver (all asics).
  43  * radeon_irq_process is a macro that points to the per-asic
  44  * irq handler callback.
  45  */
  46 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  47 {
  48         struct drm_device *dev = (struct drm_device *) arg;
  49         struct radeon_device *rdev = dev->dev_private;
  50
  51         return radeon_irq_process(rdev);
  52 }
  53
  54 /*
  55  * Handle hotplug events outside the interrupt handler proper.
  56  */
  57 /**
  58  * radeon_hotplug_work_func - display hotplug work handler
  59  *
  60  * @work: work struct
  61  *
  62  * This is the hot plug event work handler (all asics).
  63  * The work gets scheduled from the irq handler if there
  64  * was a hot plug interrupt.  It walks the connector table
  65  * and calls the hotplug handler for each one, then sends
  66  * a drm hotplug event to alert userspace.
  67  */
  68 static void radeon_hotplug_work_func(struct work_struct *work)
  69 {
  70         struct radeon_device *rdev = container_of(work, struct radeon_device,
  71                                                   hotplug_work);
  72         struct drm_device *dev = rdev->ddev;
  73         struct drm_mode_config *mode_config = &dev->mode_config;
  74         struct drm_connector *connector;
  75
  76         if (mode_config->num_connector) {
  77                 list_for_each_entry(connector, &mode_config->connector_list, head)
  78                         radeon_connector_hotplug(connector);
  79         }
  80         /* Just fire off a uevent and let userspace tell us what to do */
  81         drm_helper_hpd_irq_event(dev);
  82 }
  83
  84 /**
  85  * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
  86  *
  87  * @dev: drm dev pointer
  88  *
  89  * Gets the hw ready to enable irqs (all asics).
  90  * This function disables all interrupt sources on the GPU.
  91  */
  92 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  93 {
  94         struct radeon_device *rdev = dev->dev_private;
  95         unsigned long irqflags;
  96         unsigned i;
  97
  98         spin_lock_irqsave(&rdev->irq.lock, irqflags);
  99         /* Disable *all* interrupts */
 100         for (i = 0; i < RADEON_NUM_RINGS; i++)
 101                 atomic_set(&rdev->irq.ring_int[i], 0);
 102         rdev->irq.gui_idle = false;
 103         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 104                 rdev->irq.hpd[i] = false;
 105         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 106                 rdev->irq.crtc_vblank_int[i] = false;
 107                 atomic_set(&rdev->irq.pflip[i], 0);
 108                 rdev->irq.afmt[i] = false;
 109         }
 110         radeon_irq_set(rdev);
 111         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 112         /* Clear bits */
 113         radeon_irq_process(rdev);
 114 }
 115
 116 /**
 117  * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
 118  *
 119  * @dev: drm dev pointer
 120  *
 121  * Handles stuff to be done after enabling irqs (all asics).
 122  * Returns 0 on success.
 123  */
 124 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
 125 {
 126         dev->max_vblank_count = 0x001fffff;
 127         return 0;
 128 }
 129
 130 /**
 131  * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
 132  *
 133  * @dev: drm dev pointer
 134  *
 135  * This function disables all interrupt sources on the GPU (all asics).
 136  */
 137 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
 138 {
 139         struct radeon_device *rdev = dev->dev_private;
 140         unsigned long irqflags;
 141         unsigned i;
 142
 143         if (rdev == NULL) {
 144                 return;
 145         }
 146         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 147         /* Disable *all* interrupts */
 148         for (i = 0; i < RADEON_NUM_RINGS; i++)
 149                 atomic_set(&rdev->irq.ring_int[i], 0);
 150         rdev->irq.gui_idle = false;
 151         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 152                 rdev->irq.hpd[i] = false;
 153         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 154                 rdev->irq.crtc_vblank_int[i] = false;
 155                 atomic_set(&rdev->irq.pflip[i], 0);
 156                 rdev->irq.afmt[i] = false;
 157         }
 158         radeon_irq_set(rdev);
 159         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 160 }
 161
 162 /**
 163  * radeon_msi_ok - asic specific msi checks
 164  *
 165  * @rdev: radeon device pointer
 166  *
 167  * Handles asic specific MSI checks to determine if
 168  * MSIs should be enabled on a particular chip (all asics).
 169  * Returns true if MSIs should be enabled, false if MSIs
 170  * should not be enabled.
 171  */
 172 static bool radeon_msi_ok(struct radeon_device *rdev)
 173 {
 174         /* RV370/RV380 was first asic with MSI support */
 175         if (rdev->family < CHIP_RV380)
 176                 return false;
 177
 178         /* MSIs don't work on AGP */
 179         if (rdev->flags & RADEON_IS_AGP)
 180                 return false;
 181
 182         /* force MSI on */
 183         if (radeon_msi == 1)
 184                 return true;
 185         else if (radeon_msi == 0)
 186                 return false;
 187
 188         /* Quirks */
 189         /* HP RS690 only seems to work with MSIs. */
 190         if ((rdev->pdev->device == 0x791f) &&
 191             (rdev->pdev->subsystem_vendor == 0x103c) &&
 192             (rdev->pdev->subsystem_device == 0x30c2))
 193                 return true;
 194
 195         /* Dell RS690 only seems to work with MSIs. */
 196         if ((rdev->pdev->device == 0x791f) &&
 197             (rdev->pdev->subsystem_vendor == 0x1028) &&
 198             (rdev->pdev->subsystem_device == 0x01fc))
 199                 return true;
 200
 201         /* Dell RS690 only seems to work with MSIs. */
 202         if ((rdev->pdev->device == 0x791f) &&
 203             (rdev->pdev->subsystem_vendor == 0x1028) &&
 204             (rdev->pdev->subsystem_device == 0x01fd))
 205                 return true;
 206
 207         /* Gateway RS690 only seems to work with MSIs. */
 208         if ((rdev->pdev->device == 0x791f) &&
 209             (rdev->pdev->subsystem_vendor == 0x107b) &&
 210             (rdev->pdev->subsystem_device == 0x0185))
 211                 return true;
 212
 213         /* try and enable MSIs by default on all RS690s */
 214         if (rdev->family == CHIP_RS690)
 215                 return true;
 216
 217         /* RV515 seems to have MSI issues where it loses
 218          * MSI rearms occasionally. This leads to lockups and freezes.
 219          * disable it by default.
 220          */
 221         if (rdev->family == CHIP_RV515)
 222                 return false;
 223         if (rdev->flags & RADEON_IS_IGP) {
 224                 /* APUs work fine with MSIs */
 225                 if (rdev->family >= CHIP_PALM)
 226                         return true;
 227                 /* lots of IGPs have problems with MSIs */
 228                 return false;
 229         }
 230
 231         return true;
 232 }
 233
 234 /**
 235  * radeon_irq_kms_init - init driver interrupt info
 236  *
 237  * @rdev: radeon device pointer
 238  *
 239  * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
 240  * Returns 0 for success, error for failure.
 241  */
 242 int radeon_irq_kms_init(struct radeon_device *rdev)
 243 {
 244         int r = 0;
 245
 246         INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
 247         INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
 248
 249         spin_lock_init(&rdev->irq.lock);
 250         r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
 251         if (r) {
 252                 return r;
 253         }
 254         /* enable msi */
 255         rdev->msi_enabled = 0;
 256
 257         if (radeon_msi_ok(rdev)) {
 258                 int ret = pci_enable_msi(rdev->pdev);
 259                 if (!ret) {
 260                         rdev->msi_enabled = 1;
 261                         dev_info(rdev->dev, "radeon: using MSI.\n");
 262                 }
 263         }
 264         rdev->irq.installed = true;
 265         r = drm_irq_install(rdev->ddev);
 266         if (r) {
 267                 rdev->irq.installed = false;
 268                 return r;
 269         }
 270         DRM_INFO("radeon: irq initialized.\n");
 271         return 0;
 272 }
 273
 274 /**
 275  * radeon_irq_kms_fini - tear down driver interrrupt info
 276  *
 277  * @rdev: radeon device pointer
 278  *
 279  * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
 280  */
 281 void radeon_irq_kms_fini(struct radeon_device *rdev)
 282 {
 283         drm_vblank_cleanup(rdev->ddev);
 284         if (rdev->irq.installed) {
 285                 drm_irq_uninstall(rdev->ddev);
 286                 rdev->irq.installed = false;
 287                 if (rdev->msi_enabled)
 288                         pci_disable_msi(rdev->pdev);
 289         }
 290         flush_work_sync(&rdev->hotplug_work);
 291 }
 292
 293 /**
 294  * radeon_irq_kms_sw_irq_get - enable software interrupt
 295  *
 296  * @rdev: radeon device pointer
 297  * @ring: ring whose interrupt you want to enable
 298  *
 299  * Enables the software interrupt for a specific ring (all asics).
 300  * The software interrupt is generally used to signal a fence on
 301  * a particular ring.
 302  */
 303 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
 304 {
 305         unsigned long irqflags;
 306
 307         if (!rdev->ddev->irq_enabled)
 308                 return;
 309
 310         if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
 311                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 312                 radeon_irq_set(rdev);
 313                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 314         }
 315 }
 316
 317 /**
 318  * radeon_irq_kms_sw_irq_put - disable software interrupt
 319  *
 320  * @rdev: radeon device pointer
 321  * @ring: ring whose interrupt you want to disable
 322  *
 323  * Disables the software interrupt for a specific ring (all asics).
 324  * The software interrupt is generally used to signal a fence on
 325  * a particular ring.
 326  */
 327 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
 328 {
 329         unsigned long irqflags;
 330
 331         if (!rdev->ddev->irq_enabled)
 332                 return;
 333
 334         if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
 335                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 336                 radeon_irq_set(rdev);
 337                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 338         }
 339 }
 340
 341 /**
 342  * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
 343  *
 344  * @rdev: radeon device pointer
 345  * @crtc: crtc whose interrupt you want to enable
 346  *
 347  * Enables the pageflip interrupt for a specific crtc (all asics).
 348  * For pageflips we use the vblank interrupt source.
 349  */
 350 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
 351 {
 352         unsigned long irqflags;
 353
 354         if (crtc < 0 || crtc >= rdev->num_crtc)
 355                 return;
 356
 357         if (!rdev->ddev->irq_enabled)
 358                 return;
 359
 360         if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
 361                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 362                 radeon_irq_set(rdev);
 363                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 364         }
 365 }
 366
 367 /**
 368  * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
 369  *
 370  * @rdev: radeon device pointer
 371  * @crtc: crtc whose interrupt you want to disable
 372  *
 373  * Disables the pageflip interrupt for a specific crtc (all asics).
 374  * For pageflips we use the vblank interrupt source.
 375  */
 376 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
 377 {
 378         unsigned long irqflags;
 379
 380         if (crtc < 0 || crtc >= rdev->num_crtc)
 381                 return;
 382
 383         if (!rdev->ddev->irq_enabled)
 384                 return;
 385
 386         if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
 387                 spin_lock_irqsave(&rdev->irq.lock, irqflags);
 388                 radeon_irq_set(rdev);
 389                 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 390         }
 391 }
 392
 393 /**
 394  * radeon_irq_kms_enable_afmt - enable audio format change interrupt
 395  *
 396  * @rdev: radeon device pointer
 397  * @block: afmt block whose interrupt you want to enable
 398  *
 399  * Enables the afmt change interrupt for a specific afmt block (all asics).
 400  */
 401 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
 402 {
 403         unsigned long irqflags;
 404
 405         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 406         rdev->irq.afmt[block] = true;
 407         radeon_irq_set(rdev);
 408         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 409
 410 }
 411
 412 /**
 413  * radeon_irq_kms_disable_afmt - disable audio format change interrupt
 414  *
 415  * @rdev: radeon device pointer
 416  * @block: afmt block whose interrupt you want to disable
 417  *
 418  * Disables the afmt change interrupt for a specific afmt block (all asics).
 419  */
 420 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
 421 {
 422         unsigned long irqflags;
 423
 424         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 425         rdev->irq.afmt[block] = false;
 426         radeon_irq_set(rdev);
 427         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 428 }
 429
 430 /**
 431  * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
 432  *
 433  * @rdev: radeon device pointer
 434  * @hpd_mask: mask of hpd pins you want to enable.
 435  *
 436  * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
 437  */
 438 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 439 {
 440         unsigned long irqflags;
 441         int i;
 442
 443         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 444         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 445                 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
 446         radeon_irq_set(rdev);
 447         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 448 }
 449
 450 /**
 451  * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
 452  *
 453  * @rdev: radeon device pointer
 454  * @hpd_mask: mask of hpd pins you want to disable.
 455  *
 456  * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
 457  */
 458 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
 459 {
 460         unsigned long irqflags;
 461         int i;
 462
 463         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 464         for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
 465                 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
 466         radeon_irq_set(rdev);
 467         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 468 }
 469
 470 /**
 471  * radeon_irq_kms_wait_gui_idle - waits for drawing engine to be idle
 472  *
 473  * @rdev: radeon device pointer
 474  *
 475  * Enabled the GUI idle interrupt and waits for it to fire (r6xx+).
 476  * This is currently used to make sure the 3D engine is idle for power
 477  * management, but should be replaces with proper fence waits.
 478  * GUI idle interrupts don't work very well on pre-r6xx hw and it also
 479  * does not take into account other aspects of the chip that may be busy.
 480  * DO NOT USE GOING FORWARD.
 481  */
 482 int radeon_irq_kms_wait_gui_idle(struct radeon_device *rdev)
 483 {
 484         unsigned long irqflags;
 485         int r;
 486
 487         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 488         rdev->irq.gui_idle = true;
 489         radeon_irq_set(rdev);
 490         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 491
 492         r = wait_event_timeout(rdev->irq.idle_queue, radeon_gui_idle(rdev),
 493                                msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT));
 494
 495         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 496         rdev->irq.gui_idle = false;
 497         radeon_irq_set(rdev);
 498         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 499         return r;
 500 }