drivers/media/dvb/frontends/af9033.c

   1 /*
   2  * Afatech AF9033 demodulator driver
   3  *
   4  * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
   5  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
   6  *
   7  *    This program is free software; you can redistribute it and/or modify
   8  *    it under the terms of the GNU General Public License as published by
   9  *    the Free Software Foundation; either version 2 of the License, or
  10  *    (at your option) any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  *
  17  *    You should have received a copy of the GNU General Public License along
  18  *    with this program; if not, write to the Free Software Foundation, Inc.,
  19  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20  */
  21
  22 #include "af9033_priv.h"
  23
  24 struct af9033_state {
  25         struct i2c_adapter *i2c;
  26         struct dvb_frontend fe;
  27         struct af9033_config cfg;
  28
  29         u32 bandwidth_hz;
  30         bool ts_mode_parallel;
  31         bool ts_mode_serial;
  32
  33         u32 ber;
  34         u32 ucb;
  35         unsigned long last_stat_check;
  36 };
  37
  38 /* write multiple registers */
  39 static int af9033_wr_regs(struct af9033_state *state, u32 reg, const u8 *val,
  40                 int len)
  41 {
  42         int ret;
  43         u8 buf[3 + len];
  44         struct i2c_msg msg[1] = {
  45                 {
  46                         .addr = state->cfg.i2c_addr,
  47                         .flags = 0,
  48                         .len = sizeof(buf),
  49                         .buf = buf,
  50                 }
  51         };
  52
  53         buf[0] = (reg >> 16) & 0xff;
  54         buf[1] = (reg >>  8) & 0xff;
  55         buf[2] = (reg >>  0) & 0xff;
  56         memcpy(&buf[3], val, len);
  57
  58         ret = i2c_transfer(state->i2c, msg, 1);
  59         if (ret == 1) {
  60                 ret = 0;
  61         } else {
  62                 printk(KERN_WARNING "%s: i2c wr failed=%d reg=%06x len=%d\n",
  63                                 __func__, ret, reg, len);
  64                 ret = -EREMOTEIO;
  65         }
  66
  67         return ret;
  68 }
  69
  70 /* read multiple registers */
  71 static int af9033_rd_regs(struct af9033_state *state, u32 reg, u8 *val, int len)
  72 {
  73         int ret;
  74         u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff,
  75                         (reg >> 0) & 0xff };
  76         struct i2c_msg msg[2] = {
  77                 {
  78                         .addr = state->cfg.i2c_addr,
  79                         .flags = 0,
  80                         .len = sizeof(buf),
  81                         .buf = buf
  82                 }, {
  83                         .addr = state->cfg.i2c_addr,
  84                         .flags = I2C_M_RD,
  85                         .len = len,
  86                         .buf = val
  87                 }
  88         };
  89
  90         ret = i2c_transfer(state->i2c, msg, 2);
  91         if (ret == 2) {
  92                 ret = 0;
  93         } else {
  94                 printk(KERN_WARNING "%s: i2c rd failed=%d reg=%06x len=%d\n",
  95                                 __func__, ret, reg, len);
  96                 ret = -EREMOTEIO;
  97         }
  98
  99         return ret;
 100 }
 101
 102
 103 /* write single register */
 104 static int af9033_wr_reg(struct af9033_state *state, u32 reg, u8 val)
 105 {
 106         return af9033_wr_regs(state, reg, &val, 1);
 107 }
 108
 109 /* read single register */
 110 static int af9033_rd_reg(struct af9033_state *state, u32 reg, u8 *val)
 111 {
 112         return af9033_rd_regs(state, reg, val, 1);
 113 }
 114
 115 /* write single register with mask */
 116 static int af9033_wr_reg_mask(struct af9033_state *state, u32 reg, u8 val,
 117                 u8 mask)
 118 {
 119         int ret;
 120         u8 tmp;
 121
 122         /* no need for read if whole reg is written */
 123         if (mask != 0xff) {
 124                 ret = af9033_rd_regs(state, reg, &tmp, 1);
 125                 if (ret)
 126                         return ret;
 127
 128                 val &= mask;
 129                 tmp &= ~mask;
 130                 val |= tmp;
 131         }
 132
 133         return af9033_wr_regs(state, reg, &val, 1);
 134 }
 135
 136 /* read single register with mask */
 137 static int af9033_rd_reg_mask(struct af9033_state *state, u32 reg, u8 *val,
 138                 u8 mask)
 139 {
 140         int ret, i;
 141         u8 tmp;
 142
 143         ret = af9033_rd_regs(state, reg, &tmp, 1);
 144         if (ret)
 145                 return ret;
 146
 147         tmp &= mask;
 148
 149         /* find position of the first bit */
 150         for (i = 0; i < 8; i++) {
 151                 if ((mask >> i) & 0x01)
 152                         break;
 153         }
 154         *val = tmp >> i;
 155
 156         return 0;
 157 }
 158
 159 static u32 af9033_div(u32 a, u32 b, u32 x)
 160 {
 161         u32 r = 0, c = 0, i;
 162
 163         pr_debug("%s: a=%d b=%d x=%d\n", __func__, a, b, x);
 164
 165         if (a > b) {
 166                 c = a / b;
 167                 a = a - c * b;
 168         }
 169
 170         for (i = 0; i < x; i++) {
 171                 if (a >= b) {
 172                         r += 1;
 173                         a -= b;
 174                 }
 175                 a <<= 1;
 176                 r <<= 1;
 177         }
 178         r = (c << (u32)x) + r;
 179
 180         pr_debug("%s: a=%d b=%d x=%d r=%d r=%x\n", __func__, a, b, x, r, r);
 181
 182         return r;
 183 }
 184
 185 static void af9033_release(struct dvb_frontend *fe)
 186 {
 187         struct af9033_state *state = fe->demodulator_priv;
 188
 189         kfree(state);
 190 }
 191
 192 static int af9033_init(struct dvb_frontend *fe)
 193 {
 194         struct af9033_state *state = fe->demodulator_priv;
 195         int ret, i, len;
 196         const struct reg_val *init;
 197         u8 buf[4];
 198         u32 adc_cw, clock_cw;
 199         struct reg_val_mask tab[] = {
 200                 { 0x80fb24, 0x00, 0x08 },
 201                 { 0x80004c, 0x00, 0xff },
 202                 { 0x00f641, state->cfg.tuner, 0xff },
 203                 { 0x80f5ca, 0x01, 0x01 },
 204                 { 0x80f715, 0x01, 0x01 },
 205                 { 0x00f41f, 0x04, 0x04 },
 206                 { 0x00f41a, 0x01, 0x01 },
 207                 { 0x80f731, 0x00, 0x01 },
 208                 { 0x00d91e, 0x00, 0x01 },
 209                 { 0x00d919, 0x00, 0x01 },
 210                 { 0x80f732, 0x00, 0x01 },
 211                 { 0x00d91f, 0x00, 0x01 },
 212                 { 0x00d91a, 0x00, 0x01 },
 213                 { 0x80f730, 0x00, 0x01 },
 214                 { 0x80f778, 0x00, 0xff },
 215                 { 0x80f73c, 0x01, 0x01 },
 216                 { 0x80f776, 0x00, 0x01 },
 217                 { 0x00d8fd, 0x01, 0xff },
 218                 { 0x00d830, 0x01, 0xff },
 219                 { 0x00d831, 0x00, 0xff },
 220                 { 0x00d832, 0x00, 0xff },
 221                 { 0x80f985, state->ts_mode_serial, 0x01 },
 222                 { 0x80f986, state->ts_mode_parallel, 0x01 },
 223                 { 0x00d827, 0x00, 0xff },
 224                 { 0x00d829, 0x00, 0xff },
 225         };
 226
 227         /* program clock control */
 228         clock_cw = af9033_div(state->cfg.clock, 1000000ul, 19ul);
 229         buf[0] = (clock_cw >>  0) & 0xff;
 230         buf[1] = (clock_cw >>  8) & 0xff;
 231         buf[2] = (clock_cw >> 16) & 0xff;
 232         buf[3] = (clock_cw >> 24) & 0xff;
 233
 234         pr_debug("%s: clock=%d clock_cw=%08x\n", __func__, state->cfg.clock,
 235                         clock_cw);
 236
 237         ret = af9033_wr_regs(state, 0x800025, buf, 4);
 238         if (ret < 0)
 239                 goto err;
 240
 241         /* program ADC control */
 242         for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 243                 if (clock_adc_lut[i].clock == state->cfg.clock)
 244                         break;
 245         }
 246
 247         adc_cw = af9033_div(clock_adc_lut[i].adc, 1000000ul, 19ul);
 248         buf[0] = (adc_cw >>  0) & 0xff;
 249         buf[1] = (adc_cw >>  8) & 0xff;
 250         buf[2] = (adc_cw >> 16) & 0xff;
 251
 252         pr_debug("%s: adc=%d adc_cw=%06x\n", __func__, clock_adc_lut[i].adc,
 253                         adc_cw);
 254
 255         ret = af9033_wr_regs(state, 0x80f1cd, buf, 3);
 256         if (ret < 0)
 257                 goto err;
 258
 259         /* program register table */
 260         for (i = 0; i < ARRAY_SIZE(tab); i++) {
 261                 ret = af9033_wr_reg_mask(state, tab[i].reg, tab[i].val,
 262                                 tab[i].mask);
 263                 if (ret < 0)
 264                         goto err;
 265         }
 266
 267         /* settings for TS interface */
 268         if (state->cfg.ts_mode == AF9033_TS_MODE_USB) {
 269                 ret = af9033_wr_reg_mask(state, 0x80f9a5, 0x00, 0x01);
 270                 if (ret < 0)
 271                         goto err;
 272
 273                 ret = af9033_wr_reg_mask(state, 0x80f9b5, 0x01, 0x01);
 274                 if (ret < 0)
 275                         goto err;
 276         } else {
 277                 ret = af9033_wr_reg_mask(state, 0x80f990, 0x00, 0x01);
 278                 if (ret < 0)
 279                         goto err;
 280
 281                 ret = af9033_wr_reg_mask(state, 0x80f9b5, 0x00, 0x01);
 282                 if (ret < 0)
 283                         goto err;
 284         }
 285
 286         /* load OFSM settings */
 287         pr_debug("%s: load ofsm settings\n", __func__);
 288         len = ARRAY_SIZE(ofsm_init);
 289         init = ofsm_init;
 290         for (i = 0; i < len; i++) {
 291                 ret = af9033_wr_reg(state, init[i].reg, init[i].val);
 292                 if (ret < 0)
 293                         goto err;
 294         }
 295
 296         /* load tuner specific settings */
 297         pr_debug("%s: load tuner specific settings\n",
 298                         __func__);
 299         switch (state->cfg.tuner) {
 300         case AF9033_TUNER_TUA9001:
 301                 len = ARRAY_SIZE(tuner_init_tua9001);
 302                 init = tuner_init_tua9001;
 303                 break;
 304         case AF9033_TUNER_FC0011:
 305                 len = ARRAY_SIZE(tuner_init_fc0011);
 306                 init = tuner_init_fc0011;
 307                 break;
 308         case AF9033_TUNER_MXL5007T:
 309                 len = ARRAY_SIZE(tuner_init_mxl5007t);
 310                 init = tuner_init_mxl5007t;
 311                 break;
 312         case AF9033_TUNER_TDA18218:
 313                 len = ARRAY_SIZE(tuner_init_tda18218);
 314                 init = tuner_init_tda18218;
 315                 break;
 316         default:
 317                 pr_debug("%s: unsupported tuner ID=%d\n", __func__,
 318                                 state->cfg.tuner);
 319                 ret = -ENODEV;
 320                 goto err;
 321         }
 322
 323         for (i = 0; i < len; i++) {
 324                 ret = af9033_wr_reg(state, init[i].reg, init[i].val);
 325                 if (ret < 0)
 326                         goto err;
 327         }
 328
 329         state->bandwidth_hz = 0; /* force to program all parameters */
 330
 331         return 0;
 332
 333 err:
 334         pr_debug("%s: failed=%d\n", __func__, ret);
 335
 336         return ret;
 337 }
 338
 339 static int af9033_sleep(struct dvb_frontend *fe)
 340 {
 341         struct af9033_state *state = fe->demodulator_priv;
 342         int ret, i;
 343         u8 tmp;
 344
 345         ret = af9033_wr_reg(state, 0x80004c, 1);
 346         if (ret < 0)
 347                 goto err;
 348
 349         ret = af9033_wr_reg(state, 0x800000, 0);
 350         if (ret < 0)
 351                 goto err;
 352
 353         for (i = 100, tmp = 1; i && tmp; i--) {
 354                 ret = af9033_rd_reg(state, 0x80004c, &tmp);
 355                 if (ret < 0)
 356                         goto err;
 357
 358                 usleep_range(200, 10000);
 359         }
 360
 361         pr_debug("%s: loop=%d\n", __func__, i);
 362
 363         if (i == 0) {
 364                 ret = -ETIMEDOUT;
 365                 goto err;
 366         }
 367
 368         ret = af9033_wr_reg_mask(state, 0x80fb24, 0x08, 0x08);
 369         if (ret < 0)
 370                 goto err;
 371
 372         /* prevent current leak (?) */
 373         if (state->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 374                 /* enable parallel TS */
 375                 ret = af9033_wr_reg_mask(state, 0x00d917, 0x00, 0x01);
 376                 if (ret < 0)
 377                         goto err;
 378
 379                 ret = af9033_wr_reg_mask(state, 0x00d916, 0x01, 0x01);
 380                 if (ret < 0)
 381                         goto err;
 382         }
 383
 384         return 0;
 385
 386 err:
 387         pr_debug("%s: failed=%d\n", __func__, ret);
 388
 389         return ret;
 390 }
 391
 392 static int af9033_get_tune_settings(struct dvb_frontend *fe,
 393                 struct dvb_frontend_tune_settings *fesettings)
 394 {
 395         fesettings->min_delay_ms = 800;
 396         fesettings->step_size = 0;
 397         fesettings->max_drift = 0;
 398
 399         return 0;
 400 }
 401
 402 static int af9033_set_frontend(struct dvb_frontend *fe)
 403 {
 404         struct af9033_state *state = fe->demodulator_priv;
 405         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 406         int ret, i, spec_inv;
 407         u8 tmp, buf[3], bandwidth_reg_val;
 408         u32 if_frequency, freq_cw, adc_freq;
 409
 410         pr_debug("%s: frequency=%d bandwidth_hz=%d\n", __func__, c->frequency,
 411                         c->bandwidth_hz);
 412
 413         /* check bandwidth */
 414         switch (c->bandwidth_hz) {
 415         case 6000000:
 416                 bandwidth_reg_val = 0x00;
 417                 break;
 418         case 7000000:
 419                 bandwidth_reg_val = 0x01;
 420                 break;
 421         case 8000000:
 422                 bandwidth_reg_val = 0x02;
 423                 break;
 424         default:
 425                 pr_debug("%s: invalid bandwidth_hz\n", __func__);
 426                 ret = -EINVAL;
 427                 goto err;
 428         }
 429
 430         /* program tuner */
 431         if (fe->ops.tuner_ops.set_params)
 432                 fe->ops.tuner_ops.set_params(fe);
 433
 434         /* program CFOE coefficients */
 435         if (c->bandwidth_hz != state->bandwidth_hz) {
 436                 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
 437                         if (coeff_lut[i].clock == state->cfg.clock &&
 438                                 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
 439                                 break;
 440                         }
 441                 }
 442                 ret =  af9033_wr_regs(state, 0x800001,
 443                                 coeff_lut[i].val, sizeof(coeff_lut[i].val));
 444         }
 445
 446         /* program frequency control */
 447         if (c->bandwidth_hz != state->bandwidth_hz) {
 448                 spec_inv = state->cfg.spec_inv ? -1 : 1;
 449
 450                 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 451                         if (clock_adc_lut[i].clock == state->cfg.clock)
 452                                 break;
 453                 }
 454                 adc_freq = clock_adc_lut[i].adc;
 455
 456                 /* get used IF frequency */
 457                 if (fe->ops.tuner_ops.get_if_frequency)
 458                         fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
 459                 else
 460                         if_frequency = 0;
 461
 462                 while (if_frequency > (adc_freq / 2))
 463                         if_frequency -= adc_freq;
 464
 465                 if (if_frequency >= 0)
 466                         spec_inv *= -1;
 467                 else
 468                         if_frequency *= -1;
 469
 470                 freq_cw = af9033_div(if_frequency, adc_freq, 23ul);
 471
 472                 if (spec_inv == -1)
 473                         freq_cw *= -1;
 474
 475                 /* get adc multiplies */
 476                 ret = af9033_rd_reg(state, 0x800045, &tmp);
 477                 if (ret < 0)
 478                         goto err;
 479
 480                 if (tmp == 1)
 481                         freq_cw /= 2;
 482
 483                 buf[0] = (freq_cw >>  0) & 0xff;
 484                 buf[1] = (freq_cw >>  8) & 0xff;
 485                 buf[2] = (freq_cw >> 16) & 0x7f;
 486                 ret = af9033_wr_regs(state, 0x800029, buf, 3);
 487                 if (ret < 0)
 488                         goto err;
 489
 490                 state->bandwidth_hz = c->bandwidth_hz;
 491         }
 492
 493         ret = af9033_wr_reg_mask(state, 0x80f904, bandwidth_reg_val, 0x03);
 494         if (ret < 0)
 495                 goto err;
 496
 497         ret = af9033_wr_reg(state, 0x800040, 0x00);
 498         if (ret < 0)
 499                 goto err;
 500
 501         ret = af9033_wr_reg(state, 0x800047, 0x00);
 502         if (ret < 0)
 503                 goto err;
 504
 505         ret = af9033_wr_reg_mask(state, 0x80f999, 0x00, 0x01);
 506         if (ret < 0)
 507                 goto err;
 508
 509         if (c->frequency <= 230000000)
 510                 tmp = 0x00; /* VHF */
 511         else
 512                 tmp = 0x01; /* UHF */
 513
 514         ret = af9033_wr_reg(state, 0x80004b, tmp);
 515         if (ret < 0)
 516                 goto err;
 517
 518         ret = af9033_wr_reg(state, 0x800000, 0x00);
 519         if (ret < 0)
 520                 goto err;
 521
 522         return 0;
 523
 524 err:
 525         pr_debug("%s: failed=%d\n", __func__, ret);
 526
 527         return ret;
 528 }
 529
 530 static int af9033_get_frontend(struct dvb_frontend *fe)
 531 {
 532         struct af9033_state *state = fe->demodulator_priv;
 533         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 534         int ret;
 535         u8 buf[8];
 536
 537         pr_debug("%s\n", __func__);
 538
 539         /* read all needed registers */
 540         ret = af9033_rd_regs(state, 0x80f900, buf, sizeof(buf));
 541         if (ret < 0)
 542                 goto err;
 543
 544         switch ((buf[0] >> 0) & 3) {
 545         case 0:
 546                 c->transmission_mode = TRANSMISSION_MODE_2K;
 547                 break;
 548         case 1:
 549                 c->transmission_mode = TRANSMISSION_MODE_8K;
 550                 break;
 551         }
 552
 553         switch ((buf[1] >> 0) & 3) {
 554         case 0:
 555                 c->guard_interval = GUARD_INTERVAL_1_32;
 556                 break;
 557         case 1:
 558                 c->guard_interval = GUARD_INTERVAL_1_16;
 559                 break;
 560         case 2:
 561                 c->guard_interval = GUARD_INTERVAL_1_8;
 562                 break;
 563         case 3:
 564                 c->guard_interval = GUARD_INTERVAL_1_4;
 565                 break;
 566         }
 567
 568         switch ((buf[2] >> 0) & 7) {
 569         case 0:
 570                 c->hierarchy = HIERARCHY_NONE;
 571                 break;
 572         case 1:
 573                 c->hierarchy = HIERARCHY_1;
 574                 break;
 575         case 2:
 576                 c->hierarchy = HIERARCHY_2;
 577                 break;
 578         case 3:
 579                 c->hierarchy = HIERARCHY_4;
 580                 break;
 581         }
 582
 583         switch ((buf[3] >> 0) & 3) {
 584         case 0:
 585                 c->modulation = QPSK;
 586                 break;
 587         case 1:
 588                 c->modulation = QAM_16;
 589                 break;
 590         case 2:
 591                 c->modulation = QAM_64;
 592                 break;
 593         }
 594
 595         switch ((buf[4] >> 0) & 3) {
 596         case 0:
 597                 c->bandwidth_hz = 6000000;
 598                 break;
 599         case 1:
 600                 c->bandwidth_hz = 7000000;
 601                 break;
 602         case 2:
 603                 c->bandwidth_hz = 8000000;
 604                 break;
 605         }
 606
 607         switch ((buf[6] >> 0) & 7) {
 608         case 0:
 609                 c->code_rate_HP = FEC_1_2;
 610                 break;
 611         case 1:
 612                 c->code_rate_HP = FEC_2_3;
 613                 break;
 614         case 2:
 615                 c->code_rate_HP = FEC_3_4;
 616                 break;
 617         case 3:
 618                 c->code_rate_HP = FEC_5_6;
 619                 break;
 620         case 4:
 621                 c->code_rate_HP = FEC_7_8;
 622                 break;
 623         case 5:
 624                 c->code_rate_HP = FEC_NONE;
 625                 break;
 626         }
 627
 628         switch ((buf[7] >> 0) & 7) {
 629         case 0:
 630                 c->code_rate_LP = FEC_1_2;
 631                 break;
 632         case 1:
 633                 c->code_rate_LP = FEC_2_3;
 634                 break;
 635         case 2:
 636                 c->code_rate_LP = FEC_3_4;
 637                 break;
 638         case 3:
 639                 c->code_rate_LP = FEC_5_6;
 640                 break;
 641         case 4:
 642                 c->code_rate_LP = FEC_7_8;
 643                 break;
 644         case 5:
 645                 c->code_rate_LP = FEC_NONE;
 646                 break;
 647         }
 648
 649         return 0;
 650
 651 err:
 652         pr_debug("%s: failed=%d\n", __func__, ret);
 653
 654         return ret;
 655 }
 656
 657 static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
 658 {
 659         struct af9033_state *state = fe->demodulator_priv;
 660         int ret;
 661         u8 tmp;
 662
 663         *status = 0;
 664
 665         /* radio channel status, 0=no result, 1=has signal, 2=no signal */
 666         ret = af9033_rd_reg(state, 0x800047, &tmp);
 667         if (ret < 0)
 668                 goto err;
 669
 670         /* has signal */
 671         if (tmp == 0x01)
 672                 *status |= FE_HAS_SIGNAL;
 673
 674         if (tmp != 0x02) {
 675                 /* TPS lock */
 676                 ret = af9033_rd_reg_mask(state, 0x80f5a9, &tmp, 0x01);
 677                 if (ret < 0)
 678                         goto err;
 679
 680                 if (tmp)
 681                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 682                                         FE_HAS_VITERBI;
 683
 684                 /* full lock */
 685                 ret = af9033_rd_reg_mask(state, 0x80f999, &tmp, 0x01);
 686                 if (ret < 0)
 687                         goto err;
 688
 689                 if (tmp)
 690                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 691                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 692                                         FE_HAS_LOCK;
 693         }
 694
 695         return 0;
 696
 697 err:
 698         pr_debug("%s: failed=%d\n", __func__, ret);
 699
 700         return ret;
 701 }
 702
 703 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
 704 {
 705         struct af9033_state *state = fe->demodulator_priv;
 706         int ret, i, len;
 707         u8 buf[3], tmp;
 708         u32 snr_val;
 709         const struct val_snr *uninitialized_var(snr_lut);
 710
 711         /* read value */
 712         ret = af9033_rd_regs(state, 0x80002c, buf, 3);
 713         if (ret < 0)
 714                 goto err;
 715
 716         snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0];
 717
 718         /* read current modulation */
 719         ret = af9033_rd_reg(state, 0x80f903, &tmp);
 720         if (ret < 0)
 721                 goto err;
 722
 723         switch ((tmp >> 0) & 3) {
 724         case 0:
 725                 len = ARRAY_SIZE(qpsk_snr_lut);
 726                 snr_lut = qpsk_snr_lut;
 727                 break;
 728         case 1:
 729                 len = ARRAY_SIZE(qam16_snr_lut);
 730                 snr_lut = qam16_snr_lut;
 731                 break;
 732         case 2:
 733                 len = ARRAY_SIZE(qam64_snr_lut);
 734                 snr_lut = qam64_snr_lut;
 735                 break;
 736         default:
 737                 goto err;
 738         }
 739
 740         for (i = 0; i < len; i++) {
 741                 tmp = snr_lut[i].snr;
 742
 743                 if (snr_val < snr_lut[i].val)
 744                         break;
 745         }
 746
 747         *snr = tmp * 10; /* dB/10 */
 748
 749         return 0;
 750
 751 err:
 752         pr_debug("%s: failed=%d\n", __func__, ret);
 753
 754         return ret;
 755 }
 756
 757 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 758 {
 759         struct af9033_state *state = fe->demodulator_priv;
 760         int ret;
 761         u8 strength2;
 762
 763         /* read signal strength of 0-100 scale */
 764         ret = af9033_rd_reg(state, 0x800048, &strength2);
 765         if (ret < 0)
 766                 goto err;
 767
 768         /* scale value to 0x0000-0xffff */
 769         *strength = strength2 * 0xffff / 100;
 770
 771         return 0;
 772
 773 err:
 774         pr_debug("%s: failed=%d\n", __func__, ret);
 775
 776         return ret;
 777 }
 778
 779 static int af9033_update_ch_stat(struct af9033_state *state)
 780 {
 781         int ret = 0;
 782         u32 err_cnt, bit_cnt;
 783         u16 abort_cnt;
 784         u8 buf[7];
 785
 786         /* only update data every half second */
 787         if (time_after(jiffies, state->last_stat_check + msecs_to_jiffies(500))) {
 788                 ret = af9033_rd_regs(state, 0x800032, buf, sizeof(buf));
 789                 if (ret < 0)
 790                         goto err;
 791                 /* in 8 byte packets? */
 792                 abort_cnt = (buf[1] << 8) + buf[0];
 793                 /* in bits */
 794                 err_cnt = (buf[4] << 16) + (buf[3] << 8) + buf[2];
 795                 /* in 8 byte packets? always(?) 0x2710 = 10000 */
 796                 bit_cnt = (buf[6] << 8) + buf[5];
 797
 798                 if (bit_cnt < abort_cnt) {
 799                         abort_cnt = 1000;
 800                         state->ber = 0xffffffff;
 801                 } else {
 802                         /* 8 byte packets, that have not been rejected already */
 803                         bit_cnt -= (u32)abort_cnt;
 804                         if (bit_cnt == 0) {
 805                                 state->ber = 0xffffffff;
 806                         } else {
 807                                 err_cnt -= (u32)abort_cnt * 8 * 8;
 808                                 bit_cnt *= 8 * 8;
 809                                 state->ber = err_cnt * (0xffffffff / bit_cnt);
 810                         }
 811                 }
 812                 state->ucb += abort_cnt;
 813                 state->last_stat_check = jiffies;
 814         }
 815
 816         return 0;
 817 err:
 818         pr_debug("%s: failed=%d\n", __func__, ret);
 819         return ret;
 820 }
 821
 822 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
 823 {
 824         struct af9033_state *state = fe->demodulator_priv;
 825         int ret;
 826
 827         ret = af9033_update_ch_stat(state);
 828         if (ret < 0)
 829                 return ret;
 830
 831         *ber = state->ber;
 832
 833         return 0;
 834 }
 835
 836 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 837 {
 838         struct af9033_state *state = fe->demodulator_priv;
 839         int ret;
 840
 841         ret = af9033_update_ch_stat(state);
 842         if (ret < 0)
 843                 return ret;
 844
 845         *ucblocks = state->ucb;
 846
 847         return 0;
 848 }
 849
 850 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 851 {
 852         struct af9033_state *state = fe->demodulator_priv;
 853         int ret;
 854
 855         pr_debug("%s: enable=%d\n", __func__, enable);
 856
 857         ret = af9033_wr_reg_mask(state, 0x00fa04, enable, 0x01);
 858         if (ret < 0)
 859                 goto err;
 860
 861         return 0;
 862
 863 err:
 864         pr_debug("%s: failed=%d\n", __func__, ret);
 865
 866         return ret;
 867 }
 868
 869 static struct dvb_frontend_ops af9033_ops;
 870
 871 struct dvb_frontend *af9033_attach(const struct af9033_config *config,
 872                 struct i2c_adapter *i2c)
 873 {
 874         int ret;
 875         struct af9033_state *state;
 876         u8 buf[8];
 877
 878         pr_debug("%s:\n", __func__);
 879
 880         /* allocate memory for the internal state */
 881         state = kzalloc(sizeof(struct af9033_state), GFP_KERNEL);
 882         if (state == NULL)
 883                 goto err;
 884
 885         /* setup the state */
 886         state->i2c = i2c;
 887         memcpy(&state->cfg, config, sizeof(struct af9033_config));
 888
 889         if (state->cfg.clock != 12000000) {
 890                 printk(KERN_INFO "af9033: unsupported clock=%d, only " \
 891                                 "12000000 Hz is supported currently\n",
 892                                 state->cfg.clock);
 893                 goto err;
 894         }
 895
 896         /* firmware version */
 897         ret = af9033_rd_regs(state, 0x0083e9, &buf[0], 4);
 898         if (ret < 0)
 899                 goto err;
 900
 901         ret = af9033_rd_regs(state, 0x804191, &buf[4], 4);
 902         if (ret < 0)
 903                 goto err;
 904
 905         printk(KERN_INFO "af9033: firmware version: LINK=%d.%d.%d.%d " \
 906                         "OFDM=%d.%d.%d.%d\n", buf[0], buf[1], buf[2], buf[3],
 907                         buf[4], buf[5], buf[6], buf[7]);
 908
 909         /* configure internal TS mode */
 910         switch (state->cfg.ts_mode) {
 911         case AF9033_TS_MODE_PARALLEL:
 912                 state->ts_mode_parallel = true;
 913                 break;
 914         case AF9033_TS_MODE_SERIAL:
 915                 state->ts_mode_serial = true;
 916                 break;
 917         case AF9033_TS_MODE_USB:
 918                 /* usb mode for AF9035 */
 919         default:
 920                 break;
 921         }
 922
 923         /* create dvb_frontend */
 924         memcpy(&state->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
 925         state->fe.demodulator_priv = state;
 926
 927         return &state->fe;
 928
 929 err:
 930         kfree(state);
 931         return NULL;
 932 }
 933 EXPORT_SYMBOL(af9033_attach);
 934
 935 static struct dvb_frontend_ops af9033_ops = {
 936         .delsys = { SYS_DVBT },
 937         .info = {
 938                 .name = "Afatech AF9033 (DVB-T)",
 939                 .frequency_min = 174000000,
 940                 .frequency_max = 862000000,
 941                 .frequency_stepsize = 250000,
 942                 .frequency_tolerance = 0,
 943                 .caps = FE_CAN_FEC_1_2 |
 944                         FE_CAN_FEC_2_3 |
 945                         FE_CAN_FEC_3_4 |
 946                         FE_CAN_FEC_5_6 |
 947                         FE_CAN_FEC_7_8 |
 948                         FE_CAN_FEC_AUTO |
 949                         FE_CAN_QPSK |
 950                         FE_CAN_QAM_16 |
 951                         FE_CAN_QAM_64 |
 952                         FE_CAN_QAM_AUTO |
 953                         FE_CAN_TRANSMISSION_MODE_AUTO |
 954                         FE_CAN_GUARD_INTERVAL_AUTO |
 955                         FE_CAN_HIERARCHY_AUTO |
 956                         FE_CAN_RECOVER |
 957                         FE_CAN_MUTE_TS
 958         },
 959
 960         .release = af9033_release,
 961
 962         .init = af9033_init,
 963         .sleep = af9033_sleep,
 964
 965         .get_tune_settings = af9033_get_tune_settings,
 966         .set_frontend = af9033_set_frontend,
 967         .get_frontend = af9033_get_frontend,
 968
 969         .read_status = af9033_read_status,
 970         .read_snr = af9033_read_snr,
 971         .read_signal_strength = af9033_read_signal_strength,
 972         .read_ber = af9033_read_ber,
 973         .read_ucblocks = af9033_read_ucblocks,
 974
 975         .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
 976 };
 977
 978 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
 979 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
 980 MODULE_LICENSE("GPL");