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Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
blob1bf5bbfe778e998e9f0ca86897adc6d7001e3ed6
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27
28 /*
29 * atl1c_pci_tbl - PCI Device ID Table
30 *
31 * Wildcard entries (PCI_ANY_ID) should come last
32 * Last entry must be all 0s
33 *
34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
35 * Class, Class Mask, private data (not used) }
36 */
37 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
44 /* required last entry */
45 { 0 }
46 };
47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
48
49 MODULE_AUTHOR("Jie Yang");
50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
51 MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
52 MODULE_LICENSE("GPL");
53 MODULE_VERSION(ATL1C_DRV_VERSION);
54
55 static int atl1c_stop_mac(struct atl1c_hw *hw);
56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
58 static void atl1c_start_mac(struct atl1c_adapter *adapter);
59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
60 int *work_done, int work_to_do);
61 static int atl1c_up(struct atl1c_adapter *adapter);
62 static void atl1c_down(struct atl1c_adapter *adapter);
63 static int atl1c_reset_mac(struct atl1c_hw *hw);
64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
65 static int atl1c_configure(struct atl1c_adapter *adapter);
66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter);
67
68 static const u16 atl1c_pay_load_size[] = {
69 128, 256, 512, 1024, 2048, 4096,
70 };
71
72
73 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
74 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
75 static void atl1c_pcie_patch(struct atl1c_hw *hw)
76 {
77 u32 mst_data, data;
78
79 /* pclk sel could switch to 25M */
80 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
81 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
82 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
83
84 /* WoL/PCIE related settings */
85 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
86 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
87 data |= PCIE_PHYMISC_FORCE_RCV_DET;
88 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
89 } else { /* new dev set bit5 of MASTER */
90 if (!(mst_data & MASTER_CTRL_WAKEN_25M))
91 AT_WRITE_REG(hw, REG_MASTER_CTRL,
92 mst_data | MASTER_CTRL_WAKEN_25M);
93 }
94 /* aspm/PCIE setting only for l2cb 1.0 */
95 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
96 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
97 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
98 L2CB1_PCIE_PHYMISC2_CDR_BW);
99 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
100 L2CB1_PCIE_PHYMISC2_L0S_TH);
101 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
102 /* extend L1 sync timer */
103 AT_READ_REG(hw, REG_LINK_CTRL, &data);
104 data |= LINK_CTRL_EXT_SYNC;
105 AT_WRITE_REG(hw, REG_LINK_CTRL, data);
106 }
107 /* l2cb 1.x & l1d 1.x */
108 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
109 AT_READ_REG(hw, REG_PM_CTRL, &data);
110 data |= PM_CTRL_L0S_BUFSRX_EN;
111 AT_WRITE_REG(hw, REG_PM_CTRL, data);
112 /* clear vendor msg */
113 AT_READ_REG(hw, REG_DMA_DBG, &data);
114 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
115 }
116 }
117
118 /* FIXME: no need any more ? */
119 /*
120 * atl1c_init_pcie - init PCIE module
121 */
122 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
123 {
124 u32 data;
125 u32 pci_cmd;
126 struct pci_dev *pdev = hw->adapter->pdev;
127 int pos;
128
129 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
130 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
131 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
132 PCI_COMMAND_IO);
133 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
134
135 /*
136 * Clear any PowerSaveing Settings
137 */
138 pci_enable_wake(pdev, PCI_D3hot, 0);
139 pci_enable_wake(pdev, PCI_D3cold, 0);
140 /* wol sts read-clear */
141 AT_READ_REG(hw, REG_WOL_CTRL, &data);
142 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
143
144 /*
145 * Mask some pcie error bits
146 */
147 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
148 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
149 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
150 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
151 /* clear error status */
152 pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA,
153 PCI_EXP_DEVSTA_NFED |
154 PCI_EXP_DEVSTA_FED |
155 PCI_EXP_DEVSTA_CED |
156 PCI_EXP_DEVSTA_URD);
157
158 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
159 data &= ~LTSSM_ID_EN_WRO;
160 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
161
162 atl1c_pcie_patch(hw);
163 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
164 atl1c_disable_l0s_l1(hw);
165
166 msleep(5);
167 }
168
169 /**
170 * atl1c_irq_enable - Enable default interrupt generation settings
171 * @adapter: board private structure
172 */
173 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
174 {
175 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
176 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
177 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
178 AT_WRITE_FLUSH(&adapter->hw);
179 }
180 }
181
182 /**
183 * atl1c_irq_disable - Mask off interrupt generation on the NIC
184 * @adapter: board private structure
185 */
186 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
187 {
188 atomic_inc(&adapter->irq_sem);
189 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
190 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
191 AT_WRITE_FLUSH(&adapter->hw);
192 synchronize_irq(adapter->pdev->irq);
193 }
194
195 /**
196 * atl1c_irq_reset - reset interrupt confiure on the NIC
197 * @adapter: board private structure
198 */
199 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
200 {
201 atomic_set(&adapter->irq_sem, 1);
202 atl1c_irq_enable(adapter);
203 }
204
205 /*
206 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
207 * of the idle status register until the device is actually idle
208 */
209 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
210 {
211 int timeout;
212 u32 data;
213
214 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
215 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
216 if ((data & modu_ctrl) == 0)
217 return 0;
218 msleep(1);
219 }
220 return data;
221 }
222
223 /**
224 * atl1c_phy_config - Timer Call-back
225 * @data: pointer to netdev cast into an unsigned long
226 */
227 static void atl1c_phy_config(unsigned long data)
228 {
229 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
230 struct atl1c_hw *hw = &adapter->hw;
231 unsigned long flags;
232
233 spin_lock_irqsave(&adapter->mdio_lock, flags);
234 atl1c_restart_autoneg(hw);
235 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
236 }
237
238 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
239 {
240 WARN_ON(in_interrupt());
241 atl1c_down(adapter);
242 atl1c_up(adapter);
243 clear_bit(__AT_RESETTING, &adapter->flags);
244 }
245
246 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
247 {
248 struct atl1c_hw *hw = &adapter->hw;
249 struct net_device *netdev = adapter->netdev;
250 struct pci_dev *pdev = adapter->pdev;
251 int err;
252 unsigned long flags;
253 u16 speed, duplex, phy_data;
254
255 spin_lock_irqsave(&adapter->mdio_lock, flags);
256 /* MII_BMSR must read twise */
257 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
258 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
259 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
260
261 if ((phy_data & BMSR_LSTATUS) == 0) {
262 /* link down */
263 netif_carrier_off(netdev);
264 hw->hibernate = true;
265 if (atl1c_reset_mac(hw) != 0)
266 if (netif_msg_hw(adapter))
267 dev_warn(&pdev->dev, "reset mac failed\n");
268 atl1c_set_aspm(hw, SPEED_0);
269 atl1c_post_phy_linkchg(hw, SPEED_0);
270 atl1c_reset_dma_ring(adapter);
271 atl1c_configure(adapter);
272 } else {
273 /* Link Up */
274 hw->hibernate = false;
275 spin_lock_irqsave(&adapter->mdio_lock, flags);
276 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
277 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
278 if (unlikely(err))
279 return;
280 /* link result is our setting */
281 if (adapter->link_speed != speed ||
282 adapter->link_duplex != duplex) {
283 adapter->link_speed = speed;
284 adapter->link_duplex = duplex;
285 atl1c_set_aspm(hw, speed);
286 atl1c_post_phy_linkchg(hw, speed);
287 atl1c_start_mac(adapter);
288 if (netif_msg_link(adapter))
289 dev_info(&pdev->dev,
290 "%s: %s NIC Link is Up<%d Mbps %s>\n",
291 atl1c_driver_name, netdev->name,
292 adapter->link_speed,
293 adapter->link_duplex == FULL_DUPLEX ?
294 "Full Duplex" : "Half Duplex");
295 }
296 if (!netif_carrier_ok(netdev))
297 netif_carrier_on(netdev);
298 }
299 }
300
301 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
302 {
303 struct net_device *netdev = adapter->netdev;
304 struct pci_dev *pdev = adapter->pdev;
305 u16 phy_data;
306 u16 link_up;
307
308 spin_lock(&adapter->mdio_lock);
309 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
310 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
311 spin_unlock(&adapter->mdio_lock);
312 link_up = phy_data & BMSR_LSTATUS;
313 /* notify upper layer link down ASAP */
314 if (!link_up) {
315 if (netif_carrier_ok(netdev)) {
316 /* old link state: Up */
317 netif_carrier_off(netdev);
318 if (netif_msg_link(adapter))
319 dev_info(&pdev->dev,
320 "%s: %s NIC Link is Down\n",
321 atl1c_driver_name, netdev->name);
322 adapter->link_speed = SPEED_0;
323 }
324 }
325
326 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
327 schedule_work(&adapter->common_task);
328 }
329
330 static void atl1c_common_task(struct work_struct *work)
331 {
332 struct atl1c_adapter *adapter;
333 struct net_device *netdev;
334
335 adapter = container_of(work, struct atl1c_adapter, common_task);
336 netdev = adapter->netdev;
337
338 if (test_bit(__AT_DOWN, &adapter->flags))
339 return;
340
341 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
342 netif_device_detach(netdev);
343 atl1c_down(adapter);
344 atl1c_up(adapter);
345 netif_device_attach(netdev);
346 }
347
348 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
349 &adapter->work_event)) {
350 atl1c_irq_disable(adapter);
351 atl1c_check_link_status(adapter);
352 atl1c_irq_enable(adapter);
353 }
354 }
355
356
357 static void atl1c_del_timer(struct atl1c_adapter *adapter)
358 {
359 del_timer_sync(&adapter->phy_config_timer);
360 }
361
362
363 /**
364 * atl1c_tx_timeout - Respond to a Tx Hang
365 * @netdev: network interface device structure
366 */
367 static void atl1c_tx_timeout(struct net_device *netdev)
368 {
369 struct atl1c_adapter *adapter = netdev_priv(netdev);
370
371 /* Do the reset outside of interrupt context */
372 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
373 schedule_work(&adapter->common_task);
374 }
375
376 /**
377 * atl1c_set_multi - Multicast and Promiscuous mode set
378 * @netdev: network interface device structure
379 *
380 * The set_multi entry point is called whenever the multicast address
381 * list or the network interface flags are updated. This routine is
382 * responsible for configuring the hardware for proper multicast,
383 * promiscuous mode, and all-multi behavior.
384 */
385 static void atl1c_set_multi(struct net_device *netdev)
386 {
387 struct atl1c_adapter *adapter = netdev_priv(netdev);
388 struct atl1c_hw *hw = &adapter->hw;
389 struct netdev_hw_addr *ha;
390 u32 mac_ctrl_data;
391 u32 hash_value;
392
393 /* Check for Promiscuous and All Multicast modes */
394 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
395
396 if (netdev->flags & IFF_PROMISC) {
397 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
398 } else if (netdev->flags & IFF_ALLMULTI) {
399 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
400 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
401 } else {
402 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
403 }
404
405 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
406
407 /* clear the old settings from the multicast hash table */
408 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
409 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
410
411 /* comoute mc addresses' hash value ,and put it into hash table */
412 netdev_for_each_mc_addr(ha, netdev) {
413 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
414 atl1c_hash_set(hw, hash_value);
415 }
416 }
417
418 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
419 {
420 if (features & NETIF_F_HW_VLAN_RX) {
421 /* enable VLAN tag insert/strip */
422 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
423 } else {
424 /* disable VLAN tag insert/strip */
425 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
426 }
427 }
428
429 static void atl1c_vlan_mode(struct net_device *netdev,
430 netdev_features_t features)
431 {
432 struct atl1c_adapter *adapter = netdev_priv(netdev);
433 struct pci_dev *pdev = adapter->pdev;
434 u32 mac_ctrl_data = 0;
435
436 if (netif_msg_pktdata(adapter))
437 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
438
439 atl1c_irq_disable(adapter);
440 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
441 __atl1c_vlan_mode(features, &mac_ctrl_data);
442 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
443 atl1c_irq_enable(adapter);
444 }
445
446 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
447 {
448 struct pci_dev *pdev = adapter->pdev;
449
450 if (netif_msg_pktdata(adapter))
451 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
452 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
453 }
454
455 /**
456 * atl1c_set_mac - Change the Ethernet Address of the NIC
457 * @netdev: network interface device structure
458 * @p: pointer to an address structure
459 *
460 * Returns 0 on success, negative on failure
461 */
462 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
463 {
464 struct atl1c_adapter *adapter = netdev_priv(netdev);
465 struct sockaddr *addr = p;
466
467 if (!is_valid_ether_addr(addr->sa_data))
468 return -EADDRNOTAVAIL;
469
470 if (netif_running(netdev))
471 return -EBUSY;
472
473 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
474 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
475 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
476
477 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
478
479 return 0;
480 }
481
482 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
483 struct net_device *dev)
484 {
485 int mtu = dev->mtu;
486
487 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
488 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
489 }
490
491 static netdev_features_t atl1c_fix_features(struct net_device *netdev,
492 netdev_features_t features)
493 {
494 /*
495 * Since there is no support for separate rx/tx vlan accel
496 * enable/disable make sure tx flag is always in same state as rx.
497 */
498 if (features & NETIF_F_HW_VLAN_RX)
499 features |= NETIF_F_HW_VLAN_TX;
500 else
501 features &= ~NETIF_F_HW_VLAN_TX;
502
503 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
504 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
505
506 return features;
507 }
508
509 static int atl1c_set_features(struct net_device *netdev,
510 netdev_features_t features)
511 {
512 netdev_features_t changed = netdev->features ^ features;
513
514 if (changed & NETIF_F_HW_VLAN_RX)
515 atl1c_vlan_mode(netdev, features);
516
517 return 0;
518 }
519
520 /**
521 * atl1c_change_mtu - Change the Maximum Transfer Unit
522 * @netdev: network interface device structure
523 * @new_mtu: new value for maximum frame size
524 *
525 * Returns 0 on success, negative on failure
526 */
527 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
528 {
529 struct atl1c_adapter *adapter = netdev_priv(netdev);
530 struct atl1c_hw *hw = &adapter->hw;
531 int old_mtu = netdev->mtu;
532 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
533
534 /* Fast Ethernet controller doesn't support jumbo packet */
535 if (((hw->nic_type == athr_l2c ||
536 hw->nic_type == athr_l2c_b ||
537 hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
538 max_frame < ETH_ZLEN + ETH_FCS_LEN ||
539 max_frame > MAX_JUMBO_FRAME_SIZE) {
540 if (netif_msg_link(adapter))
541 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
542 return -EINVAL;
543 }
544 /* set MTU */
545 if (old_mtu != new_mtu && netif_running(netdev)) {
546 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
547 msleep(1);
548 netdev->mtu = new_mtu;
549 adapter->hw.max_frame_size = new_mtu;
550 atl1c_set_rxbufsize(adapter, netdev);
551 atl1c_down(adapter);
552 netdev_update_features(netdev);
553 atl1c_up(adapter);
554 clear_bit(__AT_RESETTING, &adapter->flags);
555 }
556 return 0;
557 }
558
559 /*
560 * caller should hold mdio_lock
561 */
562 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
563 {
564 struct atl1c_adapter *adapter = netdev_priv(netdev);
565 u16 result;
566
567 atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
568 return result;
569 }
570
571 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
572 int reg_num, int val)
573 {
574 struct atl1c_adapter *adapter = netdev_priv(netdev);
575
576 atl1c_write_phy_reg(&adapter->hw, reg_num, val);
577 }
578
579 static int atl1c_mii_ioctl(struct net_device *netdev,
580 struct ifreq *ifr, int cmd)
581 {
582 struct atl1c_adapter *adapter = netdev_priv(netdev);
583 struct pci_dev *pdev = adapter->pdev;
584 struct mii_ioctl_data *data = if_mii(ifr);
585 unsigned long flags;
586 int retval = 0;
587
588 if (!netif_running(netdev))
589 return -EINVAL;
590
591 spin_lock_irqsave(&adapter->mdio_lock, flags);
592 switch (cmd) {
593 case SIOCGMIIPHY:
594 data->phy_id = 0;
595 break;
596
597 case SIOCGMIIREG:
598 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
599 &data->val_out)) {
600 retval = -EIO;
601 goto out;
602 }
603 break;
604
605 case SIOCSMIIREG:
606 if (data->reg_num & ~(0x1F)) {
607 retval = -EFAULT;
608 goto out;
609 }
610
611 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
612 data->reg_num, data->val_in);
613 if (atl1c_write_phy_reg(&adapter->hw,
614 data->reg_num, data->val_in)) {
615 retval = -EIO;
616 goto out;
617 }
618 break;
619
620 default:
621 retval = -EOPNOTSUPP;
622 break;
623 }
624 out:
625 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
626 return retval;
627 }
628
629 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
630 {
631 switch (cmd) {
632 case SIOCGMIIPHY:
633 case SIOCGMIIREG:
634 case SIOCSMIIREG:
635 return atl1c_mii_ioctl(netdev, ifr, cmd);
636 default:
637 return -EOPNOTSUPP;
638 }
639 }
640
641 /**
642 * atl1c_alloc_queues - Allocate memory for all rings
643 * @adapter: board private structure to initialize
644 *
645 */
646 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
647 {
648 return 0;
649 }
650
651 static void atl1c_set_mac_type(struct atl1c_hw *hw)
652 {
653 switch (hw->device_id) {
654 case PCI_DEVICE_ID_ATTANSIC_L2C:
655 hw->nic_type = athr_l2c;
656 break;
657 case PCI_DEVICE_ID_ATTANSIC_L1C:
658 hw->nic_type = athr_l1c;
659 break;
660 case PCI_DEVICE_ID_ATHEROS_L2C_B:
661 hw->nic_type = athr_l2c_b;
662 break;
663 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
664 hw->nic_type = athr_l2c_b2;
665 break;
666 case PCI_DEVICE_ID_ATHEROS_L1D:
667 hw->nic_type = athr_l1d;
668 break;
669 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
670 hw->nic_type = athr_l1d_2;
671 break;
672 default:
673 break;
674 }
675 }
676
677 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
678 {
679 u32 link_ctrl_data;
680
681 atl1c_set_mac_type(hw);
682 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
683
684 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
685 ATL1C_TXQ_MODE_ENHANCE;
686 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
687 ATL1C_ASPM_L1_SUPPORT;
688 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
689
690 if (hw->nic_type == athr_l1c ||
691 hw->nic_type == athr_l1d ||
692 hw->nic_type == athr_l1d_2)
693 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
694 return 0;
695 }
696
697 struct atl1c_platform_patch {
698 u16 pci_did;
699 u8 pci_revid;
700 u16 subsystem_vid;
701 u16 subsystem_did;
702 u32 patch_flag;
703 #define ATL1C_LINK_PATCH 0x1
704 };
705 static const struct atl1c_platform_patch plats[] __devinitdata = {
706 {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
707 {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
708 {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
709 {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
710 {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
711 {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
712 {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
713 {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
714 {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
715 {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
716 {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
717 {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
718 {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
719 {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
720 {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
721 {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
722 {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
723 {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
724 {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
725 {0},
726 };
727
728 static void __devinit atl1c_patch_assign(struct atl1c_hw *hw)
729 {
730 struct pci_dev *pdev = hw->adapter->pdev;
731 u32 misc_ctrl;
732 int i = 0;
733
734 hw->msi_lnkpatch = false;
735
736 while (plats[i].pci_did != 0) {
737 if (plats[i].pci_did == hw->device_id &&
738 plats[i].pci_revid == hw->revision_id &&
739 plats[i].subsystem_vid == hw->subsystem_vendor_id &&
740 plats[i].subsystem_did == hw->subsystem_id) {
741 if (plats[i].patch_flag & ATL1C_LINK_PATCH)
742 hw->msi_lnkpatch = true;
743 }
744 i++;
745 }
746
747 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
748 hw->revision_id == L2CB_V21) {
749 /* config acess mode */
750 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
751 REG_PCIE_DEV_MISC_CTRL);
752 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
753 misc_ctrl &= ~0x100;
754 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
755 REG_PCIE_DEV_MISC_CTRL);
756 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
757 }
758 }
759 /**
760 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
761 * @adapter: board private structure to initialize
762 *
763 * atl1c_sw_init initializes the Adapter private data structure.
764 * Fields are initialized based on PCI device information and
765 * OS network device settings (MTU size).
766 */
767 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
768 {
769 struct atl1c_hw *hw = &adapter->hw;
770 struct pci_dev *pdev = adapter->pdev;
771 u32 revision;
772
773
774 adapter->wol = 0;
775 device_set_wakeup_enable(&pdev->dev, false);
776 adapter->link_speed = SPEED_0;
777 adapter->link_duplex = FULL_DUPLEX;
778 adapter->tpd_ring[0].count = 1024;
779 adapter->rfd_ring.count = 512;
780
781 hw->vendor_id = pdev->vendor;
782 hw->device_id = pdev->device;
783 hw->subsystem_vendor_id = pdev->subsystem_vendor;
784 hw->subsystem_id = pdev->subsystem_device;
785 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
786 hw->revision_id = revision & 0xFF;
787 /* before link up, we assume hibernate is true */
788 hw->hibernate = true;
789 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
790 if (atl1c_setup_mac_funcs(hw) != 0) {
791 dev_err(&pdev->dev, "set mac function pointers failed\n");
792 return -1;
793 }
794 atl1c_patch_assign(hw);
795
796 hw->intr_mask = IMR_NORMAL_MASK;
797 hw->phy_configured = false;
798 hw->preamble_len = 7;
799 hw->max_frame_size = adapter->netdev->mtu;
800 hw->autoneg_advertised = ADVERTISED_Autoneg;
801 hw->indirect_tab = 0xE4E4E4E4;
802 hw->base_cpu = 0;
803
804 hw->ict = 50000; /* 100ms */
805 hw->smb_timer = 200000; /* 400ms */
806 hw->rx_imt = 200;
807 hw->tx_imt = 1000;
808
809 hw->tpd_burst = 5;
810 hw->rfd_burst = 8;
811 hw->dma_order = atl1c_dma_ord_out;
812 hw->dmar_block = atl1c_dma_req_1024;
813
814 if (atl1c_alloc_queues(adapter)) {
815 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
816 return -ENOMEM;
817 }
818 /* TODO */
819 atl1c_set_rxbufsize(adapter, adapter->netdev);
820 atomic_set(&adapter->irq_sem, 1);
821 spin_lock_init(&adapter->mdio_lock);
822 spin_lock_init(&adapter->tx_lock);
823 set_bit(__AT_DOWN, &adapter->flags);
824
825 return 0;
826 }
827
828 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
829 struct atl1c_buffer *buffer_info, int in_irq)
830 {
831 u16 pci_driection;
832 if (buffer_info->flags & ATL1C_BUFFER_FREE)
833 return;
834 if (buffer_info->dma) {
835 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
836 pci_driection = PCI_DMA_FROMDEVICE;
837 else
838 pci_driection = PCI_DMA_TODEVICE;
839
840 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
841 pci_unmap_single(pdev, buffer_info->dma,
842 buffer_info->length, pci_driection);
843 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
844 pci_unmap_page(pdev, buffer_info->dma,
845 buffer_info->length, pci_driection);
846 }
847 if (buffer_info->skb) {
848 if (in_irq)
849 dev_kfree_skb_irq(buffer_info->skb);
850 else
851 dev_kfree_skb(buffer_info->skb);
852 }
853 buffer_info->dma = 0;
854 buffer_info->skb = NULL;
855 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
856 }
857 /**
858 * atl1c_clean_tx_ring - Free Tx-skb
859 * @adapter: board private structure
860 */
861 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
862 enum atl1c_trans_queue type)
863 {
864 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
865 struct atl1c_buffer *buffer_info;
866 struct pci_dev *pdev = adapter->pdev;
867 u16 index, ring_count;
868
869 ring_count = tpd_ring->count;
870 for (index = 0; index < ring_count; index++) {
871 buffer_info = &tpd_ring->buffer_info[index];
872 atl1c_clean_buffer(pdev, buffer_info, 0);
873 }
874
875 /* Zero out Tx-buffers */
876 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
877 ring_count);
878 atomic_set(&tpd_ring->next_to_clean, 0);
879 tpd_ring->next_to_use = 0;
880 }
881
882 /**
883 * atl1c_clean_rx_ring - Free rx-reservation skbs
884 * @adapter: board private structure
885 */
886 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
887 {
888 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
889 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
890 struct atl1c_buffer *buffer_info;
891 struct pci_dev *pdev = adapter->pdev;
892 int j;
893
894 for (j = 0; j < rfd_ring->count; j++) {
895 buffer_info = &rfd_ring->buffer_info[j];
896 atl1c_clean_buffer(pdev, buffer_info, 0);
897 }
898 /* zero out the descriptor ring */
899 memset(rfd_ring->desc, 0, rfd_ring->size);
900 rfd_ring->next_to_clean = 0;
901 rfd_ring->next_to_use = 0;
902 rrd_ring->next_to_use = 0;
903 rrd_ring->next_to_clean = 0;
904 }
905
906 /*
907 * Read / Write Ptr Initialize:
908 */
909 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
910 {
911 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
912 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
913 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
914 struct atl1c_buffer *buffer_info;
915 int i, j;
916
917 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
918 tpd_ring[i].next_to_use = 0;
919 atomic_set(&tpd_ring[i].next_to_clean, 0);
920 buffer_info = tpd_ring[i].buffer_info;
921 for (j = 0; j < tpd_ring->count; j++)
922 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
923 ATL1C_BUFFER_FREE);
924 }
925 rfd_ring->next_to_use = 0;
926 rfd_ring->next_to_clean = 0;
927 rrd_ring->next_to_use = 0;
928 rrd_ring->next_to_clean = 0;
929 for (j = 0; j < rfd_ring->count; j++) {
930 buffer_info = &rfd_ring->buffer_info[j];
931 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
932 }
933 }
934
935 /**
936 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
937 * @adapter: board private structure
938 *
939 * Free all transmit software resources
940 */
941 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
942 {
943 struct pci_dev *pdev = adapter->pdev;
944
945 pci_free_consistent(pdev, adapter->ring_header.size,
946 adapter->ring_header.desc,
947 adapter->ring_header.dma);
948 adapter->ring_header.desc = NULL;
949
950 /* Note: just free tdp_ring.buffer_info,
951 * it contain rfd_ring.buffer_info, do not double free */
952 if (adapter->tpd_ring[0].buffer_info) {
953 kfree(adapter->tpd_ring[0].buffer_info);
954 adapter->tpd_ring[0].buffer_info = NULL;
955 }
956 }
957
958 /**
959 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
960 * @adapter: board private structure
961 *
962 * Return 0 on success, negative on failure
963 */
964 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
965 {
966 struct pci_dev *pdev = adapter->pdev;
967 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
968 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
969 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
970 struct atl1c_ring_header *ring_header = &adapter->ring_header;
971 int size;
972 int i;
973 int count = 0;
974 int rx_desc_count = 0;
975 u32 offset = 0;
976
977 rrd_ring->count = rfd_ring->count;
978 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
979 tpd_ring[i].count = tpd_ring[0].count;
980
981 /* 2 tpd queue, one high priority queue,
982 * another normal priority queue */
983 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
984 rfd_ring->count);
985 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
986 if (unlikely(!tpd_ring->buffer_info)) {
987 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
988 size);
989 goto err_nomem;
990 }
991 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
992 tpd_ring[i].buffer_info =
993 (tpd_ring->buffer_info + count);
994 count += tpd_ring[i].count;
995 }
996
997 rfd_ring->buffer_info =
998 (tpd_ring->buffer_info + count);
999 count += rfd_ring->count;
1000 rx_desc_count += rfd_ring->count;
1001
1002 /*
1003 * real ring DMA buffer
1004 * each ring/block may need up to 8 bytes for alignment, hence the
1005 * additional bytes tacked onto the end.
1006 */
1007 ring_header->size = size =
1008 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
1009 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
1010 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
1011 8 * 4;
1012
1013 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
1014 &ring_header->dma);
1015 if (unlikely(!ring_header->desc)) {
1016 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
1017 goto err_nomem;
1018 }
1019 memset(ring_header->desc, 0, ring_header->size);
1020 /* init TPD ring */
1021
1022 tpd_ring[0].dma = roundup(ring_header->dma, 8);
1023 offset = tpd_ring[0].dma - ring_header->dma;
1024 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
1025 tpd_ring[i].dma = ring_header->dma + offset;
1026 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
1027 tpd_ring[i].size =
1028 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1029 offset += roundup(tpd_ring[i].size, 8);
1030 }
1031 /* init RFD ring */
1032 rfd_ring->dma = ring_header->dma + offset;
1033 rfd_ring->desc = (u8 *) ring_header->desc + offset;
1034 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
1035 offset += roundup(rfd_ring->size, 8);
1036
1037 /* init RRD ring */
1038 rrd_ring->dma = ring_header->dma + offset;
1039 rrd_ring->desc = (u8 *) ring_header->desc + offset;
1040 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
1041 rrd_ring->count;
1042 offset += roundup(rrd_ring->size, 8);
1043
1044 return 0;
1045
1046 err_nomem:
1047 kfree(tpd_ring->buffer_info);
1048 return -ENOMEM;
1049 }
1050
1051 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1052 {
1053 struct atl1c_hw *hw = &adapter->hw;
1054 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1055 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
1056 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1057 adapter->tpd_ring;
1058
1059 /* TPD */
1060 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1061 (u32)((tpd_ring[atl1c_trans_normal].dma &
1062 AT_DMA_HI_ADDR_MASK) >> 32));
1063 /* just enable normal priority TX queue */
1064 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
1065 (u32)(tpd_ring[atl1c_trans_normal].dma &
1066 AT_DMA_LO_ADDR_MASK));
1067 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
1068 (u32)(tpd_ring[atl1c_trans_high].dma &
1069 AT_DMA_LO_ADDR_MASK));
1070 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1071 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1072
1073
1074 /* RFD */
1075 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1076 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1077 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1078 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
1079
1080 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1081 rfd_ring->count & RFD_RING_SIZE_MASK);
1082 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1083 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1084
1085 /* RRD */
1086 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1087 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
1088 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1089 (rrd_ring->count & RRD_RING_SIZE_MASK));
1090
1091 if (hw->nic_type == athr_l2c_b) {
1092 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1093 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1094 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1095 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1096 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1097 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1098 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1099 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1100 }
1101 /* Load all of base address above */
1102 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1103 }
1104
1105 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1106 {
1107 struct atl1c_hw *hw = &adapter->hw;
1108 int max_pay_load;
1109 u16 tx_offload_thresh;
1110 u32 txq_ctrl_data;
1111
1112 tx_offload_thresh = MAX_TSO_FRAME_SIZE;
1113 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1114 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1115 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
1116 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1117 /*
1118 * if BIOS had changed the dam-read-max-length to an invalid value,
1119 * restore it to default value
1120 */
1121 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
1122 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
1123 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
1124 }
1125 txq_ctrl_data =
1126 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
1127 L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
1128
1129 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1130 }
1131
1132 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1133 {
1134 struct atl1c_hw *hw = &adapter->hw;
1135 u32 rxq_ctrl_data;
1136
1137 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1138 RXQ_RFD_BURST_NUM_SHIFT;
1139
1140 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1141 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1142
1143 /* aspm for gigabit */
1144 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
1145 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
1146 ASPM_THRUPUT_LIMIT_100M);
1147
1148 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1149 }
1150
1151 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1152 {
1153 struct atl1c_hw *hw = &adapter->hw;
1154 u32 dma_ctrl_data;
1155
1156 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1157 DMA_CTRL_RREQ_PRI_DATA |
1158 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1159 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1160 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
1161
1162 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1163 }
1164
1165 /*
1166 * Stop the mac, transmit and receive units
1167 * hw - Struct containing variables accessed by shared code
1168 * return : 0 or idle status (if error)
1169 */
1170 static int atl1c_stop_mac(struct atl1c_hw *hw)
1171 {
1172 u32 data;
1173
1174 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1175 data &= ~RXQ_CTRL_EN;
1176 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1177
1178 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1179 data &= ~TXQ_CTRL_EN;
1180 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1181
1182 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
1183
1184 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1185 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1186 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1187
1188 return (int)atl1c_wait_until_idle(hw,
1189 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
1190 }
1191
1192 static void atl1c_start_mac(struct atl1c_adapter *adapter)
1193 {
1194 struct atl1c_hw *hw = &adapter->hw;
1195 u32 mac, txq, rxq;
1196
1197 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
1198 hw->mac_speed = adapter->link_speed == SPEED_1000 ?
1199 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
1200
1201 AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
1202 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
1203 AT_READ_REG(hw, REG_MAC_CTRL, &mac);
1204
1205 txq |= TXQ_CTRL_EN;
1206 rxq |= RXQ_CTRL_EN;
1207 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
1208 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
1209 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
1210 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
1211 MAC_CTRL_HASH_ALG_CRC32;
1212 if (hw->mac_duplex)
1213 mac |= MAC_CTRL_DUPLX;
1214 else
1215 mac &= ~MAC_CTRL_DUPLX;
1216 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
1217 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
1218
1219 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
1220 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
1221 AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
1222 }
1223
1224 /*
1225 * Reset the transmit and receive units; mask and clear all interrupts.
1226 * hw - Struct containing variables accessed by shared code
1227 * return : 0 or idle status (if error)
1228 */
1229 static int atl1c_reset_mac(struct atl1c_hw *hw)
1230 {
1231 struct atl1c_adapter *adapter = hw->adapter;
1232 struct pci_dev *pdev = adapter->pdev;
1233 u32 ctrl_data = 0;
1234
1235 atl1c_stop_mac(hw);
1236 /*
1237 * Issue Soft Reset to the MAC. This will reset the chip's
1238 * transmit, receive, DMA. It will not effect
1239 * the current PCI configuration. The global reset bit is self-
1240 * clearing, and should clear within a microsecond.
1241 */
1242 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
1243 ctrl_data |= MASTER_CTRL_OOB_DIS;
1244 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
1245
1246 AT_WRITE_FLUSH(hw);
1247 msleep(10);
1248 /* Wait at least 10ms for All module to be Idle */
1249
1250 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
1251 dev_err(&pdev->dev,
1252 "MAC state machine can't be idle since"
1253 " disabled for 10ms second\n");
1254 return -1;
1255 }
1256 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
1257
1258 /* driver control speed/duplex */
1259 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
1260 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
1261
1262 /* clk switch setting */
1263 AT_READ_REG(hw, REG_SERDES, &ctrl_data);
1264 switch (hw->nic_type) {
1265 case athr_l2c_b:
1266 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
1267 SERDES_MAC_CLK_SLOWDOWN);
1268 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1269 break;
1270 case athr_l2c_b2:
1271 case athr_l1d_2:
1272 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
1273 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1274 break;
1275 default:
1276 break;
1277 }
1278
1279 return 0;
1280 }
1281
1282 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1283 {
1284 u16 ctrl_flags = hw->ctrl_flags;
1285
1286 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
1287 atl1c_set_aspm(hw, SPEED_0);
1288 hw->ctrl_flags = ctrl_flags;
1289 }
1290
1291 /*
1292 * Set ASPM state.
1293 * Enable/disable L0s/L1 depend on link state.
1294 */
1295 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
1296 {
1297 u32 pm_ctrl_data;
1298 u32 link_l1_timer;
1299
1300 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1301 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
1302 PM_CTRL_ASPM_L0S_EN |
1303 PM_CTRL_MAC_ASPM_CHK);
1304 /* L1 timer */
1305 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1306 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
1307 link_l1_timer =
1308 link_speed == SPEED_1000 || link_speed == SPEED_100 ?
1309 L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
1310 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1311 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
1312 } else {
1313 link_l1_timer = hw->nic_type == athr_l2c_b ?
1314 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
1315 if (link_speed != SPEED_1000 && link_speed != SPEED_100)
1316 link_l1_timer = 1;
1317 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1318 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
1319 }
1320
1321 /* L0S/L1 enable */
1322 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
1323 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
1324 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1325 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
1326
1327 /* l2cb & l1d & l2cb2 & l1d2 */
1328 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1329 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1330 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1331 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
1332 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
1333 PM_CTRL_SERDES_PD_EX_L1 |
1334 PM_CTRL_CLK_SWH_L1;
1335 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1336 PM_CTRL_SERDES_PLL_L1_EN |
1337 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1338 PM_CTRL_SA_DLY_EN |
1339 PM_CTRL_HOTRST);
1340 /* disable l0s if link down or l2cb */
1341 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
1342 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1343 } else { /* l1c */
1344 pm_ctrl_data =
1345 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
1346 if (link_speed != SPEED_0) {
1347 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
1348 PM_CTRL_SERDES_PLL_L1_EN |
1349 PM_CTRL_SERDES_BUFS_RX_L1_EN;
1350 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
1351 PM_CTRL_CLK_SWH_L1 |
1352 PM_CTRL_ASPM_L0S_EN |
1353 PM_CTRL_ASPM_L1_EN);
1354 } else { /* link down */
1355 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1356 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1357 PM_CTRL_SERDES_PLL_L1_EN |
1358 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1359 PM_CTRL_ASPM_L0S_EN);
1360 }
1361 }
1362 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1363
1364 return;
1365 }
1366
1367 /**
1368 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1369 * @adapter: board private structure
1370 *
1371 * Configure the Tx /Rx unit of the MAC after a reset.
1372 */
1373 static int atl1c_configure_mac(struct atl1c_adapter *adapter)
1374 {
1375 struct atl1c_hw *hw = &adapter->hw;
1376 u32 master_ctrl_data = 0;
1377 u32 intr_modrt_data;
1378 u32 data;
1379
1380 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1381 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
1382 MASTER_CTRL_RX_ITIMER_EN |
1383 MASTER_CTRL_INT_RDCLR);
1384 /* clear interrupt status */
1385 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1386 /* Clear any WOL status */
1387 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1388 /* set Interrupt Clear Timer
1389 * HW will enable self to assert interrupt event to system after
1390 * waiting x-time for software to notify it accept interrupt.
1391 */
1392
1393 data = CLK_GATING_EN_ALL;
1394 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1395 if (hw->nic_type == athr_l2c_b)
1396 data &= ~CLK_GATING_RXMAC_EN;
1397 } else
1398 data = 0;
1399 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1400
1401 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1402 hw->ict & INT_RETRIG_TIMER_MASK);
1403
1404 atl1c_configure_des_ring(adapter);
1405
1406 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1407 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1408 IRQ_MODRT_TX_TIMER_SHIFT;
1409 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1410 IRQ_MODRT_RX_TIMER_SHIFT;
1411 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1412 master_ctrl_data |=
1413 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1414 }
1415
1416 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1417 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1418
1419 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1420 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1421
1422 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1423 hw->smb_timer & SMB_STAT_TIMER_MASK);
1424
1425 /* set MTU */
1426 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1427 VLAN_HLEN + ETH_FCS_LEN);
1428
1429 atl1c_configure_tx(adapter);
1430 atl1c_configure_rx(adapter);
1431 atl1c_configure_dma(adapter);
1432
1433 return 0;
1434 }
1435
1436 static int atl1c_configure(struct atl1c_adapter *adapter)
1437 {
1438 struct net_device *netdev = adapter->netdev;
1439 int num;
1440
1441 atl1c_init_ring_ptrs(adapter);
1442 atl1c_set_multi(netdev);
1443 atl1c_restore_vlan(adapter);
1444
1445 num = atl1c_alloc_rx_buffer(adapter);
1446 if (unlikely(num == 0))
1447 return -ENOMEM;
1448
1449 if (atl1c_configure_mac(adapter))
1450 return -EIO;
1451
1452 return 0;
1453 }
1454
1455 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1456 {
1457 u16 hw_reg_addr = 0;
1458 unsigned long *stats_item = NULL;
1459 u32 data;
1460
1461 /* update rx status */
1462 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1463 stats_item = &adapter->hw_stats.rx_ok;
1464 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1465 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1466 *stats_item += data;
1467 stats_item++;
1468 hw_reg_addr += 4;
1469 }
1470 /* update tx status */
1471 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1472 stats_item = &adapter->hw_stats.tx_ok;
1473 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1474 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1475 *stats_item += data;
1476 stats_item++;
1477 hw_reg_addr += 4;
1478 }
1479 }
1480
1481 /**
1482 * atl1c_get_stats - Get System Network Statistics
1483 * @netdev: network interface device structure
1484 *
1485 * Returns the address of the device statistics structure.
1486 * The statistics are actually updated from the timer callback.
1487 */
1488 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1489 {
1490 struct atl1c_adapter *adapter = netdev_priv(netdev);
1491 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1492 struct net_device_stats *net_stats = &netdev->stats;
1493
1494 atl1c_update_hw_stats(adapter);
1495 net_stats->rx_packets = hw_stats->rx_ok;
1496 net_stats->tx_packets = hw_stats->tx_ok;
1497 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1498 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1499 net_stats->multicast = hw_stats->rx_mcast;
1500 net_stats->collisions = hw_stats->tx_1_col +
1501 hw_stats->tx_2_col * 2 +
1502 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1503 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1504 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1505 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1506 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1507 net_stats->rx_length_errors = hw_stats->rx_len_err;
1508 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1509 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1510 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1511
1512 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1513
1514 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1515 hw_stats->tx_underrun + hw_stats->tx_trunc;
1516 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1517 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1518 net_stats->tx_window_errors = hw_stats->tx_late_col;
1519
1520 return net_stats;
1521 }
1522
1523 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1524 {
1525 u16 phy_data;
1526
1527 spin_lock(&adapter->mdio_lock);
1528 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1529 spin_unlock(&adapter->mdio_lock);
1530 }
1531
1532 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1533 enum atl1c_trans_queue type)
1534 {
1535 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1536 struct atl1c_buffer *buffer_info;
1537 struct pci_dev *pdev = adapter->pdev;
1538 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1539 u16 hw_next_to_clean;
1540 u16 reg;
1541
1542 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
1543
1544 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
1545
1546 while (next_to_clean != hw_next_to_clean) {
1547 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1548 atl1c_clean_buffer(pdev, buffer_info, 1);
1549 if (++next_to_clean == tpd_ring->count)
1550 next_to_clean = 0;
1551 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1552 }
1553
1554 if (netif_queue_stopped(adapter->netdev) &&
1555 netif_carrier_ok(adapter->netdev)) {
1556 netif_wake_queue(adapter->netdev);
1557 }
1558
1559 return true;
1560 }
1561
1562 /**
1563 * atl1c_intr - Interrupt Handler
1564 * @irq: interrupt number
1565 * @data: pointer to a network interface device structure
1566 */
1567 static irqreturn_t atl1c_intr(int irq, void *data)
1568 {
1569 struct net_device *netdev = data;
1570 struct atl1c_adapter *adapter = netdev_priv(netdev);
1571 struct pci_dev *pdev = adapter->pdev;
1572 struct atl1c_hw *hw = &adapter->hw;
1573 int max_ints = AT_MAX_INT_WORK;
1574 int handled = IRQ_NONE;
1575 u32 status;
1576 u32 reg_data;
1577
1578 do {
1579 AT_READ_REG(hw, REG_ISR, &reg_data);
1580 status = reg_data & hw->intr_mask;
1581
1582 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1583 if (max_ints != AT_MAX_INT_WORK)
1584 handled = IRQ_HANDLED;
1585 break;
1586 }
1587 /* link event */
1588 if (status & ISR_GPHY)
1589 atl1c_clear_phy_int(adapter);
1590 /* Ack ISR */
1591 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1592 if (status & ISR_RX_PKT) {
1593 if (likely(napi_schedule_prep(&adapter->napi))) {
1594 hw->intr_mask &= ~ISR_RX_PKT;
1595 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1596 __napi_schedule(&adapter->napi);
1597 }
1598 }
1599 if (status & ISR_TX_PKT)
1600 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1601
1602 handled = IRQ_HANDLED;
1603 /* check if PCIE PHY Link down */
1604 if (status & ISR_ERROR) {
1605 if (netif_msg_hw(adapter))
1606 dev_err(&pdev->dev,
1607 "atl1c hardware error (status = 0x%x)\n",
1608 status & ISR_ERROR);
1609 /* reset MAC */
1610 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
1611 schedule_work(&adapter->common_task);
1612 return IRQ_HANDLED;
1613 }
1614
1615 if (status & ISR_OVER)
1616 if (netif_msg_intr(adapter))
1617 dev_warn(&pdev->dev,
1618 "TX/RX overflow (status = 0x%x)\n",
1619 status & ISR_OVER);
1620
1621 /* link event */
1622 if (status & (ISR_GPHY | ISR_MANUAL)) {
1623 netdev->stats.tx_carrier_errors++;
1624 atl1c_link_chg_event(adapter);
1625 break;
1626 }
1627
1628 } while (--max_ints > 0);
1629 /* re-enable Interrupt*/
1630 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1631 return handled;
1632 }
1633
1634 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1635 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1636 {
1637 /*
1638 * The pid field in RRS in not correct sometimes, so we
1639 * cannot figure out if the packet is fragmented or not,
1640 * so we tell the KERNEL CHECKSUM_NONE
1641 */
1642 skb_checksum_none_assert(skb);
1643 }
1644
1645 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
1646 {
1647 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1648 struct pci_dev *pdev = adapter->pdev;
1649 struct atl1c_buffer *buffer_info, *next_info;
1650 struct sk_buff *skb;
1651 void *vir_addr = NULL;
1652 u16 num_alloc = 0;
1653 u16 rfd_next_to_use, next_next;
1654 struct atl1c_rx_free_desc *rfd_desc;
1655
1656 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1657 if (++next_next == rfd_ring->count)
1658 next_next = 0;
1659 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1660 next_info = &rfd_ring->buffer_info[next_next];
1661
1662 while (next_info->flags & ATL1C_BUFFER_FREE) {
1663 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1664
1665 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
1666 if (unlikely(!skb)) {
1667 if (netif_msg_rx_err(adapter))
1668 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1669 break;
1670 }
1671
1672 /*
1673 * Make buffer alignment 2 beyond a 16 byte boundary
1674 * this will result in a 16 byte aligned IP header after
1675 * the 14 byte MAC header is removed
1676 */
1677 vir_addr = skb->data;
1678 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1679 buffer_info->skb = skb;
1680 buffer_info->length = adapter->rx_buffer_len;
1681 buffer_info->dma = pci_map_single(pdev, vir_addr,
1682 buffer_info->length,
1683 PCI_DMA_FROMDEVICE);
1684 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1685 ATL1C_PCIMAP_FROMDEVICE);
1686 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1687 rfd_next_to_use = next_next;
1688 if (++next_next == rfd_ring->count)
1689 next_next = 0;
1690 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1691 next_info = &rfd_ring->buffer_info[next_next];
1692 num_alloc++;
1693 }
1694
1695 if (num_alloc) {
1696 /* TODO: update mailbox here */
1697 wmb();
1698 rfd_ring->next_to_use = rfd_next_to_use;
1699 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
1700 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1701 }
1702
1703 return num_alloc;
1704 }
1705
1706 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1707 struct atl1c_recv_ret_status *rrs, u16 num)
1708 {
1709 u16 i;
1710 /* the relationship between rrd and rfd is one map one */
1711 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1712 rrd_ring->next_to_clean)) {
1713 rrs->word3 &= ~RRS_RXD_UPDATED;
1714 if (++rrd_ring->next_to_clean == rrd_ring->count)
1715 rrd_ring->next_to_clean = 0;
1716 }
1717 }
1718
1719 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1720 struct atl1c_recv_ret_status *rrs, u16 num)
1721 {
1722 u16 i;
1723 u16 rfd_index;
1724 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1725
1726 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1727 RRS_RX_RFD_INDEX_MASK;
1728 for (i = 0; i < num; i++) {
1729 buffer_info[rfd_index].skb = NULL;
1730 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1731 ATL1C_BUFFER_FREE);
1732 if (++rfd_index == rfd_ring->count)
1733 rfd_index = 0;
1734 }
1735 rfd_ring->next_to_clean = rfd_index;
1736 }
1737
1738 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
1739 int *work_done, int work_to_do)
1740 {
1741 u16 rfd_num, rfd_index;
1742 u16 count = 0;
1743 u16 length;
1744 struct pci_dev *pdev = adapter->pdev;
1745 struct net_device *netdev = adapter->netdev;
1746 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1747 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
1748 struct sk_buff *skb;
1749 struct atl1c_recv_ret_status *rrs;
1750 struct atl1c_buffer *buffer_info;
1751
1752 while (1) {
1753 if (*work_done >= work_to_do)
1754 break;
1755 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1756 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1757 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1758 RRS_RX_RFD_CNT_MASK;
1759 if (unlikely(rfd_num != 1))
1760 /* TODO support mul rfd*/
1761 if (netif_msg_rx_err(adapter))
1762 dev_warn(&pdev->dev,
1763 "Multi rfd not support yet!\n");
1764 goto rrs_checked;
1765 } else {
1766 break;
1767 }
1768 rrs_checked:
1769 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1770 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1771 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1772 if (netif_msg_rx_err(adapter))
1773 dev_warn(&pdev->dev,
1774 "wrong packet! rrs word3 is %x\n",
1775 rrs->word3);
1776 continue;
1777 }
1778
1779 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1780 RRS_PKT_SIZE_MASK);
1781 /* Good Receive */
1782 if (likely(rfd_num == 1)) {
1783 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1784 RRS_RX_RFD_INDEX_MASK;
1785 buffer_info = &rfd_ring->buffer_info[rfd_index];
1786 pci_unmap_single(pdev, buffer_info->dma,
1787 buffer_info->length, PCI_DMA_FROMDEVICE);
1788 skb = buffer_info->skb;
1789 } else {
1790 /* TODO */
1791 if (netif_msg_rx_err(adapter))
1792 dev_warn(&pdev->dev,
1793 "Multi rfd not support yet!\n");
1794 break;
1795 }
1796 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1797 skb_put(skb, length - ETH_FCS_LEN);
1798 skb->protocol = eth_type_trans(skb, netdev);
1799 atl1c_rx_checksum(adapter, skb, rrs);
1800 if (rrs->word3 & RRS_VLAN_INS) {
1801 u16 vlan;
1802
1803 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1804 vlan = le16_to_cpu(vlan);
1805 __vlan_hwaccel_put_tag(skb, vlan);
1806 }
1807 netif_receive_skb(skb);
1808
1809 (*work_done)++;
1810 count++;
1811 }
1812 if (count)
1813 atl1c_alloc_rx_buffer(adapter);
1814 }
1815
1816 /**
1817 * atl1c_clean - NAPI Rx polling callback
1818 */
1819 static int atl1c_clean(struct napi_struct *napi, int budget)
1820 {
1821 struct atl1c_adapter *adapter =
1822 container_of(napi, struct atl1c_adapter, napi);
1823 int work_done = 0;
1824
1825 /* Keep link state information with original netdev */
1826 if (!netif_carrier_ok(adapter->netdev))
1827 goto quit_polling;
1828 /* just enable one RXQ */
1829 atl1c_clean_rx_irq(adapter, &work_done, budget);
1830
1831 if (work_done < budget) {
1832 quit_polling:
1833 napi_complete(napi);
1834 adapter->hw.intr_mask |= ISR_RX_PKT;
1835 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1836 }
1837 return work_done;
1838 }
1839
1840 #ifdef CONFIG_NET_POLL_CONTROLLER
1841
1842 /*
1843 * Polling 'interrupt' - used by things like netconsole to send skbs
1844 * without having to re-enable interrupts. It's not called while
1845 * the interrupt routine is executing.
1846 */
1847 static void atl1c_netpoll(struct net_device *netdev)
1848 {
1849 struct atl1c_adapter *adapter = netdev_priv(netdev);
1850
1851 disable_irq(adapter->pdev->irq);
1852 atl1c_intr(adapter->pdev->irq, netdev);
1853 enable_irq(adapter->pdev->irq);
1854 }
1855 #endif
1856
1857 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1858 {
1859 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1860 u16 next_to_use = 0;
1861 u16 next_to_clean = 0;
1862
1863 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1864 next_to_use = tpd_ring->next_to_use;
1865
1866 return (u16)(next_to_clean > next_to_use) ?
1867 (next_to_clean - next_to_use - 1) :
1868 (tpd_ring->count + next_to_clean - next_to_use - 1);
1869 }
1870
1871 /*
1872 * get next usable tpd
1873 * Note: should call atl1c_tdp_avail to make sure
1874 * there is enough tpd to use
1875 */
1876 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1877 enum atl1c_trans_queue type)
1878 {
1879 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1880 struct atl1c_tpd_desc *tpd_desc;
1881 u16 next_to_use = 0;
1882
1883 next_to_use = tpd_ring->next_to_use;
1884 if (++tpd_ring->next_to_use == tpd_ring->count)
1885 tpd_ring->next_to_use = 0;
1886 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1887 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1888 return tpd_desc;
1889 }
1890
1891 static struct atl1c_buffer *
1892 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1893 {
1894 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1895
1896 return &tpd_ring->buffer_info[tpd -
1897 (struct atl1c_tpd_desc *)tpd_ring->desc];
1898 }
1899
1900 /* Calculate the transmit packet descript needed*/
1901 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1902 {
1903 u16 tpd_req;
1904 u16 proto_hdr_len = 0;
1905
1906 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1907
1908 if (skb_is_gso(skb)) {
1909 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1910 if (proto_hdr_len < skb_headlen(skb))
1911 tpd_req++;
1912 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1913 tpd_req++;
1914 }
1915 return tpd_req;
1916 }
1917
1918 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1919 struct sk_buff *skb,
1920 struct atl1c_tpd_desc **tpd,
1921 enum atl1c_trans_queue type)
1922 {
1923 struct pci_dev *pdev = adapter->pdev;
1924 u8 hdr_len;
1925 u32 real_len;
1926 unsigned short offload_type;
1927 int err;
1928
1929 if (skb_is_gso(skb)) {
1930 if (skb_header_cloned(skb)) {
1931 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1932 if (unlikely(err))
1933 return -1;
1934 }
1935 offload_type = skb_shinfo(skb)->gso_type;
1936
1937 if (offload_type & SKB_GSO_TCPV4) {
1938 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1939 + ntohs(ip_hdr(skb)->tot_len));
1940
1941 if (real_len < skb->len)
1942 pskb_trim(skb, real_len);
1943
1944 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1945 if (unlikely(skb->len == hdr_len)) {
1946 /* only xsum need */
1947 if (netif_msg_tx_queued(adapter))
1948 dev_warn(&pdev->dev,
1949 "IPV4 tso with zero data??\n");
1950 goto check_sum;
1951 } else {
1952 ip_hdr(skb)->check = 0;
1953 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1954 ip_hdr(skb)->saddr,
1955 ip_hdr(skb)->daddr,
1956 0, IPPROTO_TCP, 0);
1957 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1958 }
1959 }
1960
1961 if (offload_type & SKB_GSO_TCPV6) {
1962 struct atl1c_tpd_ext_desc *etpd =
1963 *(struct atl1c_tpd_ext_desc **)(tpd);
1964
1965 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1966 *tpd = atl1c_get_tpd(adapter, type);
1967 ipv6_hdr(skb)->payload_len = 0;
1968 /* check payload == 0 byte ? */
1969 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1970 if (unlikely(skb->len == hdr_len)) {
1971 /* only xsum need */
1972 if (netif_msg_tx_queued(adapter))
1973 dev_warn(&pdev->dev,
1974 "IPV6 tso with zero data??\n");
1975 goto check_sum;
1976 } else
1977 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1978 &ipv6_hdr(skb)->saddr,
1979 &ipv6_hdr(skb)->daddr,
1980 0, IPPROTO_TCP, 0);
1981 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
1982 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
1983 etpd->pkt_len = cpu_to_le32(skb->len);
1984 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
1985 }
1986
1987 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
1988 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
1989 TPD_TCPHDR_OFFSET_SHIFT;
1990 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
1991 TPD_MSS_SHIFT;
1992 return 0;
1993 }
1994
1995 check_sum:
1996 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1997 u8 css, cso;
1998 cso = skb_checksum_start_offset(skb);
1999
2000 if (unlikely(cso & 0x1)) {
2001 if (netif_msg_tx_err(adapter))
2002 dev_err(&adapter->pdev->dev,
2003 "payload offset should not an event number\n");
2004 return -1;
2005 } else {
2006 css = cso + skb->csum_offset;
2007
2008 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2009 TPD_PLOADOFFSET_SHIFT;
2010 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2011 TPD_CCSUM_OFFSET_SHIFT;
2012 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2013 }
2014 }
2015 return 0;
2016 }
2017
2018 static void atl1c_tx_map(struct atl1c_adapter *adapter,
2019 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2020 enum atl1c_trans_queue type)
2021 {
2022 struct atl1c_tpd_desc *use_tpd = NULL;
2023 struct atl1c_buffer *buffer_info = NULL;
2024 u16 buf_len = skb_headlen(skb);
2025 u16 map_len = 0;
2026 u16 mapped_len = 0;
2027 u16 hdr_len = 0;
2028 u16 nr_frags;
2029 u16 f;
2030 int tso;
2031
2032 nr_frags = skb_shinfo(skb)->nr_frags;
2033 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2034 if (tso) {
2035 /* TSO */
2036 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2037 use_tpd = tpd;
2038
2039 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2040 buffer_info->length = map_len;
2041 buffer_info->dma = pci_map_single(adapter->pdev,
2042 skb->data, hdr_len, PCI_DMA_TODEVICE);
2043 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2044 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2045 ATL1C_PCIMAP_TODEVICE);
2046 mapped_len += map_len;
2047 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2048 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2049 }
2050
2051 if (mapped_len < buf_len) {
2052 /* mapped_len == 0, means we should use the first tpd,
2053 which is given by caller */
2054 if (mapped_len == 0)
2055 use_tpd = tpd;
2056 else {
2057 use_tpd = atl1c_get_tpd(adapter, type);
2058 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2059 }
2060 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2061 buffer_info->length = buf_len - mapped_len;
2062 buffer_info->dma =
2063 pci_map_single(adapter->pdev, skb->data + mapped_len,
2064 buffer_info->length, PCI_DMA_TODEVICE);
2065 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2066 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2067 ATL1C_PCIMAP_TODEVICE);
2068 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2069 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2070 }
2071
2072 for (f = 0; f < nr_frags; f++) {
2073 struct skb_frag_struct *frag;
2074
2075 frag = &skb_shinfo(skb)->frags[f];
2076
2077 use_tpd = atl1c_get_tpd(adapter, type);
2078 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2079
2080 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2081 buffer_info->length = skb_frag_size(frag);
2082 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2083 frag, 0,
2084 buffer_info->length,
2085 DMA_TO_DEVICE);
2086 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2087 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2088 ATL1C_PCIMAP_TODEVICE);
2089 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2090 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2091 }
2092
2093 /* The last tpd */
2094 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2095 /* The last buffer info contain the skb address,
2096 so it will be free after unmap */
2097 buffer_info->skb = skb;
2098 }
2099
2100 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2101 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2102 {
2103 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2104 u16 reg;
2105
2106 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
2107 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
2108 }
2109
2110 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2111 struct net_device *netdev)
2112 {
2113 struct atl1c_adapter *adapter = netdev_priv(netdev);
2114 unsigned long flags;
2115 u16 tpd_req = 1;
2116 struct atl1c_tpd_desc *tpd;
2117 enum atl1c_trans_queue type = atl1c_trans_normal;
2118
2119 if (test_bit(__AT_DOWN, &adapter->flags)) {
2120 dev_kfree_skb_any(skb);
2121 return NETDEV_TX_OK;
2122 }
2123
2124 tpd_req = atl1c_cal_tpd_req(skb);
2125 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2126 if (netif_msg_pktdata(adapter))
2127 dev_info(&adapter->pdev->dev, "tx locked\n");
2128 return NETDEV_TX_LOCKED;
2129 }
2130
2131 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2132 /* no enough descriptor, just stop queue */
2133 netif_stop_queue(netdev);
2134 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2135 return NETDEV_TX_BUSY;
2136 }
2137
2138 tpd = atl1c_get_tpd(adapter, type);
2139
2140 /* do TSO and check sum */
2141 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2142 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2143 dev_kfree_skb_any(skb);
2144 return NETDEV_TX_OK;
2145 }
2146
2147 if (unlikely(vlan_tx_tag_present(skb))) {
2148 u16 vlan = vlan_tx_tag_get(skb);
2149 __le16 tag;
2150
2151 vlan = cpu_to_le16(vlan);
2152 AT_VLAN_TO_TAG(vlan, tag);
2153 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2154 tpd->vlan_tag = tag;
2155 }
2156
2157 if (skb_network_offset(skb) != ETH_HLEN)
2158 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2159
2160 atl1c_tx_map(adapter, skb, tpd, type);
2161 atl1c_tx_queue(adapter, skb, tpd, type);
2162
2163 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2164 return NETDEV_TX_OK;
2165 }
2166
2167 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2168 {
2169 struct net_device *netdev = adapter->netdev;
2170
2171 free_irq(adapter->pdev->irq, netdev);
2172
2173 if (adapter->have_msi)
2174 pci_disable_msi(adapter->pdev);
2175 }
2176
2177 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2178 {
2179 struct pci_dev *pdev = adapter->pdev;
2180 struct net_device *netdev = adapter->netdev;
2181 int flags = 0;
2182 int err = 0;
2183
2184 adapter->have_msi = true;
2185 err = pci_enable_msi(adapter->pdev);
2186 if (err) {
2187 if (netif_msg_ifup(adapter))
2188 dev_err(&pdev->dev,
2189 "Unable to allocate MSI interrupt Error: %d\n",
2190 err);
2191 adapter->have_msi = false;
2192 }
2193
2194 if (!adapter->have_msi)
2195 flags |= IRQF_SHARED;
2196 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2197 netdev->name, netdev);
2198 if (err) {
2199 if (netif_msg_ifup(adapter))
2200 dev_err(&pdev->dev,
2201 "Unable to allocate interrupt Error: %d\n",
2202 err);
2203 if (adapter->have_msi)
2204 pci_disable_msi(adapter->pdev);
2205 return err;
2206 }
2207 if (netif_msg_ifup(adapter))
2208 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2209 return err;
2210 }
2211
2212
2213 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
2214 {
2215 /* release tx-pending skbs and reset tx/rx ring index */
2216 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2217 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2218 atl1c_clean_rx_ring(adapter);
2219 }
2220
2221 static int atl1c_up(struct atl1c_adapter *adapter)
2222 {
2223 struct net_device *netdev = adapter->netdev;
2224 int err;
2225
2226 netif_carrier_off(netdev);
2227
2228 err = atl1c_configure(adapter);
2229 if (unlikely(err))
2230 goto err_up;
2231
2232 err = atl1c_request_irq(adapter);
2233 if (unlikely(err))
2234 goto err_up;
2235
2236 atl1c_check_link_status(adapter);
2237 clear_bit(__AT_DOWN, &adapter->flags);
2238 napi_enable(&adapter->napi);
2239 atl1c_irq_enable(adapter);
2240 netif_start_queue(netdev);
2241 return err;
2242
2243 err_up:
2244 atl1c_clean_rx_ring(adapter);
2245 return err;
2246 }
2247
2248 static void atl1c_down(struct atl1c_adapter *adapter)
2249 {
2250 struct net_device *netdev = adapter->netdev;
2251
2252 atl1c_del_timer(adapter);
2253 adapter->work_event = 0; /* clear all event */
2254 /* signal that we're down so the interrupt handler does not
2255 * reschedule our watchdog timer */
2256 set_bit(__AT_DOWN, &adapter->flags);
2257 netif_carrier_off(netdev);
2258 napi_disable(&adapter->napi);
2259 atl1c_irq_disable(adapter);
2260 atl1c_free_irq(adapter);
2261 /* disable ASPM if device inactive */
2262 atl1c_disable_l0s_l1(&adapter->hw);
2263 /* reset MAC to disable all RX/TX */
2264 atl1c_reset_mac(&adapter->hw);
2265 msleep(1);
2266
2267 adapter->link_speed = SPEED_0;
2268 adapter->link_duplex = -1;
2269 atl1c_reset_dma_ring(adapter);
2270 }
2271
2272 /**
2273 * atl1c_open - Called when a network interface is made active
2274 * @netdev: network interface device structure
2275 *
2276 * Returns 0 on success, negative value on failure
2277 *
2278 * The open entry point is called when a network interface is made
2279 * active by the system (IFF_UP). At this point all resources needed
2280 * for transmit and receive operations are allocated, the interrupt
2281 * handler is registered with the OS, the watchdog timer is started,
2282 * and the stack is notified that the interface is ready.
2283 */
2284 static int atl1c_open(struct net_device *netdev)
2285 {
2286 struct atl1c_adapter *adapter = netdev_priv(netdev);
2287 int err;
2288
2289 /* disallow open during test */
2290 if (test_bit(__AT_TESTING, &adapter->flags))
2291 return -EBUSY;
2292
2293 /* allocate rx/tx dma buffer & descriptors */
2294 err = atl1c_setup_ring_resources(adapter);
2295 if (unlikely(err))
2296 return err;
2297
2298 err = atl1c_up(adapter);
2299 if (unlikely(err))
2300 goto err_up;
2301
2302 return 0;
2303
2304 err_up:
2305 atl1c_free_irq(adapter);
2306 atl1c_free_ring_resources(adapter);
2307 atl1c_reset_mac(&adapter->hw);
2308 return err;
2309 }
2310
2311 /**
2312 * atl1c_close - Disables a network interface
2313 * @netdev: network interface device structure
2314 *
2315 * Returns 0, this is not allowed to fail
2316 *
2317 * The close entry point is called when an interface is de-activated
2318 * by the OS. The hardware is still under the drivers control, but
2319 * needs to be disabled. A global MAC reset is issued to stop the
2320 * hardware, and all transmit and receive resources are freed.
2321 */
2322 static int atl1c_close(struct net_device *netdev)
2323 {
2324 struct atl1c_adapter *adapter = netdev_priv(netdev);
2325
2326 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2327 set_bit(__AT_DOWN, &adapter->flags);
2328 cancel_work_sync(&adapter->common_task);
2329 atl1c_down(adapter);
2330 atl1c_free_ring_resources(adapter);
2331 return 0;
2332 }
2333
2334 static int atl1c_suspend(struct device *dev)
2335 {
2336 struct pci_dev *pdev = to_pci_dev(dev);
2337 struct net_device *netdev = pci_get_drvdata(pdev);
2338 struct atl1c_adapter *adapter = netdev_priv(netdev);
2339 struct atl1c_hw *hw = &adapter->hw;
2340 u32 wufc = adapter->wol;
2341
2342 atl1c_disable_l0s_l1(hw);
2343 if (netif_running(netdev)) {
2344 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2345 atl1c_down(adapter);
2346 }
2347 netif_device_detach(netdev);
2348
2349 if (wufc)
2350 if (atl1c_phy_to_ps_link(hw) != 0)
2351 dev_dbg(&pdev->dev, "phy power saving failed");
2352
2353 atl1c_power_saving(hw, wufc);
2354
2355 return 0;
2356 }
2357
2358 #ifdef CONFIG_PM_SLEEP
2359 static int atl1c_resume(struct device *dev)
2360 {
2361 struct pci_dev *pdev = to_pci_dev(dev);
2362 struct net_device *netdev = pci_get_drvdata(pdev);
2363 struct atl1c_adapter *adapter = netdev_priv(netdev);
2364
2365 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2366 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2367
2368 atl1c_phy_reset(&adapter->hw);
2369 atl1c_reset_mac(&adapter->hw);
2370 atl1c_phy_init(&adapter->hw);
2371
2372 #if 0
2373 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2374 pm_data &= ~PM_CTRLSTAT_PME_EN;
2375 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2376 #endif
2377
2378 netif_device_attach(netdev);
2379 if (netif_running(netdev))
2380 atl1c_up(adapter);
2381
2382 return 0;
2383 }
2384 #endif
2385
2386 static void atl1c_shutdown(struct pci_dev *pdev)
2387 {
2388 struct net_device *netdev = pci_get_drvdata(pdev);
2389 struct atl1c_adapter *adapter = netdev_priv(netdev);
2390
2391 atl1c_suspend(&pdev->dev);
2392 pci_wake_from_d3(pdev, adapter->wol);
2393 pci_set_power_state(pdev, PCI_D3hot);
2394 }
2395
2396 static const struct net_device_ops atl1c_netdev_ops = {
2397 .ndo_open = atl1c_open,
2398 .ndo_stop = atl1c_close,
2399 .ndo_validate_addr = eth_validate_addr,
2400 .ndo_start_xmit = atl1c_xmit_frame,
2401 .ndo_set_mac_address = atl1c_set_mac_addr,
2402 .ndo_set_rx_mode = atl1c_set_multi,
2403 .ndo_change_mtu = atl1c_change_mtu,
2404 .ndo_fix_features = atl1c_fix_features,
2405 .ndo_set_features = atl1c_set_features,
2406 .ndo_do_ioctl = atl1c_ioctl,
2407 .ndo_tx_timeout = atl1c_tx_timeout,
2408 .ndo_get_stats = atl1c_get_stats,
2409 #ifdef CONFIG_NET_POLL_CONTROLLER
2410 .ndo_poll_controller = atl1c_netpoll,
2411 #endif
2412 };
2413
2414 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2415 {
2416 SET_NETDEV_DEV(netdev, &pdev->dev);
2417 pci_set_drvdata(pdev, netdev);
2418
2419 netdev->netdev_ops = &atl1c_netdev_ops;
2420 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2421 atl1c_set_ethtool_ops(netdev);
2422
2423 /* TODO: add when ready */
2424 netdev->hw_features = NETIF_F_SG |
2425 NETIF_F_HW_CSUM |
2426 NETIF_F_HW_VLAN_RX |
2427 NETIF_F_TSO |
2428 NETIF_F_TSO6;
2429 netdev->features = netdev->hw_features |
2430 NETIF_F_HW_VLAN_TX;
2431 return 0;
2432 }
2433
2434 /**
2435 * atl1c_probe - Device Initialization Routine
2436 * @pdev: PCI device information struct
2437 * @ent: entry in atl1c_pci_tbl
2438 *
2439 * Returns 0 on success, negative on failure
2440 *
2441 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2442 * The OS initialization, configuring of the adapter private structure,
2443 * and a hardware reset occur.
2444 */
2445 static int __devinit atl1c_probe(struct pci_dev *pdev,
2446 const struct pci_device_id *ent)
2447 {
2448 struct net_device *netdev;
2449 struct atl1c_adapter *adapter;
2450 static int cards_found;
2451
2452 int err = 0;
2453
2454 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2455 err = pci_enable_device_mem(pdev);
2456 if (err) {
2457 dev_err(&pdev->dev, "cannot enable PCI device\n");
2458 return err;
2459 }
2460
2461 /*
2462 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2463 * shared register for the high 32 bits, so only a single, aligned,
2464 * 4 GB physical address range can be used at a time.
2465 *
2466 * Supporting 64-bit DMA on this hardware is more trouble than it's
2467 * worth. It is far easier to limit to 32-bit DMA than update
2468 * various kernel subsystems to support the mechanics required by a
2469 * fixed-high-32-bit system.
2470 */
2471 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2472 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2473 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2474 goto err_dma;
2475 }
2476
2477 err = pci_request_regions(pdev, atl1c_driver_name);
2478 if (err) {
2479 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2480 goto err_pci_reg;
2481 }
2482
2483 pci_set_master(pdev);
2484
2485 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2486 if (netdev == NULL) {
2487 err = -ENOMEM;
2488 goto err_alloc_etherdev;
2489 }
2490
2491 err = atl1c_init_netdev(netdev, pdev);
2492 if (err) {
2493 dev_err(&pdev->dev, "init netdevice failed\n");
2494 goto err_init_netdev;
2495 }
2496 adapter = netdev_priv(netdev);
2497 adapter->bd_number = cards_found;
2498 adapter->netdev = netdev;
2499 adapter->pdev = pdev;
2500 adapter->hw.adapter = adapter;
2501 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2502 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2503 if (!adapter->hw.hw_addr) {
2504 err = -EIO;
2505 dev_err(&pdev->dev, "cannot map device registers\n");
2506 goto err_ioremap;
2507 }
2508
2509 /* init mii data */
2510 adapter->mii.dev = netdev;
2511 adapter->mii.mdio_read = atl1c_mdio_read;
2512 adapter->mii.mdio_write = atl1c_mdio_write;
2513 adapter->mii.phy_id_mask = 0x1f;
2514 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
2515 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2516 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2517 (unsigned long)adapter);
2518 /* setup the private structure */
2519 err = atl1c_sw_init(adapter);
2520 if (err) {
2521 dev_err(&pdev->dev, "net device private data init failed\n");
2522 goto err_sw_init;
2523 }
2524 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2525
2526 /* Init GPHY as early as possible due to power saving issue */
2527 atl1c_phy_reset(&adapter->hw);
2528
2529 err = atl1c_reset_mac(&adapter->hw);
2530 if (err) {
2531 err = -EIO;
2532 goto err_reset;
2533 }
2534
2535 /* reset the controller to
2536 * put the device in a known good starting state */
2537 err = atl1c_phy_init(&adapter->hw);
2538 if (err) {
2539 err = -EIO;
2540 goto err_reset;
2541 }
2542 if (atl1c_read_mac_addr(&adapter->hw)) {
2543 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2544 netdev->addr_assign_type |= NET_ADDR_RANDOM;
2545 }
2546 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2547 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2548 if (netif_msg_probe(adapter))
2549 dev_dbg(&pdev->dev, "mac address : %pM\n",
2550 adapter->hw.mac_addr);
2551
2552 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
2553 INIT_WORK(&adapter->common_task, atl1c_common_task);
2554 adapter->work_event = 0;
2555 err = register_netdev(netdev);
2556 if (err) {
2557 dev_err(&pdev->dev, "register netdevice failed\n");
2558 goto err_register;
2559 }
2560
2561 if (netif_msg_probe(adapter))
2562 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2563 cards_found++;
2564 return 0;
2565
2566 err_reset:
2567 err_register:
2568 err_sw_init:
2569 iounmap(adapter->hw.hw_addr);
2570 err_init_netdev:
2571 err_ioremap:
2572 free_netdev(netdev);
2573 err_alloc_etherdev:
2574 pci_release_regions(pdev);
2575 err_pci_reg:
2576 err_dma:
2577 pci_disable_device(pdev);
2578 return err;
2579 }
2580
2581 /**
2582 * atl1c_remove - Device Removal Routine
2583 * @pdev: PCI device information struct
2584 *
2585 * atl1c_remove is called by the PCI subsystem to alert the driver
2586 * that it should release a PCI device. The could be caused by a
2587 * Hot-Plug event, or because the driver is going to be removed from
2588 * memory.
2589 */
2590 static void __devexit atl1c_remove(struct pci_dev *pdev)
2591 {
2592 struct net_device *netdev = pci_get_drvdata(pdev);
2593 struct atl1c_adapter *adapter = netdev_priv(netdev);
2594
2595 unregister_netdev(netdev);
2596 /* restore permanent address */
2597 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
2598 atl1c_phy_disable(&adapter->hw);
2599
2600 iounmap(adapter->hw.hw_addr);
2601
2602 pci_release_regions(pdev);
2603 pci_disable_device(pdev);
2604 free_netdev(netdev);
2605 }
2606
2607 /**
2608 * atl1c_io_error_detected - called when PCI error is detected
2609 * @pdev: Pointer to PCI device
2610 * @state: The current pci connection state
2611 *
2612 * This function is called after a PCI bus error affecting
2613 * this device has been detected.
2614 */
2615 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2616 pci_channel_state_t state)
2617 {
2618 struct net_device *netdev = pci_get_drvdata(pdev);
2619 struct atl1c_adapter *adapter = netdev_priv(netdev);
2620
2621 netif_device_detach(netdev);
2622
2623 if (state == pci_channel_io_perm_failure)
2624 return PCI_ERS_RESULT_DISCONNECT;
2625
2626 if (netif_running(netdev))
2627 atl1c_down(adapter);
2628
2629 pci_disable_device(pdev);
2630
2631 /* Request a slot slot reset. */
2632 return PCI_ERS_RESULT_NEED_RESET;
2633 }
2634
2635 /**
2636 * atl1c_io_slot_reset - called after the pci bus has been reset.
2637 * @pdev: Pointer to PCI device
2638 *
2639 * Restart the card from scratch, as if from a cold-boot. Implementation
2640 * resembles the first-half of the e1000_resume routine.
2641 */
2642 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2643 {
2644 struct net_device *netdev = pci_get_drvdata(pdev);
2645 struct atl1c_adapter *adapter = netdev_priv(netdev);
2646
2647 if (pci_enable_device(pdev)) {
2648 if (netif_msg_hw(adapter))
2649 dev_err(&pdev->dev,
2650 "Cannot re-enable PCI device after reset\n");
2651 return PCI_ERS_RESULT_DISCONNECT;
2652 }
2653 pci_set_master(pdev);
2654
2655 pci_enable_wake(pdev, PCI_D3hot, 0);
2656 pci_enable_wake(pdev, PCI_D3cold, 0);
2657
2658 atl1c_reset_mac(&adapter->hw);
2659
2660 return PCI_ERS_RESULT_RECOVERED;
2661 }
2662
2663 /**
2664 * atl1c_io_resume - called when traffic can start flowing again.
2665 * @pdev: Pointer to PCI device
2666 *
2667 * This callback is called when the error recovery driver tells us that
2668 * its OK to resume normal operation. Implementation resembles the
2669 * second-half of the atl1c_resume routine.
2670 */
2671 static void atl1c_io_resume(struct pci_dev *pdev)
2672 {
2673 struct net_device *netdev = pci_get_drvdata(pdev);
2674 struct atl1c_adapter *adapter = netdev_priv(netdev);
2675
2676 if (netif_running(netdev)) {
2677 if (atl1c_up(adapter)) {
2678 if (netif_msg_hw(adapter))
2679 dev_err(&pdev->dev,
2680 "Cannot bring device back up after reset\n");
2681 return;
2682 }
2683 }
2684
2685 netif_device_attach(netdev);
2686 }
2687
2688 static struct pci_error_handlers atl1c_err_handler = {
2689 .error_detected = atl1c_io_error_detected,
2690 .slot_reset = atl1c_io_slot_reset,
2691 .resume = atl1c_io_resume,
2692 };
2693
2694 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2695
2696 static struct pci_driver atl1c_driver = {
2697 .name = atl1c_driver_name,
2698 .id_table = atl1c_pci_tbl,
2699 .probe = atl1c_probe,
2700 .remove = __devexit_p(atl1c_remove),
2701 .shutdown = atl1c_shutdown,
2702 .err_handler = &atl1c_err_handler,
2703 .driver.pm = &atl1c_pm_ops,
2704 };
2705
2706 /**
2707 * atl1c_init_module - Driver Registration Routine
2708 *
2709 * atl1c_init_module is the first routine called when the driver is
2710 * loaded. All it does is register with the PCI subsystem.
2711 */
2712 static int __init atl1c_init_module(void)
2713 {
2714 return pci_register_driver(&atl1c_driver);
2715 }
2716
2717 /**
2718 * atl1c_exit_module - Driver Exit Cleanup Routine
2719 *
2720 * atl1c_exit_module is called just before the driver is removed
2721 * from memory.
2722 */
2723 static void __exit atl1c_exit_module(void)
2724 {
2725 pci_unregister_driver(&atl1c_driver);
2726 }
2727
2728 module_init(atl1c_init_module);
2729 module_exit(atl1c_exit_module);
Linux ARM platform port for MOXA ART SoC