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Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / net / ethernet / dec / tulip / de2104x.c
blob61cc0934286582844279338f42d7b80fec942b81
1 /* de2104x.c: A Linux PCI Ethernet driver for Intel/Digital 21040/1 chips. */
2 /*
3 Copyright 2001,2003 Jeff Garzik <jgarzik@pobox.com>
4
5 Copyright 1994, 1995 Digital Equipment Corporation. [de4x5.c]
6 Written/copyright 1994-2001 by Donald Becker. [tulip.c]
7
8 This software may be used and distributed according to the terms of
9 the GNU General Public License (GPL), incorporated herein by reference.
10 Drivers based on or derived from this code fall under the GPL and must
11 retain the authorship, copyright and license notice. This file is not
12 a complete program and may only be used when the entire operating
13 system is licensed under the GPL.
14
15 See the file COPYING in this distribution for more information.
16
17 TODO, in rough priority order:
18 * Support forcing media type with a module parameter,
19 like dl2k.c/sundance.c
20 * Constants (module parms?) for Rx work limit
21 * Complete reset on PciErr
22 * Jumbo frames / dev->change_mtu
23 * Adjust Rx FIFO threshold and Max Rx DMA burst on Rx FIFO error
24 * Adjust Tx FIFO threshold and Max Tx DMA burst on Tx FIFO error
25 * Implement Tx software interrupt mitigation via
26 Tx descriptor bit
27
28 */
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #define DRV_NAME "de2104x"
33 #define DRV_VERSION "0.7"
34 #define DRV_RELDATE "Mar 17, 2004"
35
36 #include <linux/module.h>
37 #include <linux/kernel.h>
38 #include <linux/netdevice.h>
39 #include <linux/etherdevice.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/pci.h>
43 #include <linux/delay.h>
44 #include <linux/ethtool.h>
45 #include <linux/compiler.h>
46 #include <linux/rtnetlink.h>
47 #include <linux/crc32.h>
48 #include <linux/slab.h>
49
50 #include <asm/io.h>
51 #include <asm/irq.h>
52 #include <asm/uaccess.h>
53 #include <asm/unaligned.h>
54
55 /* These identify the driver base version and may not be removed. */
56 static char version[] =
57 "PCI Ethernet driver v" DRV_VERSION " (" DRV_RELDATE ")";
58
59 MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>");
60 MODULE_DESCRIPTION("Intel/Digital 21040/1 series PCI Ethernet driver");
61 MODULE_LICENSE("GPL");
62 MODULE_VERSION(DRV_VERSION);
63
64 static int debug = -1;
65 module_param (debug, int, 0);
66 MODULE_PARM_DESC (debug, "de2104x bitmapped message enable number");
67
68 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
69 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) || \
70 defined(CONFIG_SPARC) || defined(__ia64__) || \
71 defined(__sh__) || defined(__mips__)
72 static int rx_copybreak = 1518;
73 #else
74 static int rx_copybreak = 100;
75 #endif
76 module_param (rx_copybreak, int, 0);
77 MODULE_PARM_DESC (rx_copybreak, "de2104x Breakpoint at which Rx packets are copied");
78
79 #define DE_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
80 NETIF_MSG_PROBE | \
81 NETIF_MSG_LINK | \
82 NETIF_MSG_IFDOWN | \
83 NETIF_MSG_IFUP | \
84 NETIF_MSG_RX_ERR | \
85 NETIF_MSG_TX_ERR)
86
87 /* Descriptor skip length in 32 bit longwords. */
88 #ifndef CONFIG_DE2104X_DSL
89 #define DSL 0
90 #else
91 #define DSL CONFIG_DE2104X_DSL
92 #endif
93
94 #define DE_RX_RING_SIZE 64
95 #define DE_TX_RING_SIZE 64
96 #define DE_RING_BYTES \
97 ((sizeof(struct de_desc) * DE_RX_RING_SIZE) + \
98 (sizeof(struct de_desc) * DE_TX_RING_SIZE))
99 #define NEXT_TX(N) (((N) + 1) & (DE_TX_RING_SIZE - 1))
100 #define NEXT_RX(N) (((N) + 1) & (DE_RX_RING_SIZE - 1))
101 #define TX_BUFFS_AVAIL(CP) \
102 (((CP)->tx_tail <= (CP)->tx_head) ? \
103 (CP)->tx_tail + (DE_TX_RING_SIZE - 1) - (CP)->tx_head : \
104 (CP)->tx_tail - (CP)->tx_head - 1)
105
106 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
107 #define RX_OFFSET 2
108
109 #define DE_SETUP_SKB ((struct sk_buff *) 1)
110 #define DE_DUMMY_SKB ((struct sk_buff *) 2)
111 #define DE_SETUP_FRAME_WORDS 96
112 #define DE_EEPROM_WORDS 256
113 #define DE_EEPROM_SIZE (DE_EEPROM_WORDS * sizeof(u16))
114 #define DE_MAX_MEDIA 5
115
116 #define DE_MEDIA_TP_AUTO 0
117 #define DE_MEDIA_BNC 1
118 #define DE_MEDIA_AUI 2
119 #define DE_MEDIA_TP 3
120 #define DE_MEDIA_TP_FD 4
121 #define DE_MEDIA_INVALID DE_MAX_MEDIA
122 #define DE_MEDIA_FIRST 0
123 #define DE_MEDIA_LAST (DE_MAX_MEDIA - 1)
124 #define DE_AUI_BNC (SUPPORTED_AUI | SUPPORTED_BNC)
125
126 #define DE_TIMER_LINK (60 * HZ)
127 #define DE_TIMER_NO_LINK (5 * HZ)
128
129 #define DE_NUM_REGS 16
130 #define DE_REGS_SIZE (DE_NUM_REGS * sizeof(u32))
131 #define DE_REGS_VER 1
132
133 /* Time in jiffies before concluding the transmitter is hung. */
134 #define TX_TIMEOUT (6*HZ)
135
136 /* This is a mysterious value that can be written to CSR11 in the 21040 (only)
137 to support a pre-NWay full-duplex signaling mechanism using short frames.
138 No one knows what it should be, but if left at its default value some
139 10base2(!) packets trigger a full-duplex-request interrupt. */
140 #define FULL_DUPLEX_MAGIC 0x6969
141
142 enum {
143 /* NIC registers */
144 BusMode = 0x00,
145 TxPoll = 0x08,
146 RxPoll = 0x10,
147 RxRingAddr = 0x18,
148 TxRingAddr = 0x20,
149 MacStatus = 0x28,
150 MacMode = 0x30,
151 IntrMask = 0x38,
152 RxMissed = 0x40,
153 ROMCmd = 0x48,
154 CSR11 = 0x58,
155 SIAStatus = 0x60,
156 CSR13 = 0x68,
157 CSR14 = 0x70,
158 CSR15 = 0x78,
159 PCIPM = 0x40,
160
161 /* BusMode bits */
162 CmdReset = (1 << 0),
163 CacheAlign16 = 0x00008000,
164 BurstLen4 = 0x00000400,
165 DescSkipLen = (DSL << 2),
166
167 /* Rx/TxPoll bits */
168 NormalTxPoll = (1 << 0),
169 NormalRxPoll = (1 << 0),
170
171 /* Tx/Rx descriptor status bits */
172 DescOwn = (1 << 31),
173 RxError = (1 << 15),
174 RxErrLong = (1 << 7),
175 RxErrCRC = (1 << 1),
176 RxErrFIFO = (1 << 0),
177 RxErrRunt = (1 << 11),
178 RxErrFrame = (1 << 14),
179 RingEnd = (1 << 25),
180 FirstFrag = (1 << 29),
181 LastFrag = (1 << 30),
182 TxError = (1 << 15),
183 TxFIFOUnder = (1 << 1),
184 TxLinkFail = (1 << 2) | (1 << 10) | (1 << 11),
185 TxMaxCol = (1 << 8),
186 TxOWC = (1 << 9),
187 TxJabber = (1 << 14),
188 SetupFrame = (1 << 27),
189 TxSwInt = (1 << 31),
190
191 /* MacStatus bits */
192 IntrOK = (1 << 16),
193 IntrErr = (1 << 15),
194 RxIntr = (1 << 6),
195 RxEmpty = (1 << 7),
196 TxIntr = (1 << 0),
197 TxEmpty = (1 << 2),
198 PciErr = (1 << 13),
199 TxState = (1 << 22) | (1 << 21) | (1 << 20),
200 RxState = (1 << 19) | (1 << 18) | (1 << 17),
201 LinkFail = (1 << 12),
202 LinkPass = (1 << 4),
203 RxStopped = (1 << 8),
204 TxStopped = (1 << 1),
205
206 /* MacMode bits */
207 TxEnable = (1 << 13),
208 RxEnable = (1 << 1),
209 RxTx = TxEnable | RxEnable,
210 FullDuplex = (1 << 9),
211 AcceptAllMulticast = (1 << 7),
212 AcceptAllPhys = (1 << 6),
213 BOCnt = (1 << 5),
214 MacModeClear = (1<<12) | (1<<11) | (1<<10) | (1<<8) | (1<<3) |
215 RxTx | BOCnt | AcceptAllPhys | AcceptAllMulticast,
216
217 /* ROMCmd bits */
218 EE_SHIFT_CLK = 0x02, /* EEPROM shift clock. */
219 EE_CS = 0x01, /* EEPROM chip select. */
220 EE_DATA_WRITE = 0x04, /* Data from the Tulip to EEPROM. */
221 EE_WRITE_0 = 0x01,
222 EE_WRITE_1 = 0x05,
223 EE_DATA_READ = 0x08, /* Data from the EEPROM chip. */
224 EE_ENB = (0x4800 | EE_CS),
225
226 /* The EEPROM commands include the alway-set leading bit. */
227 EE_READ_CMD = 6,
228
229 /* RxMissed bits */
230 RxMissedOver = (1 << 16),
231 RxMissedMask = 0xffff,
232
233 /* SROM-related bits */
234 SROMC0InfoLeaf = 27,
235 MediaBlockMask = 0x3f,
236 MediaCustomCSRs = (1 << 6),
237
238 /* PCIPM bits */
239 PM_Sleep = (1 << 31),
240 PM_Snooze = (1 << 30),
241 PM_Mask = PM_Sleep | PM_Snooze,
242
243 /* SIAStatus bits */
244 NWayState = (1 << 14) | (1 << 13) | (1 << 12),
245 NWayRestart = (1 << 12),
246 NonselPortActive = (1 << 9),
247 SelPortActive = (1 << 8),
248 LinkFailStatus = (1 << 2),
249 NetCxnErr = (1 << 1),
250 };
251
252 static const u32 de_intr_mask =
253 IntrOK | IntrErr | RxIntr | RxEmpty | TxIntr | TxEmpty |
254 LinkPass | LinkFail | PciErr;
255
256 /*
257 * Set the programmable burst length to 4 longwords for all:
258 * DMA errors result without these values. Cache align 16 long.
259 */
260 static const u32 de_bus_mode = CacheAlign16 | BurstLen4 | DescSkipLen;
261
262 struct de_srom_media_block {
263 u8 opts;
264 u16 csr13;
265 u16 csr14;
266 u16 csr15;
267 } __packed;
268
269 struct de_srom_info_leaf {
270 u16 default_media;
271 u8 n_blocks;
272 u8 unused;
273 } __packed;
274
275 struct de_desc {
276 __le32 opts1;
277 __le32 opts2;
278 __le32 addr1;
279 __le32 addr2;
280 #if DSL
281 __le32 skip[DSL];
282 #endif
283 };
284
285 struct media_info {
286 u16 type; /* DE_MEDIA_xxx */
287 u16 csr13;
288 u16 csr14;
289 u16 csr15;
290 };
291
292 struct ring_info {
293 struct sk_buff *skb;
294 dma_addr_t mapping;
295 };
296
297 struct de_private {
298 unsigned tx_head;
299 unsigned tx_tail;
300 unsigned rx_tail;
301
302 void __iomem *regs;
303 struct net_device *dev;
304 spinlock_t lock;
305
306 struct de_desc *rx_ring;
307 struct de_desc *tx_ring;
308 struct ring_info tx_skb[DE_TX_RING_SIZE];
309 struct ring_info rx_skb[DE_RX_RING_SIZE];
310 unsigned rx_buf_sz;
311 dma_addr_t ring_dma;
312
313 u32 msg_enable;
314
315 struct net_device_stats net_stats;
316
317 struct pci_dev *pdev;
318
319 u16 setup_frame[DE_SETUP_FRAME_WORDS];
320
321 u32 media_type;
322 u32 media_supported;
323 u32 media_advertise;
324 struct media_info media[DE_MAX_MEDIA];
325 struct timer_list media_timer;
326
327 u8 *ee_data;
328 unsigned board_idx;
329 unsigned de21040 : 1;
330 unsigned media_lock : 1;
331 };
332
333
334 static void de_set_rx_mode (struct net_device *dev);
335 static void de_tx (struct de_private *de);
336 static void de_clean_rings (struct de_private *de);
337 static void de_media_interrupt (struct de_private *de, u32 status);
338 static void de21040_media_timer (unsigned long data);
339 static void de21041_media_timer (unsigned long data);
340 static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media);
341
342
343 static DEFINE_PCI_DEVICE_TABLE(de_pci_tbl) = {
344 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP,
345 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
346 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_PLUS,
347 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
348 { },
349 };
350 MODULE_DEVICE_TABLE(pci, de_pci_tbl);
351
352 static const char * const media_name[DE_MAX_MEDIA] = {
353 "10baseT auto",
354 "BNC",
355 "AUI",
356 "10baseT-HD",
357 "10baseT-FD"
358 };
359
360 /* 21040 transceiver register settings:
361 * TP AUTO(unused), BNC(unused), AUI, TP, TP FD*/
362 static u16 t21040_csr13[] = { 0, 0, 0x8F09, 0x8F01, 0x8F01, };
363 static u16 t21040_csr14[] = { 0, 0, 0x0705, 0xFFFF, 0xFFFD, };
364 static u16 t21040_csr15[] = { 0, 0, 0x0006, 0x0000, 0x0000, };
365
366 /* 21041 transceiver register settings: TP AUTO, BNC, AUI, TP, TP FD*/
367 static u16 t21041_csr13[] = { 0xEF01, 0xEF09, 0xEF09, 0xEF01, 0xEF09, };
368 static u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
369 /* If on-chip autonegotiation is broken, use half-duplex (FF3F) instead */
370 static u16 t21041_csr14_brk[] = { 0xFF3F, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
371 static u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
372
373
374 #define dr32(reg) ioread32(de->regs + (reg))
375 #define dw32(reg, val) iowrite32((val), de->regs + (reg))
376
377
378 static void de_rx_err_acct (struct de_private *de, unsigned rx_tail,
379 u32 status, u32 len)
380 {
381 netif_dbg(de, rx_err, de->dev,
382 "rx err, slot %d status 0x%x len %d\n",
383 rx_tail, status, len);
384
385 if ((status & 0x38000300) != 0x0300) {
386 /* Ingore earlier buffers. */
387 if ((status & 0xffff) != 0x7fff) {
388 netif_warn(de, rx_err, de->dev,
389 "Oversized Ethernet frame spanned multiple buffers, status %08x!\n",
390 status);
391 de->net_stats.rx_length_errors++;
392 }
393 } else if (status & RxError) {
394 /* There was a fatal error. */
395 de->net_stats.rx_errors++; /* end of a packet.*/
396 if (status & 0x0890) de->net_stats.rx_length_errors++;
397 if (status & RxErrCRC) de->net_stats.rx_crc_errors++;
398 if (status & RxErrFIFO) de->net_stats.rx_fifo_errors++;
399 }
400 }
401
402 static void de_rx (struct de_private *de)
403 {
404 unsigned rx_tail = de->rx_tail;
405 unsigned rx_work = DE_RX_RING_SIZE;
406 unsigned drop = 0;
407 int rc;
408
409 while (--rx_work) {
410 u32 status, len;
411 dma_addr_t mapping;
412 struct sk_buff *skb, *copy_skb;
413 unsigned copying_skb, buflen;
414
415 skb = de->rx_skb[rx_tail].skb;
416 BUG_ON(!skb);
417 rmb();
418 status = le32_to_cpu(de->rx_ring[rx_tail].opts1);
419 if (status & DescOwn)
420 break;
421
422 len = ((status >> 16) & 0x7ff) - 4;
423 mapping = de->rx_skb[rx_tail].mapping;
424
425 if (unlikely(drop)) {
426 de->net_stats.rx_dropped++;
427 goto rx_next;
428 }
429
430 if (unlikely((status & 0x38008300) != 0x0300)) {
431 de_rx_err_acct(de, rx_tail, status, len);
432 goto rx_next;
433 }
434
435 copying_skb = (len <= rx_copybreak);
436
437 netif_dbg(de, rx_status, de->dev,
438 "rx slot %d status 0x%x len %d copying? %d\n",
439 rx_tail, status, len, copying_skb);
440
441 buflen = copying_skb ? (len + RX_OFFSET) : de->rx_buf_sz;
442 copy_skb = netdev_alloc_skb(de->dev, buflen);
443 if (unlikely(!copy_skb)) {
444 de->net_stats.rx_dropped++;
445 drop = 1;
446 rx_work = 100;
447 goto rx_next;
448 }
449
450 if (!copying_skb) {
451 pci_unmap_single(de->pdev, mapping,
452 buflen, PCI_DMA_FROMDEVICE);
453 skb_put(skb, len);
454
455 mapping =
456 de->rx_skb[rx_tail].mapping =
457 pci_map_single(de->pdev, copy_skb->data,
458 buflen, PCI_DMA_FROMDEVICE);
459 de->rx_skb[rx_tail].skb = copy_skb;
460 } else {
461 pci_dma_sync_single_for_cpu(de->pdev, mapping, len, PCI_DMA_FROMDEVICE);
462 skb_reserve(copy_skb, RX_OFFSET);
463 skb_copy_from_linear_data(skb, skb_put(copy_skb, len),
464 len);
465 pci_dma_sync_single_for_device(de->pdev, mapping, len, PCI_DMA_FROMDEVICE);
466
467 /* We'll reuse the original ring buffer. */
468 skb = copy_skb;
469 }
470
471 skb->protocol = eth_type_trans (skb, de->dev);
472
473 de->net_stats.rx_packets++;
474 de->net_stats.rx_bytes += skb->len;
475 rc = netif_rx (skb);
476 if (rc == NET_RX_DROP)
477 drop = 1;
478
479 rx_next:
480 if (rx_tail == (DE_RX_RING_SIZE - 1))
481 de->rx_ring[rx_tail].opts2 =
482 cpu_to_le32(RingEnd | de->rx_buf_sz);
483 else
484 de->rx_ring[rx_tail].opts2 = cpu_to_le32(de->rx_buf_sz);
485 de->rx_ring[rx_tail].addr1 = cpu_to_le32(mapping);
486 wmb();
487 de->rx_ring[rx_tail].opts1 = cpu_to_le32(DescOwn);
488 rx_tail = NEXT_RX(rx_tail);
489 }
490
491 if (!rx_work)
492 netdev_warn(de->dev, "rx work limit reached\n");
493
494 de->rx_tail = rx_tail;
495 }
496
497 static irqreturn_t de_interrupt (int irq, void *dev_instance)
498 {
499 struct net_device *dev = dev_instance;
500 struct de_private *de = netdev_priv(dev);
501 u32 status;
502
503 status = dr32(MacStatus);
504 if ((!(status & (IntrOK|IntrErr))) || (status == 0xFFFF))
505 return IRQ_NONE;
506
507 netif_dbg(de, intr, dev, "intr, status %08x mode %08x desc %u/%u/%u\n",
508 status, dr32(MacMode),
509 de->rx_tail, de->tx_head, de->tx_tail);
510
511 dw32(MacStatus, status);
512
513 if (status & (RxIntr | RxEmpty)) {
514 de_rx(de);
515 if (status & RxEmpty)
516 dw32(RxPoll, NormalRxPoll);
517 }
518
519 spin_lock(&de->lock);
520
521 if (status & (TxIntr | TxEmpty))
522 de_tx(de);
523
524 if (status & (LinkPass | LinkFail))
525 de_media_interrupt(de, status);
526
527 spin_unlock(&de->lock);
528
529 if (status & PciErr) {
530 u16 pci_status;
531
532 pci_read_config_word(de->pdev, PCI_STATUS, &pci_status);
533 pci_write_config_word(de->pdev, PCI_STATUS, pci_status);
534 netdev_err(de->dev,
535 "PCI bus error, status=%08x, PCI status=%04x\n",
536 status, pci_status);
537 }
538
539 return IRQ_HANDLED;
540 }
541
542 static void de_tx (struct de_private *de)
543 {
544 unsigned tx_head = de->tx_head;
545 unsigned tx_tail = de->tx_tail;
546
547 while (tx_tail != tx_head) {
548 struct sk_buff *skb;
549 u32 status;
550
551 rmb();
552 status = le32_to_cpu(de->tx_ring[tx_tail].opts1);
553 if (status & DescOwn)
554 break;
555
556 skb = de->tx_skb[tx_tail].skb;
557 BUG_ON(!skb);
558 if (unlikely(skb == DE_DUMMY_SKB))
559 goto next;
560
561 if (unlikely(skb == DE_SETUP_SKB)) {
562 pci_unmap_single(de->pdev, de->tx_skb[tx_tail].mapping,
563 sizeof(de->setup_frame), PCI_DMA_TODEVICE);
564 goto next;
565 }
566
567 pci_unmap_single(de->pdev, de->tx_skb[tx_tail].mapping,
568 skb->len, PCI_DMA_TODEVICE);
569
570 if (status & LastFrag) {
571 if (status & TxError) {
572 netif_dbg(de, tx_err, de->dev,
573 "tx err, status 0x%x\n",
574 status);
575 de->net_stats.tx_errors++;
576 if (status & TxOWC)
577 de->net_stats.tx_window_errors++;
578 if (status & TxMaxCol)
579 de->net_stats.tx_aborted_errors++;
580 if (status & TxLinkFail)
581 de->net_stats.tx_carrier_errors++;
582 if (status & TxFIFOUnder)
583 de->net_stats.tx_fifo_errors++;
584 } else {
585 de->net_stats.tx_packets++;
586 de->net_stats.tx_bytes += skb->len;
587 netif_dbg(de, tx_done, de->dev,
588 "tx done, slot %d\n", tx_tail);
589 }
590 dev_kfree_skb_irq(skb);
591 }
592
593 next:
594 de->tx_skb[tx_tail].skb = NULL;
595
596 tx_tail = NEXT_TX(tx_tail);
597 }
598
599 de->tx_tail = tx_tail;
600
601 if (netif_queue_stopped(de->dev) && (TX_BUFFS_AVAIL(de) > (DE_TX_RING_SIZE / 4)))
602 netif_wake_queue(de->dev);
603 }
604
605 static netdev_tx_t de_start_xmit (struct sk_buff *skb,
606 struct net_device *dev)
607 {
608 struct de_private *de = netdev_priv(dev);
609 unsigned int entry, tx_free;
610 u32 mapping, len, flags = FirstFrag | LastFrag;
611 struct de_desc *txd;
612
613 spin_lock_irq(&de->lock);
614
615 tx_free = TX_BUFFS_AVAIL(de);
616 if (tx_free == 0) {
617 netif_stop_queue(dev);
618 spin_unlock_irq(&de->lock);
619 return NETDEV_TX_BUSY;
620 }
621 tx_free--;
622
623 entry = de->tx_head;
624
625 txd = &de->tx_ring[entry];
626
627 len = skb->len;
628 mapping = pci_map_single(de->pdev, skb->data, len, PCI_DMA_TODEVICE);
629 if (entry == (DE_TX_RING_SIZE - 1))
630 flags |= RingEnd;
631 if (!tx_free || (tx_free == (DE_TX_RING_SIZE / 2)))
632 flags |= TxSwInt;
633 flags |= len;
634 txd->opts2 = cpu_to_le32(flags);
635 txd->addr1 = cpu_to_le32(mapping);
636
637 de->tx_skb[entry].skb = skb;
638 de->tx_skb[entry].mapping = mapping;
639 wmb();
640
641 txd->opts1 = cpu_to_le32(DescOwn);
642 wmb();
643
644 de->tx_head = NEXT_TX(entry);
645 netif_dbg(de, tx_queued, dev, "tx queued, slot %d, skblen %d\n",
646 entry, skb->len);
647
648 if (tx_free == 0)
649 netif_stop_queue(dev);
650
651 spin_unlock_irq(&de->lock);
652
653 /* Trigger an immediate transmit demand. */
654 dw32(TxPoll, NormalTxPoll);
655
656 return NETDEV_TX_OK;
657 }
658
659 /* Set or clear the multicast filter for this adaptor.
660 Note that we only use exclusion around actually queueing the
661 new frame, not around filling de->setup_frame. This is non-deterministic
662 when re-entered but still correct. */
663
664 #undef set_bit_le
665 #define set_bit_le(i,p) do { ((char *)(p))[(i)/8] |= (1<<((i)%8)); } while(0)
666
667 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
668 {
669 struct de_private *de = netdev_priv(dev);
670 u16 hash_table[32];
671 struct netdev_hw_addr *ha;
672 int i;
673 u16 *eaddrs;
674
675 memset(hash_table, 0, sizeof(hash_table));
676 set_bit_le(255, hash_table); /* Broadcast entry */
677 /* This should work on big-endian machines as well. */
678 netdev_for_each_mc_addr(ha, dev) {
679 int index = ether_crc_le(ETH_ALEN, ha->addr) & 0x1ff;
680
681 set_bit_le(index, hash_table);
682 }
683
684 for (i = 0; i < 32; i++) {
685 *setup_frm++ = hash_table[i];
686 *setup_frm++ = hash_table[i];
687 }
688 setup_frm = &de->setup_frame[13*6];
689
690 /* Fill the final entry with our physical address. */
691 eaddrs = (u16 *)dev->dev_addr;
692 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
693 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
694 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
695 }
696
697 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
698 {
699 struct de_private *de = netdev_priv(dev);
700 struct netdev_hw_addr *ha;
701 u16 *eaddrs;
702
703 /* We have <= 14 addresses so we can use the wonderful
704 16 address perfect filtering of the Tulip. */
705 netdev_for_each_mc_addr(ha, dev) {
706 eaddrs = (u16 *) ha->addr;
707 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
708 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
709 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
710 }
711 /* Fill the unused entries with the broadcast address. */
712 memset(setup_frm, 0xff, (15 - netdev_mc_count(dev)) * 12);
713 setup_frm = &de->setup_frame[15*6];
714
715 /* Fill the final entry with our physical address. */
716 eaddrs = (u16 *)dev->dev_addr;
717 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
718 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
719 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
720 }
721
722
723 static void __de_set_rx_mode (struct net_device *dev)
724 {
725 struct de_private *de = netdev_priv(dev);
726 u32 macmode;
727 unsigned int entry;
728 u32 mapping;
729 struct de_desc *txd;
730 struct de_desc *dummy_txd = NULL;
731
732 macmode = dr32(MacMode) & ~(AcceptAllMulticast | AcceptAllPhys);
733
734 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
735 macmode |= AcceptAllMulticast | AcceptAllPhys;
736 goto out;
737 }
738
739 if ((netdev_mc_count(dev) > 1000) || (dev->flags & IFF_ALLMULTI)) {
740 /* Too many to filter well -- accept all multicasts. */
741 macmode |= AcceptAllMulticast;
742 goto out;
743 }
744
745 /* Note that only the low-address shortword of setup_frame is valid!
746 The values are doubled for big-endian architectures. */
747 if (netdev_mc_count(dev) > 14) /* Must use a multicast hash table. */
748 build_setup_frame_hash (de->setup_frame, dev);
749 else
750 build_setup_frame_perfect (de->setup_frame, dev);
751
752 /*
753 * Now add this frame to the Tx list.
754 */
755
756 entry = de->tx_head;
757
758 /* Avoid a chip errata by prefixing a dummy entry. */
759 if (entry != 0) {
760 de->tx_skb[entry].skb = DE_DUMMY_SKB;
761
762 dummy_txd = &de->tx_ring[entry];
763 dummy_txd->opts2 = (entry == (DE_TX_RING_SIZE - 1)) ?
764 cpu_to_le32(RingEnd) : 0;
765 dummy_txd->addr1 = 0;
766
767 /* Must set DescOwned later to avoid race with chip */
768
769 entry = NEXT_TX(entry);
770 }
771
772 de->tx_skb[entry].skb = DE_SETUP_SKB;
773 de->tx_skb[entry].mapping = mapping =
774 pci_map_single (de->pdev, de->setup_frame,
775 sizeof (de->setup_frame), PCI_DMA_TODEVICE);
776
777 /* Put the setup frame on the Tx list. */
778 txd = &de->tx_ring[entry];
779 if (entry == (DE_TX_RING_SIZE - 1))
780 txd->opts2 = cpu_to_le32(SetupFrame | RingEnd | sizeof (de->setup_frame));
781 else
782 txd->opts2 = cpu_to_le32(SetupFrame | sizeof (de->setup_frame));
783 txd->addr1 = cpu_to_le32(mapping);
784 wmb();
785
786 txd->opts1 = cpu_to_le32(DescOwn);
787 wmb();
788
789 if (dummy_txd) {
790 dummy_txd->opts1 = cpu_to_le32(DescOwn);
791 wmb();
792 }
793
794 de->tx_head = NEXT_TX(entry);
795
796 if (TX_BUFFS_AVAIL(de) == 0)
797 netif_stop_queue(dev);
798
799 /* Trigger an immediate transmit demand. */
800 dw32(TxPoll, NormalTxPoll);
801
802 out:
803 if (macmode != dr32(MacMode))
804 dw32(MacMode, macmode);
805 }
806
807 static void de_set_rx_mode (struct net_device *dev)
808 {
809 unsigned long flags;
810 struct de_private *de = netdev_priv(dev);
811
812 spin_lock_irqsave (&de->lock, flags);
813 __de_set_rx_mode(dev);
814 spin_unlock_irqrestore (&de->lock, flags);
815 }
816
817 static inline void de_rx_missed(struct de_private *de, u32 rx_missed)
818 {
819 if (unlikely(rx_missed & RxMissedOver))
820 de->net_stats.rx_missed_errors += RxMissedMask;
821 else
822 de->net_stats.rx_missed_errors += (rx_missed & RxMissedMask);
823 }
824
825 static void __de_get_stats(struct de_private *de)
826 {
827 u32 tmp = dr32(RxMissed); /* self-clearing */
828
829 de_rx_missed(de, tmp);
830 }
831
832 static struct net_device_stats *de_get_stats(struct net_device *dev)
833 {
834 struct de_private *de = netdev_priv(dev);
835
836 /* The chip only need report frame silently dropped. */
837 spin_lock_irq(&de->lock);
838 if (netif_running(dev) && netif_device_present(dev))
839 __de_get_stats(de);
840 spin_unlock_irq(&de->lock);
841
842 return &de->net_stats;
843 }
844
845 static inline int de_is_running (struct de_private *de)
846 {
847 return (dr32(MacStatus) & (RxState | TxState)) ? 1 : 0;
848 }
849
850 static void de_stop_rxtx (struct de_private *de)
851 {
852 u32 macmode;
853 unsigned int i = 1300/100;
854
855 macmode = dr32(MacMode);
856 if (macmode & RxTx) {
857 dw32(MacMode, macmode & ~RxTx);
858 dr32(MacMode);
859 }
860
861 /* wait until in-flight frame completes.
862 * Max time @ 10BT: 1500*8b/10Mbps == 1200us (+ 100us margin)
863 * Typically expect this loop to end in < 50 us on 100BT.
864 */
865 while (--i) {
866 if (!de_is_running(de))
867 return;
868 udelay(100);
869 }
870
871 netdev_warn(de->dev, "timeout expired, stopping DMA\n");
872 }
873
874 static inline void de_start_rxtx (struct de_private *de)
875 {
876 u32 macmode;
877
878 macmode = dr32(MacMode);
879 if ((macmode & RxTx) != RxTx) {
880 dw32(MacMode, macmode | RxTx);
881 dr32(MacMode);
882 }
883 }
884
885 static void de_stop_hw (struct de_private *de)
886 {
887
888 udelay(5);
889 dw32(IntrMask, 0);
890
891 de_stop_rxtx(de);
892
893 dw32(MacStatus, dr32(MacStatus));
894
895 udelay(10);
896
897 de->rx_tail = 0;
898 de->tx_head = de->tx_tail = 0;
899 }
900
901 static void de_link_up(struct de_private *de)
902 {
903 if (!netif_carrier_ok(de->dev)) {
904 netif_carrier_on(de->dev);
905 netif_info(de, link, de->dev, "link up, media %s\n",
906 media_name[de->media_type]);
907 }
908 }
909
910 static void de_link_down(struct de_private *de)
911 {
912 if (netif_carrier_ok(de->dev)) {
913 netif_carrier_off(de->dev);
914 netif_info(de, link, de->dev, "link down\n");
915 }
916 }
917
918 static void de_set_media (struct de_private *de)
919 {
920 unsigned media = de->media_type;
921 u32 macmode = dr32(MacMode);
922
923 if (de_is_running(de))
924 netdev_warn(de->dev, "chip is running while changing media!\n");
925
926 if (de->de21040)
927 dw32(CSR11, FULL_DUPLEX_MAGIC);
928 dw32(CSR13, 0); /* Reset phy */
929 dw32(CSR14, de->media[media].csr14);
930 dw32(CSR15, de->media[media].csr15);
931 dw32(CSR13, de->media[media].csr13);
932
933 /* must delay 10ms before writing to other registers,
934 * especially CSR6
935 */
936 mdelay(10);
937
938 if (media == DE_MEDIA_TP_FD)
939 macmode |= FullDuplex;
940 else
941 macmode &= ~FullDuplex;
942
943 netif_info(de, link, de->dev, "set link %s\n", media_name[media]);
944 netif_info(de, hw, de->dev, "mode 0x%x, sia 0x%x,0x%x,0x%x,0x%x\n",
945 dr32(MacMode), dr32(SIAStatus),
946 dr32(CSR13), dr32(CSR14), dr32(CSR15));
947 netif_info(de, hw, de->dev, "set mode 0x%x, set sia 0x%x,0x%x,0x%x\n",
948 macmode, de->media[media].csr13,
949 de->media[media].csr14, de->media[media].csr15);
950 if (macmode != dr32(MacMode))
951 dw32(MacMode, macmode);
952 }
953
954 static void de_next_media (struct de_private *de, const u32 *media,
955 unsigned int n_media)
956 {
957 unsigned int i;
958
959 for (i = 0; i < n_media; i++) {
960 if (de_ok_to_advertise(de, media[i])) {
961 de->media_type = media[i];
962 return;
963 }
964 }
965 }
966
967 static void de21040_media_timer (unsigned long data)
968 {
969 struct de_private *de = (struct de_private *) data;
970 struct net_device *dev = de->dev;
971 u32 status = dr32(SIAStatus);
972 unsigned int carrier;
973 unsigned long flags;
974
975 carrier = (status & NetCxnErr) ? 0 : 1;
976
977 if (carrier) {
978 if (de->media_type != DE_MEDIA_AUI && (status & LinkFailStatus))
979 goto no_link_yet;
980
981 de->media_timer.expires = jiffies + DE_TIMER_LINK;
982 add_timer(&de->media_timer);
983 if (!netif_carrier_ok(dev))
984 de_link_up(de);
985 else
986 netif_info(de, timer, dev, "%s link ok, status %x\n",
987 media_name[de->media_type], status);
988 return;
989 }
990
991 de_link_down(de);
992
993 if (de->media_lock)
994 return;
995
996 if (de->media_type == DE_MEDIA_AUI) {
997 static const u32 next_state = DE_MEDIA_TP;
998 de_next_media(de, &next_state, 1);
999 } else {
1000 static const u32 next_state = DE_MEDIA_AUI;
1001 de_next_media(de, &next_state, 1);
1002 }
1003
1004 spin_lock_irqsave(&de->lock, flags);
1005 de_stop_rxtx(de);
1006 spin_unlock_irqrestore(&de->lock, flags);
1007 de_set_media(de);
1008 de_start_rxtx(de);
1009
1010 no_link_yet:
1011 de->media_timer.expires = jiffies + DE_TIMER_NO_LINK;
1012 add_timer(&de->media_timer);
1013
1014 netif_info(de, timer, dev, "no link, trying media %s, status %x\n",
1015 media_name[de->media_type], status);
1016 }
1017
1018 static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media)
1019 {
1020 switch (new_media) {
1021 case DE_MEDIA_TP_AUTO:
1022 if (!(de->media_advertise & ADVERTISED_Autoneg))
1023 return 0;
1024 if (!(de->media_advertise & (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full)))
1025 return 0;
1026 break;
1027 case DE_MEDIA_BNC:
1028 if (!(de->media_advertise & ADVERTISED_BNC))
1029 return 0;
1030 break;
1031 case DE_MEDIA_AUI:
1032 if (!(de->media_advertise & ADVERTISED_AUI))
1033 return 0;
1034 break;
1035 case DE_MEDIA_TP:
1036 if (!(de->media_advertise & ADVERTISED_10baseT_Half))
1037 return 0;
1038 break;
1039 case DE_MEDIA_TP_FD:
1040 if (!(de->media_advertise & ADVERTISED_10baseT_Full))
1041 return 0;
1042 break;
1043 }
1044
1045 return 1;
1046 }
1047
1048 static void de21041_media_timer (unsigned long data)
1049 {
1050 struct de_private *de = (struct de_private *) data;
1051 struct net_device *dev = de->dev;
1052 u32 status = dr32(SIAStatus);
1053 unsigned int carrier;
1054 unsigned long flags;
1055
1056 /* clear port active bits */
1057 dw32(SIAStatus, NonselPortActive | SelPortActive);
1058
1059 carrier = (status & NetCxnErr) ? 0 : 1;
1060
1061 if (carrier) {
1062 if ((de->media_type == DE_MEDIA_TP_AUTO ||
1063 de->media_type == DE_MEDIA_TP ||
1064 de->media_type == DE_MEDIA_TP_FD) &&
1065 (status & LinkFailStatus))
1066 goto no_link_yet;
1067
1068 de->media_timer.expires = jiffies + DE_TIMER_LINK;
1069 add_timer(&de->media_timer);
1070 if (!netif_carrier_ok(dev))
1071 de_link_up(de);
1072 else
1073 netif_info(de, timer, dev,
1074 "%s link ok, mode %x status %x\n",
1075 media_name[de->media_type],
1076 dr32(MacMode), status);
1077 return;
1078 }
1079
1080 de_link_down(de);
1081
1082 /* if media type locked, don't switch media */
1083 if (de->media_lock)
1084 goto set_media;
1085
1086 /* if activity detected, use that as hint for new media type */
1087 if (status & NonselPortActive) {
1088 unsigned int have_media = 1;
1089
1090 /* if AUI/BNC selected, then activity is on TP port */
1091 if (de->media_type == DE_MEDIA_AUI ||
1092 de->media_type == DE_MEDIA_BNC) {
1093 if (de_ok_to_advertise(de, DE_MEDIA_TP_AUTO))
1094 de->media_type = DE_MEDIA_TP_AUTO;
1095 else
1096 have_media = 0;
1097 }
1098
1099 /* TP selected. If there is only TP and BNC, then it's BNC */
1100 else if (((de->media_supported & DE_AUI_BNC) == SUPPORTED_BNC) &&
1101 de_ok_to_advertise(de, DE_MEDIA_BNC))
1102 de->media_type = DE_MEDIA_BNC;
1103
1104 /* TP selected. If there is only TP and AUI, then it's AUI */
1105 else if (((de->media_supported & DE_AUI_BNC) == SUPPORTED_AUI) &&
1106 de_ok_to_advertise(de, DE_MEDIA_AUI))
1107 de->media_type = DE_MEDIA_AUI;
1108
1109 /* otherwise, ignore the hint */
1110 else
1111 have_media = 0;
1112
1113 if (have_media)
1114 goto set_media;
1115 }
1116
1117 /*
1118 * Absent or ambiguous activity hint, move to next advertised
1119 * media state. If de->media_type is left unchanged, this
1120 * simply resets the PHY and reloads the current media settings.
1121 */
1122 if (de->media_type == DE_MEDIA_AUI) {
1123 static const u32 next_states[] = {
1124 DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
1125 };
1126 de_next_media(de, next_states, ARRAY_SIZE(next_states));
1127 } else if (de->media_type == DE_MEDIA_BNC) {
1128 static const u32 next_states[] = {
1129 DE_MEDIA_TP_AUTO, DE_MEDIA_AUI
1130 };
1131 de_next_media(de, next_states, ARRAY_SIZE(next_states));
1132 } else {
1133 static const u32 next_states[] = {
1134 DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
1135 };
1136 de_next_media(de, next_states, ARRAY_SIZE(next_states));
1137 }
1138
1139 set_media:
1140 spin_lock_irqsave(&de->lock, flags);
1141 de_stop_rxtx(de);
1142 spin_unlock_irqrestore(&de->lock, flags);
1143 de_set_media(de);
1144 de_start_rxtx(de);
1145
1146 no_link_yet:
1147 de->media_timer.expires = jiffies + DE_TIMER_NO_LINK;
1148 add_timer(&de->media_timer);
1149
1150 netif_info(de, timer, dev, "no link, trying media %s, status %x\n",
1151 media_name[de->media_type], status);
1152 }
1153
1154 static void de_media_interrupt (struct de_private *de, u32 status)
1155 {
1156 if (status & LinkPass) {
1157 /* Ignore if current media is AUI or BNC and we can't use TP */
1158 if ((de->media_type == DE_MEDIA_AUI ||
1159 de->media_type == DE_MEDIA_BNC) &&
1160 (de->media_lock ||
1161 !de_ok_to_advertise(de, DE_MEDIA_TP_AUTO)))
1162 return;
1163 /* If current media is not TP, change it to TP */
1164 if ((de->media_type == DE_MEDIA_AUI ||
1165 de->media_type == DE_MEDIA_BNC)) {
1166 de->media_type = DE_MEDIA_TP_AUTO;
1167 de_stop_rxtx(de);
1168 de_set_media(de);
1169 de_start_rxtx(de);
1170 }
1171 de_link_up(de);
1172 mod_timer(&de->media_timer, jiffies + DE_TIMER_LINK);
1173 return;
1174 }
1175
1176 BUG_ON(!(status & LinkFail));
1177 /* Mark the link as down only if current media is TP */
1178 if (netif_carrier_ok(de->dev) && de->media_type != DE_MEDIA_AUI &&
1179 de->media_type != DE_MEDIA_BNC) {
1180 de_link_down(de);
1181 mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1182 }
1183 }
1184
1185 static int de_reset_mac (struct de_private *de)
1186 {
1187 u32 status, tmp;
1188
1189 /*
1190 * Reset MAC. de4x5.c and tulip.c examined for "advice"
1191 * in this area.
1192 */
1193
1194 if (dr32(BusMode) == 0xffffffff)
1195 return -EBUSY;
1196
1197 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
1198 dw32 (BusMode, CmdReset);
1199 mdelay (1);
1200
1201 dw32 (BusMode, de_bus_mode);
1202 mdelay (1);
1203
1204 for (tmp = 0; tmp < 5; tmp++) {
1205 dr32 (BusMode);
1206 mdelay (1);
1207 }
1208
1209 mdelay (1);
1210
1211 status = dr32(MacStatus);
1212 if (status & (RxState | TxState))
1213 return -EBUSY;
1214 if (status == 0xffffffff)
1215 return -ENODEV;
1216 return 0;
1217 }
1218
1219 static void de_adapter_wake (struct de_private *de)
1220 {
1221 u32 pmctl;
1222
1223 if (de->de21040)
1224 return;
1225
1226 pci_read_config_dword(de->pdev, PCIPM, &pmctl);
1227 if (pmctl & PM_Mask) {
1228 pmctl &= ~PM_Mask;
1229 pci_write_config_dword(de->pdev, PCIPM, pmctl);
1230
1231 /* de4x5.c delays, so we do too */
1232 msleep(10);
1233 }
1234 }
1235
1236 static void de_adapter_sleep (struct de_private *de)
1237 {
1238 u32 pmctl;
1239
1240 if (de->de21040)
1241 return;
1242
1243 dw32(CSR13, 0); /* Reset phy */
1244 pci_read_config_dword(de->pdev, PCIPM, &pmctl);
1245 pmctl |= PM_Sleep;
1246 pci_write_config_dword(de->pdev, PCIPM, pmctl);
1247 }
1248
1249 static int de_init_hw (struct de_private *de)
1250 {
1251 struct net_device *dev = de->dev;
1252 u32 macmode;
1253 int rc;
1254
1255 de_adapter_wake(de);
1256
1257 macmode = dr32(MacMode) & ~MacModeClear;
1258
1259 rc = de_reset_mac(de);
1260 if (rc)
1261 return rc;
1262
1263 de_set_media(de); /* reset phy */
1264
1265 dw32(RxRingAddr, de->ring_dma);
1266 dw32(TxRingAddr, de->ring_dma + (sizeof(struct de_desc) * DE_RX_RING_SIZE));
1267
1268 dw32(MacMode, RxTx | macmode);
1269
1270 dr32(RxMissed); /* self-clearing */
1271
1272 dw32(IntrMask, de_intr_mask);
1273
1274 de_set_rx_mode(dev);
1275
1276 return 0;
1277 }
1278
1279 static int de_refill_rx (struct de_private *de)
1280 {
1281 unsigned i;
1282
1283 for (i = 0; i < DE_RX_RING_SIZE; i++) {
1284 struct sk_buff *skb;
1285
1286 skb = netdev_alloc_skb(de->dev, de->rx_buf_sz);
1287 if (!skb)
1288 goto err_out;
1289
1290 de->rx_skb[i].mapping = pci_map_single(de->pdev,
1291 skb->data, de->rx_buf_sz, PCI_DMA_FROMDEVICE);
1292 de->rx_skb[i].skb = skb;
1293
1294 de->rx_ring[i].opts1 = cpu_to_le32(DescOwn);
1295 if (i == (DE_RX_RING_SIZE - 1))
1296 de->rx_ring[i].opts2 =
1297 cpu_to_le32(RingEnd | de->rx_buf_sz);
1298 else
1299 de->rx_ring[i].opts2 = cpu_to_le32(de->rx_buf_sz);
1300 de->rx_ring[i].addr1 = cpu_to_le32(de->rx_skb[i].mapping);
1301 de->rx_ring[i].addr2 = 0;
1302 }
1303
1304 return 0;
1305
1306 err_out:
1307 de_clean_rings(de);
1308 return -ENOMEM;
1309 }
1310
1311 static int de_init_rings (struct de_private *de)
1312 {
1313 memset(de->tx_ring, 0, sizeof(struct de_desc) * DE_TX_RING_SIZE);
1314 de->tx_ring[DE_TX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1315
1316 de->rx_tail = 0;
1317 de->tx_head = de->tx_tail = 0;
1318
1319 return de_refill_rx (de);
1320 }
1321
1322 static int de_alloc_rings (struct de_private *de)
1323 {
1324 de->rx_ring = pci_alloc_consistent(de->pdev, DE_RING_BYTES, &de->ring_dma);
1325 if (!de->rx_ring)
1326 return -ENOMEM;
1327 de->tx_ring = &de->rx_ring[DE_RX_RING_SIZE];
1328 return de_init_rings(de);
1329 }
1330
1331 static void de_clean_rings (struct de_private *de)
1332 {
1333 unsigned i;
1334
1335 memset(de->rx_ring, 0, sizeof(struct de_desc) * DE_RX_RING_SIZE);
1336 de->rx_ring[DE_RX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1337 wmb();
1338 memset(de->tx_ring, 0, sizeof(struct de_desc) * DE_TX_RING_SIZE);
1339 de->tx_ring[DE_TX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1340 wmb();
1341
1342 for (i = 0; i < DE_RX_RING_SIZE; i++) {
1343 if (de->rx_skb[i].skb) {
1344 pci_unmap_single(de->pdev, de->rx_skb[i].mapping,
1345 de->rx_buf_sz, PCI_DMA_FROMDEVICE);
1346 dev_kfree_skb(de->rx_skb[i].skb);
1347 }
1348 }
1349
1350 for (i = 0; i < DE_TX_RING_SIZE; i++) {
1351 struct sk_buff *skb = de->tx_skb[i].skb;
1352 if ((skb) && (skb != DE_DUMMY_SKB)) {
1353 if (skb != DE_SETUP_SKB) {
1354 de->net_stats.tx_dropped++;
1355 pci_unmap_single(de->pdev,
1356 de->tx_skb[i].mapping,
1357 skb->len, PCI_DMA_TODEVICE);
1358 dev_kfree_skb(skb);
1359 } else {
1360 pci_unmap_single(de->pdev,
1361 de->tx_skb[i].mapping,
1362 sizeof(de->setup_frame),
1363 PCI_DMA_TODEVICE);
1364 }
1365 }
1366 }
1367
1368 memset(&de->rx_skb, 0, sizeof(struct ring_info) * DE_RX_RING_SIZE);
1369 memset(&de->tx_skb, 0, sizeof(struct ring_info) * DE_TX_RING_SIZE);
1370 }
1371
1372 static void de_free_rings (struct de_private *de)
1373 {
1374 de_clean_rings(de);
1375 pci_free_consistent(de->pdev, DE_RING_BYTES, de->rx_ring, de->ring_dma);
1376 de->rx_ring = NULL;
1377 de->tx_ring = NULL;
1378 }
1379
1380 static int de_open (struct net_device *dev)
1381 {
1382 struct de_private *de = netdev_priv(dev);
1383 const int irq = de->pdev->irq;
1384 int rc;
1385
1386 netif_dbg(de, ifup, dev, "enabling interface\n");
1387
1388 de->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1389
1390 rc = de_alloc_rings(de);
1391 if (rc) {
1392 netdev_err(dev, "ring allocation failure, err=%d\n", rc);
1393 return rc;
1394 }
1395
1396 dw32(IntrMask, 0);
1397
1398 rc = request_irq(irq, de_interrupt, IRQF_SHARED, dev->name, dev);
1399 if (rc) {
1400 netdev_err(dev, "IRQ %d request failure, err=%d\n", irq, rc);
1401 goto err_out_free;
1402 }
1403
1404 rc = de_init_hw(de);
1405 if (rc) {
1406 netdev_err(dev, "h/w init failure, err=%d\n", rc);
1407 goto err_out_free_irq;
1408 }
1409
1410 netif_start_queue(dev);
1411 mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1412
1413 return 0;
1414
1415 err_out_free_irq:
1416 free_irq(irq, dev);
1417 err_out_free:
1418 de_free_rings(de);
1419 return rc;
1420 }
1421
1422 static int de_close (struct net_device *dev)
1423 {
1424 struct de_private *de = netdev_priv(dev);
1425 unsigned long flags;
1426
1427 netif_dbg(de, ifdown, dev, "disabling interface\n");
1428
1429 del_timer_sync(&de->media_timer);
1430
1431 spin_lock_irqsave(&de->lock, flags);
1432 de_stop_hw(de);
1433 netif_stop_queue(dev);
1434 netif_carrier_off(dev);
1435 spin_unlock_irqrestore(&de->lock, flags);
1436
1437 free_irq(de->pdev->irq, dev);
1438
1439 de_free_rings(de);
1440 de_adapter_sleep(de);
1441 return 0;
1442 }
1443
1444 static void de_tx_timeout (struct net_device *dev)
1445 {
1446 struct de_private *de = netdev_priv(dev);
1447 const int irq = de->pdev->irq;
1448
1449 netdev_dbg(dev, "NIC status %08x mode %08x sia %08x desc %u/%u/%u\n",
1450 dr32(MacStatus), dr32(MacMode), dr32(SIAStatus),
1451 de->rx_tail, de->tx_head, de->tx_tail);
1452
1453 del_timer_sync(&de->media_timer);
1454
1455 disable_irq(irq);
1456 spin_lock_irq(&de->lock);
1457
1458 de_stop_hw(de);
1459 netif_stop_queue(dev);
1460 netif_carrier_off(dev);
1461
1462 spin_unlock_irq(&de->lock);
1463 enable_irq(irq);
1464
1465 /* Update the error counts. */
1466 __de_get_stats(de);
1467
1468 synchronize_irq(irq);
1469 de_clean_rings(de);
1470
1471 de_init_rings(de);
1472
1473 de_init_hw(de);
1474
1475 netif_wake_queue(dev);
1476 }
1477
1478 static void __de_get_regs(struct de_private *de, u8 *buf)
1479 {
1480 int i;
1481 u32 *rbuf = (u32 *)buf;
1482
1483 /* read all CSRs */
1484 for (i = 0; i < DE_NUM_REGS; i++)
1485 rbuf[i] = dr32(i * 8);
1486
1487 /* handle self-clearing RxMissed counter, CSR8 */
1488 de_rx_missed(de, rbuf[8]);
1489 }
1490
1491 static int __de_get_settings(struct de_private *de, struct ethtool_cmd *ecmd)
1492 {
1493 ecmd->supported = de->media_supported;
1494 ecmd->transceiver = XCVR_INTERNAL;
1495 ecmd->phy_address = 0;
1496 ecmd->advertising = de->media_advertise;
1497
1498 switch (de->media_type) {
1499 case DE_MEDIA_AUI:
1500 ecmd->port = PORT_AUI;
1501 break;
1502 case DE_MEDIA_BNC:
1503 ecmd->port = PORT_BNC;
1504 break;
1505 default:
1506 ecmd->port = PORT_TP;
1507 break;
1508 }
1509
1510 ethtool_cmd_speed_set(ecmd, 10);
1511
1512 if (dr32(MacMode) & FullDuplex)
1513 ecmd->duplex = DUPLEX_FULL;
1514 else
1515 ecmd->duplex = DUPLEX_HALF;
1516
1517 if (de->media_lock)
1518 ecmd->autoneg = AUTONEG_DISABLE;
1519 else
1520 ecmd->autoneg = AUTONEG_ENABLE;
1521
1522 /* ignore maxtxpkt, maxrxpkt for now */
1523
1524 return 0;
1525 }
1526
1527 static int __de_set_settings(struct de_private *de, struct ethtool_cmd *ecmd)
1528 {
1529 u32 new_media;
1530 unsigned int media_lock;
1531
1532 if (ethtool_cmd_speed(ecmd) != 10)
1533 return -EINVAL;
1534 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1535 return -EINVAL;
1536 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI && ecmd->port != PORT_BNC)
1537 return -EINVAL;
1538 if (de->de21040 && ecmd->port == PORT_BNC)
1539 return -EINVAL;
1540 if (ecmd->transceiver != XCVR_INTERNAL)
1541 return -EINVAL;
1542 if (ecmd->autoneg != AUTONEG_DISABLE && ecmd->autoneg != AUTONEG_ENABLE)
1543 return -EINVAL;
1544 if (ecmd->advertising & ~de->media_supported)
1545 return -EINVAL;
1546 if (ecmd->autoneg == AUTONEG_ENABLE &&
1547 (!(ecmd->advertising & ADVERTISED_Autoneg)))
1548 return -EINVAL;
1549
1550 switch (ecmd->port) {
1551 case PORT_AUI:
1552 new_media = DE_MEDIA_AUI;
1553 if (!(ecmd->advertising & ADVERTISED_AUI))
1554 return -EINVAL;
1555 break;
1556 case PORT_BNC:
1557 new_media = DE_MEDIA_BNC;
1558 if (!(ecmd->advertising & ADVERTISED_BNC))
1559 return -EINVAL;
1560 break;
1561 default:
1562 if (ecmd->autoneg == AUTONEG_ENABLE)
1563 new_media = DE_MEDIA_TP_AUTO;
1564 else if (ecmd->duplex == DUPLEX_FULL)
1565 new_media = DE_MEDIA_TP_FD;
1566 else
1567 new_media = DE_MEDIA_TP;
1568 if (!(ecmd->advertising & ADVERTISED_TP))
1569 return -EINVAL;
1570 if (!(ecmd->advertising & (ADVERTISED_10baseT_Full | ADVERTISED_10baseT_Half)))
1571 return -EINVAL;
1572 break;
1573 }
1574
1575 media_lock = (ecmd->autoneg == AUTONEG_ENABLE) ? 0 : 1;
1576
1577 if ((new_media == de->media_type) &&
1578 (media_lock == de->media_lock) &&
1579 (ecmd->advertising == de->media_advertise))
1580 return 0; /* nothing to change */
1581
1582 de_link_down(de);
1583 mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1584 de_stop_rxtx(de);
1585
1586 de->media_type = new_media;
1587 de->media_lock = media_lock;
1588 de->media_advertise = ecmd->advertising;
1589 de_set_media(de);
1590 if (netif_running(de->dev))
1591 de_start_rxtx(de);
1592
1593 return 0;
1594 }
1595
1596 static void de_get_drvinfo (struct net_device *dev,struct ethtool_drvinfo *info)
1597 {
1598 struct de_private *de = netdev_priv(dev);
1599
1600 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1601 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1602 strlcpy(info->bus_info, pci_name(de->pdev), sizeof(info->bus_info));
1603 info->eedump_len = DE_EEPROM_SIZE;
1604 }
1605
1606 static int de_get_regs_len(struct net_device *dev)
1607 {
1608 return DE_REGS_SIZE;
1609 }
1610
1611 static int de_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1612 {
1613 struct de_private *de = netdev_priv(dev);
1614 int rc;
1615
1616 spin_lock_irq(&de->lock);
1617 rc = __de_get_settings(de, ecmd);
1618 spin_unlock_irq(&de->lock);
1619
1620 return rc;
1621 }
1622
1623 static int de_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1624 {
1625 struct de_private *de = netdev_priv(dev);
1626 int rc;
1627
1628 spin_lock_irq(&de->lock);
1629 rc = __de_set_settings(de, ecmd);
1630 spin_unlock_irq(&de->lock);
1631
1632 return rc;
1633 }
1634
1635 static u32 de_get_msglevel(struct net_device *dev)
1636 {
1637 struct de_private *de = netdev_priv(dev);
1638
1639 return de->msg_enable;
1640 }
1641
1642 static void de_set_msglevel(struct net_device *dev, u32 msglvl)
1643 {
1644 struct de_private *de = netdev_priv(dev);
1645
1646 de->msg_enable = msglvl;
1647 }
1648
1649 static int de_get_eeprom(struct net_device *dev,
1650 struct ethtool_eeprom *eeprom, u8 *data)
1651 {
1652 struct de_private *de = netdev_priv(dev);
1653
1654 if (!de->ee_data)
1655 return -EOPNOTSUPP;
1656 if ((eeprom->offset != 0) || (eeprom->magic != 0) ||
1657 (eeprom->len != DE_EEPROM_SIZE))
1658 return -EINVAL;
1659 memcpy(data, de->ee_data, eeprom->len);
1660
1661 return 0;
1662 }
1663
1664 static int de_nway_reset(struct net_device *dev)
1665 {
1666 struct de_private *de = netdev_priv(dev);
1667 u32 status;
1668
1669 if (de->media_type != DE_MEDIA_TP_AUTO)
1670 return -EINVAL;
1671 if (netif_carrier_ok(de->dev))
1672 de_link_down(de);
1673
1674 status = dr32(SIAStatus);
1675 dw32(SIAStatus, (status & ~NWayState) | NWayRestart);
1676 netif_info(de, link, dev, "link nway restart, status %x,%x\n",
1677 status, dr32(SIAStatus));
1678 return 0;
1679 }
1680
1681 static void de_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1682 void *data)
1683 {
1684 struct de_private *de = netdev_priv(dev);
1685
1686 regs->version = (DE_REGS_VER << 2) | de->de21040;
1687
1688 spin_lock_irq(&de->lock);
1689 __de_get_regs(de, data);
1690 spin_unlock_irq(&de->lock);
1691 }
1692
1693 static const struct ethtool_ops de_ethtool_ops = {
1694 .get_link = ethtool_op_get_link,
1695 .get_drvinfo = de_get_drvinfo,
1696 .get_regs_len = de_get_regs_len,
1697 .get_settings = de_get_settings,
1698 .set_settings = de_set_settings,
1699 .get_msglevel = de_get_msglevel,
1700 .set_msglevel = de_set_msglevel,
1701 .get_eeprom = de_get_eeprom,
1702 .nway_reset = de_nway_reset,
1703 .get_regs = de_get_regs,
1704 };
1705
1706 static void __devinit de21040_get_mac_address (struct de_private *de)
1707 {
1708 unsigned i;
1709
1710 dw32 (ROMCmd, 0); /* Reset the pointer with a dummy write. */
1711 udelay(5);
1712
1713 for (i = 0; i < 6; i++) {
1714 int value, boguscnt = 100000;
1715 do {
1716 value = dr32(ROMCmd);
1717 rmb();
1718 } while (value < 0 && --boguscnt > 0);
1719 de->dev->dev_addr[i] = value;
1720 udelay(1);
1721 if (boguscnt <= 0)
1722 pr_warn("timeout reading 21040 MAC address byte %u\n",
1723 i);
1724 }
1725 }
1726
1727 static void __devinit de21040_get_media_info(struct de_private *de)
1728 {
1729 unsigned int i;
1730
1731 de->media_type = DE_MEDIA_TP;
1732 de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Full |
1733 SUPPORTED_10baseT_Half | SUPPORTED_AUI;
1734 de->media_advertise = de->media_supported;
1735
1736 for (i = 0; i < DE_MAX_MEDIA; i++) {
1737 switch (i) {
1738 case DE_MEDIA_AUI:
1739 case DE_MEDIA_TP:
1740 case DE_MEDIA_TP_FD:
1741 de->media[i].type = i;
1742 de->media[i].csr13 = t21040_csr13[i];
1743 de->media[i].csr14 = t21040_csr14[i];
1744 de->media[i].csr15 = t21040_csr15[i];
1745 break;
1746 default:
1747 de->media[i].type = DE_MEDIA_INVALID;
1748 break;
1749 }
1750 }
1751 }
1752
1753 /* Note: this routine returns extra data bits for size detection. */
1754 static unsigned __devinit tulip_read_eeprom(void __iomem *regs, int location, int addr_len)
1755 {
1756 int i;
1757 unsigned retval = 0;
1758 void __iomem *ee_addr = regs + ROMCmd;
1759 int read_cmd = location | (EE_READ_CMD << addr_len);
1760
1761 writel(EE_ENB & ~EE_CS, ee_addr);
1762 writel(EE_ENB, ee_addr);
1763
1764 /* Shift the read command bits out. */
1765 for (i = 4 + addr_len; i >= 0; i--) {
1766 short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
1767 writel(EE_ENB | dataval, ee_addr);
1768 readl(ee_addr);
1769 writel(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1770 readl(ee_addr);
1771 retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
1772 }
1773 writel(EE_ENB, ee_addr);
1774 readl(ee_addr);
1775
1776 for (i = 16; i > 0; i--) {
1777 writel(EE_ENB | EE_SHIFT_CLK, ee_addr);
1778 readl(ee_addr);
1779 retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
1780 writel(EE_ENB, ee_addr);
1781 readl(ee_addr);
1782 }
1783
1784 /* Terminate the EEPROM access. */
1785 writel(EE_ENB & ~EE_CS, ee_addr);
1786 return retval;
1787 }
1788
1789 static void __devinit de21041_get_srom_info (struct de_private *de)
1790 {
1791 unsigned i, sa_offset = 0, ofs;
1792 u8 ee_data[DE_EEPROM_SIZE + 6] = {};
1793 unsigned ee_addr_size = tulip_read_eeprom(de->regs, 0xff, 8) & 0x40000 ? 8 : 6;
1794 struct de_srom_info_leaf *il;
1795 void *bufp;
1796
1797 /* download entire eeprom */
1798 for (i = 0; i < DE_EEPROM_WORDS; i++)
1799 ((__le16 *)ee_data)[i] =
1800 cpu_to_le16(tulip_read_eeprom(de->regs, i, ee_addr_size));
1801
1802 /* DEC now has a specification but early board makers
1803 just put the address in the first EEPROM locations. */
1804 /* This does memcmp(eedata, eedata+16, 8) */
1805
1806 #ifndef CONFIG_MIPS_COBALT
1807
1808 for (i = 0; i < 8; i ++)
1809 if (ee_data[i] != ee_data[16+i])
1810 sa_offset = 20;
1811
1812 #endif
1813
1814 /* store MAC address */
1815 for (i = 0; i < 6; i ++)
1816 de->dev->dev_addr[i] = ee_data[i + sa_offset];
1817
1818 /* get offset of controller 0 info leaf. ignore 2nd byte. */
1819 ofs = ee_data[SROMC0InfoLeaf];
1820 if (ofs >= (sizeof(ee_data) - sizeof(struct de_srom_info_leaf) - sizeof(struct de_srom_media_block)))
1821 goto bad_srom;
1822
1823 /* get pointer to info leaf */
1824 il = (struct de_srom_info_leaf *) &ee_data[ofs];
1825
1826 /* paranoia checks */
1827 if (il->n_blocks == 0)
1828 goto bad_srom;
1829 if ((sizeof(ee_data) - ofs) <
1830 (sizeof(struct de_srom_info_leaf) + (sizeof(struct de_srom_media_block) * il->n_blocks)))
1831 goto bad_srom;
1832
1833 /* get default media type */
1834 switch (get_unaligned(&il->default_media)) {
1835 case 0x0001: de->media_type = DE_MEDIA_BNC; break;
1836 case 0x0002: de->media_type = DE_MEDIA_AUI; break;
1837 case 0x0204: de->media_type = DE_MEDIA_TP_FD; break;
1838 default: de->media_type = DE_MEDIA_TP_AUTO; break;
1839 }
1840
1841 if (netif_msg_probe(de))
1842 pr_info("de%d: SROM leaf offset %u, default media %s\n",
1843 de->board_idx, ofs, media_name[de->media_type]);
1844
1845 /* init SIA register values to defaults */
1846 for (i = 0; i < DE_MAX_MEDIA; i++) {
1847 de->media[i].type = DE_MEDIA_INVALID;
1848 de->media[i].csr13 = 0xffff;
1849 de->media[i].csr14 = 0xffff;
1850 de->media[i].csr15 = 0xffff;
1851 }
1852
1853 /* parse media blocks to see what medias are supported,
1854 * and if any custom CSR values are provided
1855 */
1856 bufp = ((void *)il) + sizeof(*il);
1857 for (i = 0; i < il->n_blocks; i++) {
1858 struct de_srom_media_block *ib = bufp;
1859 unsigned idx;
1860
1861 /* index based on media type in media block */
1862 switch(ib->opts & MediaBlockMask) {
1863 case 0: /* 10baseT */
1864 de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Half
1865 | SUPPORTED_Autoneg;
1866 idx = DE_MEDIA_TP;
1867 de->media[DE_MEDIA_TP_AUTO].type = DE_MEDIA_TP_AUTO;
1868 break;
1869 case 1: /* BNC */
1870 de->media_supported |= SUPPORTED_BNC;
1871 idx = DE_MEDIA_BNC;
1872 break;
1873 case 2: /* AUI */
1874 de->media_supported |= SUPPORTED_AUI;
1875 idx = DE_MEDIA_AUI;
1876 break;
1877 case 4: /* 10baseT-FD */
1878 de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Full
1879 | SUPPORTED_Autoneg;
1880 idx = DE_MEDIA_TP_FD;
1881 de->media[DE_MEDIA_TP_AUTO].type = DE_MEDIA_TP_AUTO;
1882 break;
1883 default:
1884 goto bad_srom;
1885 }
1886
1887 de->media[idx].type = idx;
1888
1889 if (netif_msg_probe(de))
1890 pr_info("de%d: media block #%u: %s",
1891 de->board_idx, i,
1892 media_name[de->media[idx].type]);
1893
1894 bufp += sizeof (ib->opts);
1895
1896 if (ib->opts & MediaCustomCSRs) {
1897 de->media[idx].csr13 = get_unaligned(&ib->csr13);
1898 de->media[idx].csr14 = get_unaligned(&ib->csr14);
1899 de->media[idx].csr15 = get_unaligned(&ib->csr15);
1900 bufp += sizeof(ib->csr13) + sizeof(ib->csr14) +
1901 sizeof(ib->csr15);
1902
1903 if (netif_msg_probe(de))
1904 pr_cont(" (%x,%x,%x)\n",
1905 de->media[idx].csr13,
1906 de->media[idx].csr14,
1907 de->media[idx].csr15);
1908
1909 } else {
1910 if (netif_msg_probe(de))
1911 pr_cont("\n");
1912 }
1913
1914 if (bufp > ((void *)&ee_data[DE_EEPROM_SIZE - 3]))
1915 break;
1916 }
1917
1918 de->media_advertise = de->media_supported;
1919
1920 fill_defaults:
1921 /* fill in defaults, for cases where custom CSRs not used */
1922 for (i = 0; i < DE_MAX_MEDIA; i++) {
1923 if (de->media[i].csr13 == 0xffff)
1924 de->media[i].csr13 = t21041_csr13[i];
1925 if (de->media[i].csr14 == 0xffff) {
1926 /* autonegotiation is broken at least on some chip
1927 revisions - rev. 0x21 works, 0x11 does not */
1928 if (de->pdev->revision < 0x20)
1929 de->media[i].csr14 = t21041_csr14_brk[i];
1930 else
1931 de->media[i].csr14 = t21041_csr14[i];
1932 }
1933 if (de->media[i].csr15 == 0xffff)
1934 de->media[i].csr15 = t21041_csr15[i];
1935 }
1936
1937 de->ee_data = kmemdup(&ee_data[0], DE_EEPROM_SIZE, GFP_KERNEL);
1938
1939 return;
1940
1941 bad_srom:
1942 /* for error cases, it's ok to assume we support all these */
1943 for (i = 0; i < DE_MAX_MEDIA; i++)
1944 de->media[i].type = i;
1945 de->media_supported =
1946 SUPPORTED_10baseT_Half |
1947 SUPPORTED_10baseT_Full |
1948 SUPPORTED_Autoneg |
1949 SUPPORTED_TP |
1950 SUPPORTED_AUI |
1951 SUPPORTED_BNC;
1952 goto fill_defaults;
1953 }
1954
1955 static const struct net_device_ops de_netdev_ops = {
1956 .ndo_open = de_open,
1957 .ndo_stop = de_close,
1958 .ndo_set_rx_mode = de_set_rx_mode,
1959 .ndo_start_xmit = de_start_xmit,
1960 .ndo_get_stats = de_get_stats,
1961 .ndo_tx_timeout = de_tx_timeout,
1962 .ndo_change_mtu = eth_change_mtu,
1963 .ndo_set_mac_address = eth_mac_addr,
1964 .ndo_validate_addr = eth_validate_addr,
1965 };
1966
1967 static int __devinit de_init_one (struct pci_dev *pdev,
1968 const struct pci_device_id *ent)
1969 {
1970 struct net_device *dev;
1971 struct de_private *de;
1972 int rc;
1973 void __iomem *regs;
1974 unsigned long pciaddr;
1975 static int board_idx = -1;
1976
1977 board_idx++;
1978
1979 #ifndef MODULE
1980 if (board_idx == 0)
1981 pr_info("%s\n", version);
1982 #endif
1983
1984 /* allocate a new ethernet device structure, and fill in defaults */
1985 dev = alloc_etherdev(sizeof(struct de_private));
1986 if (!dev)
1987 return -ENOMEM;
1988
1989 dev->netdev_ops = &de_netdev_ops;
1990 SET_NETDEV_DEV(dev, &pdev->dev);
1991 dev->ethtool_ops = &de_ethtool_ops;
1992 dev->watchdog_timeo = TX_TIMEOUT;
1993
1994 de = netdev_priv(dev);
1995 de->de21040 = ent->driver_data == 0 ? 1 : 0;
1996 de->pdev = pdev;
1997 de->dev = dev;
1998 de->msg_enable = (debug < 0 ? DE_DEF_MSG_ENABLE : debug);
1999 de->board_idx = board_idx;
2000 spin_lock_init (&de->lock);
2001 init_timer(&de->media_timer);
2002 if (de->de21040)
2003 de->media_timer.function = de21040_media_timer;
2004 else
2005 de->media_timer.function = de21041_media_timer;
2006 de->media_timer.data = (unsigned long) de;
2007
2008 netif_carrier_off(dev);
2009
2010 /* wake up device, assign resources */
2011 rc = pci_enable_device(pdev);
2012 if (rc)
2013 goto err_out_free;
2014
2015 /* reserve PCI resources to ensure driver atomicity */
2016 rc = pci_request_regions(pdev, DRV_NAME);
2017 if (rc)
2018 goto err_out_disable;
2019
2020 /* check for invalid IRQ value */
2021 if (pdev->irq < 2) {
2022 rc = -EIO;
2023 pr_err("invalid irq (%d) for pci dev %s\n",
2024 pdev->irq, pci_name(pdev));
2025 goto err_out_res;
2026 }
2027
2028 /* obtain and check validity of PCI I/O address */
2029 pciaddr = pci_resource_start(pdev, 1);
2030 if (!pciaddr) {
2031 rc = -EIO;
2032 pr_err("no MMIO resource for pci dev %s\n", pci_name(pdev));
2033 goto err_out_res;
2034 }
2035 if (pci_resource_len(pdev, 1) < DE_REGS_SIZE) {
2036 rc = -EIO;
2037 pr_err("MMIO resource (%llx) too small on pci dev %s\n",
2038 (unsigned long long)pci_resource_len(pdev, 1),
2039 pci_name(pdev));
2040 goto err_out_res;
2041 }
2042
2043 /* remap CSR registers */
2044 regs = ioremap_nocache(pciaddr, DE_REGS_SIZE);
2045 if (!regs) {
2046 rc = -EIO;
2047 pr_err("Cannot map PCI MMIO (%llx@%lx) on pci dev %s\n",
2048 (unsigned long long)pci_resource_len(pdev, 1),
2049 pciaddr, pci_name(pdev));
2050 goto err_out_res;
2051 }
2052 de->regs = regs;
2053
2054 de_adapter_wake(de);
2055
2056 /* make sure hardware is not running */
2057 rc = de_reset_mac(de);
2058 if (rc) {
2059 pr_err("Cannot reset MAC, pci dev %s\n", pci_name(pdev));
2060 goto err_out_iomap;
2061 }
2062
2063 /* get MAC address, initialize default media type and
2064 * get list of supported media
2065 */
2066 if (de->de21040) {
2067 de21040_get_mac_address(de);
2068 de21040_get_media_info(de);
2069 } else {
2070 de21041_get_srom_info(de);
2071 }
2072
2073 /* register new network interface with kernel */
2074 rc = register_netdev(dev);
2075 if (rc)
2076 goto err_out_iomap;
2077
2078 /* print info about board and interface just registered */
2079 netdev_info(dev, "%s at %p, %pM, IRQ %d\n",
2080 de->de21040 ? "21040" : "21041",
2081 regs, dev->dev_addr, pdev->irq);
2082
2083 pci_set_drvdata(pdev, dev);
2084
2085 /* enable busmastering */
2086 pci_set_master(pdev);
2087
2088 /* put adapter to sleep */
2089 de_adapter_sleep(de);
2090
2091 return 0;
2092
2093 err_out_iomap:
2094 kfree(de->ee_data);
2095 iounmap(regs);
2096 err_out_res:
2097 pci_release_regions(pdev);
2098 err_out_disable:
2099 pci_disable_device(pdev);
2100 err_out_free:
2101 free_netdev(dev);
2102 return rc;
2103 }
2104
2105 static void __devexit de_remove_one (struct pci_dev *pdev)
2106 {
2107 struct net_device *dev = pci_get_drvdata(pdev);
2108 struct de_private *de = netdev_priv(dev);
2109
2110 BUG_ON(!dev);
2111 unregister_netdev(dev);
2112 kfree(de->ee_data);
2113 iounmap(de->regs);
2114 pci_release_regions(pdev);
2115 pci_disable_device(pdev);
2116 pci_set_drvdata(pdev, NULL);
2117 free_netdev(dev);
2118 }
2119
2120 #ifdef CONFIG_PM
2121
2122 static int de_suspend (struct pci_dev *pdev, pm_message_t state)
2123 {
2124 struct net_device *dev = pci_get_drvdata (pdev);
2125 struct de_private *de = netdev_priv(dev);
2126
2127 rtnl_lock();
2128 if (netif_running (dev)) {
2129 const int irq = pdev->irq;
2130
2131 del_timer_sync(&de->media_timer);
2132
2133 disable_irq(irq);
2134 spin_lock_irq(&de->lock);
2135
2136 de_stop_hw(de);
2137 netif_stop_queue(dev);
2138 netif_device_detach(dev);
2139 netif_carrier_off(dev);
2140
2141 spin_unlock_irq(&de->lock);
2142 enable_irq(irq);
2143
2144 /* Update the error counts. */
2145 __de_get_stats(de);
2146
2147 synchronize_irq(irq);
2148 de_clean_rings(de);
2149
2150 de_adapter_sleep(de);
2151 pci_disable_device(pdev);
2152 } else {
2153 netif_device_detach(dev);
2154 }
2155 rtnl_unlock();
2156 return 0;
2157 }
2158
2159 static int de_resume (struct pci_dev *pdev)
2160 {
2161 struct net_device *dev = pci_get_drvdata (pdev);
2162 struct de_private *de = netdev_priv(dev);
2163 int retval = 0;
2164
2165 rtnl_lock();
2166 if (netif_device_present(dev))
2167 goto out;
2168 if (!netif_running(dev))
2169 goto out_attach;
2170 if ((retval = pci_enable_device(pdev))) {
2171 netdev_err(dev, "pci_enable_device failed in resume\n");
2172 goto out;
2173 }
2174 pci_set_master(pdev);
2175 de_init_rings(de);
2176 de_init_hw(de);
2177 out_attach:
2178 netif_device_attach(dev);
2179 out:
2180 rtnl_unlock();
2181 return 0;
2182 }
2183
2184 #endif /* CONFIG_PM */
2185
2186 static struct pci_driver de_driver = {
2187 .name = DRV_NAME,
2188 .id_table = de_pci_tbl,
2189 .probe = de_init_one,
2190 .remove = __devexit_p(de_remove_one),
2191 #ifdef CONFIG_PM
2192 .suspend = de_suspend,
2193 .resume = de_resume,
2194 #endif
2195 };
2196
2197 static int __init de_init (void)
2198 {
2199 #ifdef MODULE
2200 pr_info("%s\n", version);
2201 #endif
2202 return pci_register_driver(&de_driver);
2203 }
2204
2205 static void __exit de_exit (void)
2206 {
2207 pci_unregister_driver (&de_driver);
2208 }
2209
2210 module_init(de_init);
2211 module_exit(de_exit);
Linux ARM platform port for MOXA ART SoC