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Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / net / ethernet / intel / ixgbevf / ethtool.c
blob8f2070439b5966fdc515eef68f07ebbda4ef1bba
1 /*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 /* ethtool support for ixgbevf */
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/types.h>
33 #include <linux/module.h>
34 #include <linux/slab.h>
35 #include <linux/pci.h>
36 #include <linux/netdevice.h>
37 #include <linux/ethtool.h>
38 #include <linux/vmalloc.h>
39 #include <linux/if_vlan.h>
40 #include <linux/uaccess.h>
41
42 #include "ixgbevf.h"
43
44 #define IXGBE_ALL_RAR_ENTRIES 16
45
46 struct ixgbe_stats {
47 char stat_string[ETH_GSTRING_LEN];
48 int sizeof_stat;
49 int stat_offset;
50 int base_stat_offset;
51 int saved_reset_offset;
52 };
53
54 #define IXGBEVF_STAT(m, b, r) sizeof(((struct ixgbevf_adapter *)0)->m), \
55 offsetof(struct ixgbevf_adapter, m), \
56 offsetof(struct ixgbevf_adapter, b), \
57 offsetof(struct ixgbevf_adapter, r)
58
59 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
60 {"rx_packets", IXGBEVF_STAT(stats.vfgprc, stats.base_vfgprc,
61 stats.saved_reset_vfgprc)},
62 {"tx_packets", IXGBEVF_STAT(stats.vfgptc, stats.base_vfgptc,
63 stats.saved_reset_vfgptc)},
64 {"rx_bytes", IXGBEVF_STAT(stats.vfgorc, stats.base_vfgorc,
65 stats.saved_reset_vfgorc)},
66 {"tx_bytes", IXGBEVF_STAT(stats.vfgotc, stats.base_vfgotc,
67 stats.saved_reset_vfgotc)},
68 {"tx_busy", IXGBEVF_STAT(tx_busy, zero_base, zero_base)},
69 {"multicast", IXGBEVF_STAT(stats.vfmprc, stats.base_vfmprc,
70 stats.saved_reset_vfmprc)},
71 {"rx_csum_offload_good", IXGBEVF_STAT(hw_csum_rx_good, zero_base,
72 zero_base)},
73 {"rx_csum_offload_errors", IXGBEVF_STAT(hw_csum_rx_error, zero_base,
74 zero_base)},
75 {"tx_csum_offload_ctxt", IXGBEVF_STAT(hw_csum_tx_good, zero_base,
76 zero_base)},
77 };
78
79 #define IXGBE_QUEUE_STATS_LEN 0
80 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
81
82 #define IXGBEVF_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
83 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
84 "Register test (offline)",
85 "Link test (on/offline)"
86 };
87 #define IXGBE_TEST_LEN (sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN)
88
89 static int ixgbevf_get_settings(struct net_device *netdev,
90 struct ethtool_cmd *ecmd)
91 {
92 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
93 struct ixgbe_hw *hw = &adapter->hw;
94 u32 link_speed = 0;
95 bool link_up;
96
97 ecmd->supported = SUPPORTED_10000baseT_Full;
98 ecmd->autoneg = AUTONEG_DISABLE;
99 ecmd->transceiver = XCVR_DUMMY1;
100 ecmd->port = -1;
101
102 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
103
104 if (link_up) {
105 __u32 speed = SPEED_10000;
106 switch (link_speed) {
107 case IXGBE_LINK_SPEED_10GB_FULL:
108 speed = SPEED_10000;
109 break;
110 case IXGBE_LINK_SPEED_1GB_FULL:
111 speed = SPEED_1000;
112 break;
113 case IXGBE_LINK_SPEED_100_FULL:
114 speed = SPEED_100;
115 break;
116 }
117
118 ethtool_cmd_speed_set(ecmd, speed);
119 ecmd->duplex = DUPLEX_FULL;
120 } else {
121 ethtool_cmd_speed_set(ecmd, -1);
122 ecmd->duplex = -1;
123 }
124
125 return 0;
126 }
127
128 static u32 ixgbevf_get_msglevel(struct net_device *netdev)
129 {
130 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
131 return adapter->msg_enable;
132 }
133
134 static void ixgbevf_set_msglevel(struct net_device *netdev, u32 data)
135 {
136 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
137 adapter->msg_enable = data;
138 }
139
140 #define IXGBE_GET_STAT(_A_, _R_) (_A_->stats._R_)
141
142 static char *ixgbevf_reg_names[] = {
143 "IXGBE_VFCTRL",
144 "IXGBE_VFSTATUS",
145 "IXGBE_VFLINKS",
146 "IXGBE_VFRXMEMWRAP",
147 "IXGBE_VFFRTIMER",
148 "IXGBE_VTEICR",
149 "IXGBE_VTEICS",
150 "IXGBE_VTEIMS",
151 "IXGBE_VTEIMC",
152 "IXGBE_VTEIAC",
153 "IXGBE_VTEIAM",
154 "IXGBE_VTEITR",
155 "IXGBE_VTIVAR",
156 "IXGBE_VTIVAR_MISC",
157 "IXGBE_VFRDBAL0",
158 "IXGBE_VFRDBAL1",
159 "IXGBE_VFRDBAH0",
160 "IXGBE_VFRDBAH1",
161 "IXGBE_VFRDLEN0",
162 "IXGBE_VFRDLEN1",
163 "IXGBE_VFRDH0",
164 "IXGBE_VFRDH1",
165 "IXGBE_VFRDT0",
166 "IXGBE_VFRDT1",
167 "IXGBE_VFRXDCTL0",
168 "IXGBE_VFRXDCTL1",
169 "IXGBE_VFSRRCTL0",
170 "IXGBE_VFSRRCTL1",
171 "IXGBE_VFPSRTYPE",
172 "IXGBE_VFTDBAL0",
173 "IXGBE_VFTDBAL1",
174 "IXGBE_VFTDBAH0",
175 "IXGBE_VFTDBAH1",
176 "IXGBE_VFTDLEN0",
177 "IXGBE_VFTDLEN1",
178 "IXGBE_VFTDH0",
179 "IXGBE_VFTDH1",
180 "IXGBE_VFTDT0",
181 "IXGBE_VFTDT1",
182 "IXGBE_VFTXDCTL0",
183 "IXGBE_VFTXDCTL1",
184 "IXGBE_VFTDWBAL0",
185 "IXGBE_VFTDWBAL1",
186 "IXGBE_VFTDWBAH0",
187 "IXGBE_VFTDWBAH1"
188 };
189
190
191 static int ixgbevf_get_regs_len(struct net_device *netdev)
192 {
193 return (ARRAY_SIZE(ixgbevf_reg_names)) * sizeof(u32);
194 }
195
196 static void ixgbevf_get_regs(struct net_device *netdev,
197 struct ethtool_regs *regs,
198 void *p)
199 {
200 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
201 struct ixgbe_hw *hw = &adapter->hw;
202 u32 *regs_buff = p;
203 u32 regs_len = ixgbevf_get_regs_len(netdev);
204 u8 i;
205
206 memset(p, 0, regs_len);
207
208 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
209
210 /* General Registers */
211 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_VFCTRL);
212 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_VFSTATUS);
213 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
214 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_VFRXMEMWRAP);
215 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_VFFRTIMER);
216
217 /* Interrupt */
218 /* don't read EICR because it can clear interrupt causes, instead
219 * read EICS which is a shadow but doesn't clear EICR */
220 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_VTEICS);
221 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_VTEICS);
222 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_VTEIMS);
223 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_VTEIMC);
224 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_VTEIAC);
225 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_VTEIAM);
226 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_VTEITR(0));
227 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_VTIVAR(0));
228 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
229
230 /* Receive DMA */
231 for (i = 0; i < 2; i++)
232 regs_buff[14 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDBAL(i));
233 for (i = 0; i < 2; i++)
234 regs_buff[16 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDBAH(i));
235 for (i = 0; i < 2; i++)
236 regs_buff[18 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDLEN(i));
237 for (i = 0; i < 2; i++)
238 regs_buff[20 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDH(i));
239 for (i = 0; i < 2; i++)
240 regs_buff[22 + i] = IXGBE_READ_REG(hw, IXGBE_VFRDT(i));
241 for (i = 0; i < 2; i++)
242 regs_buff[24 + i] = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
243 for (i = 0; i < 2; i++)
244 regs_buff[26 + i] = IXGBE_READ_REG(hw, IXGBE_VFSRRCTL(i));
245
246 /* Receive */
247 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_VFPSRTYPE);
248
249 /* Transmit */
250 for (i = 0; i < 2; i++)
251 regs_buff[29 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDBAL(i));
252 for (i = 0; i < 2; i++)
253 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDBAH(i));
254 for (i = 0; i < 2; i++)
255 regs_buff[33 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDLEN(i));
256 for (i = 0; i < 2; i++)
257 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDH(i));
258 for (i = 0; i < 2; i++)
259 regs_buff[37 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDT(i));
260 for (i = 0; i < 2; i++)
261 regs_buff[39 + i] = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
262 for (i = 0; i < 2; i++)
263 regs_buff[41 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDWBAL(i));
264 for (i = 0; i < 2; i++)
265 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_VFTDWBAH(i));
266
267 for (i = 0; i < ARRAY_SIZE(ixgbevf_reg_names); i++)
268 hw_dbg(hw, "%s\t%8.8x\n", ixgbevf_reg_names[i], regs_buff[i]);
269 }
270
271 static void ixgbevf_get_drvinfo(struct net_device *netdev,
272 struct ethtool_drvinfo *drvinfo)
273 {
274 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
275
276 strlcpy(drvinfo->driver, ixgbevf_driver_name, sizeof(drvinfo->driver));
277 strlcpy(drvinfo->version, ixgbevf_driver_version,
278 sizeof(drvinfo->version));
279 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
280 sizeof(drvinfo->bus_info));
281 }
282
283 static void ixgbevf_get_ringparam(struct net_device *netdev,
284 struct ethtool_ringparam *ring)
285 {
286 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
287
288 ring->rx_max_pending = IXGBEVF_MAX_RXD;
289 ring->tx_max_pending = IXGBEVF_MAX_TXD;
290 ring->rx_pending = adapter->rx_ring_count;
291 ring->tx_pending = adapter->tx_ring_count;
292 }
293
294 static int ixgbevf_set_ringparam(struct net_device *netdev,
295 struct ethtool_ringparam *ring)
296 {
297 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
298 struct ixgbevf_ring *tx_ring = NULL, *rx_ring = NULL;
299 u32 new_rx_count, new_tx_count;
300 int i, err = 0;
301
302 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
303 return -EINVAL;
304
305 new_tx_count = max_t(u32, ring->tx_pending, IXGBEVF_MIN_TXD);
306 new_tx_count = min_t(u32, new_tx_count, IXGBEVF_MAX_TXD);
307 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
308
309 new_rx_count = max_t(u32, ring->rx_pending, IXGBEVF_MIN_RXD);
310 new_rx_count = min_t(u32, new_rx_count, IXGBEVF_MAX_RXD);
311 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
312
313 /* if nothing to do return success */
314 if ((new_tx_count == adapter->tx_ring_count) &&
315 (new_rx_count == adapter->rx_ring_count))
316 return 0;
317
318 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
319 usleep_range(1000, 2000);
320
321 if (!netif_running(adapter->netdev)) {
322 for (i = 0; i < adapter->num_tx_queues; i++)
323 adapter->tx_ring[i].count = new_tx_count;
324 for (i = 0; i < adapter->num_rx_queues; i++)
325 adapter->rx_ring[i].count = new_rx_count;
326 adapter->tx_ring_count = new_tx_count;
327 adapter->rx_ring_count = new_rx_count;
328 goto clear_reset;
329 }
330
331 if (new_tx_count != adapter->tx_ring_count) {
332 tx_ring = vmalloc(adapter->num_tx_queues * sizeof(*tx_ring));
333 if (!tx_ring) {
334 err = -ENOMEM;
335 goto clear_reset;
336 }
337
338 for (i = 0; i < adapter->num_tx_queues; i++) {
339 /* clone ring and setup updated count */
340 tx_ring[i] = adapter->tx_ring[i];
341 tx_ring[i].count = new_tx_count;
342 err = ixgbevf_setup_tx_resources(adapter, &tx_ring[i]);
343 if (!err)
344 continue;
345 while (i) {
346 i--;
347 ixgbevf_free_tx_resources(adapter, &tx_ring[i]);
348 }
349
350 vfree(tx_ring);
351 tx_ring = NULL;
352
353 goto clear_reset;
354 }
355 }
356
357 if (new_rx_count != adapter->rx_ring_count) {
358 rx_ring = vmalloc(adapter->num_rx_queues * sizeof(*rx_ring));
359 if (!rx_ring) {
360 err = -ENOMEM;
361 goto clear_reset;
362 }
363
364 for (i = 0; i < adapter->num_rx_queues; i++) {
365 /* clone ring and setup updated count */
366 rx_ring[i] = adapter->rx_ring[i];
367 rx_ring[i].count = new_rx_count;
368 err = ixgbevf_setup_rx_resources(adapter, &rx_ring[i]);
369 if (!err)
370 continue;
371 while (i) {
372 i--;
373 ixgbevf_free_rx_resources(adapter, &rx_ring[i]);
374 }
375
376 vfree(rx_ring);
377 rx_ring = NULL;
378
379 goto clear_reset;
380 }
381 }
382
383 /* bring interface down to prepare for update */
384 ixgbevf_down(adapter);
385
386 /* Tx */
387 if (tx_ring) {
388 for (i = 0; i < adapter->num_tx_queues; i++) {
389 ixgbevf_free_tx_resources(adapter,
390 &adapter->tx_ring[i]);
391 adapter->tx_ring[i] = tx_ring[i];
392 }
393 adapter->tx_ring_count = new_tx_count;
394
395 vfree(tx_ring);
396 tx_ring = NULL;
397 }
398
399 /* Rx */
400 if (rx_ring) {
401 for (i = 0; i < adapter->num_rx_queues; i++) {
402 ixgbevf_free_rx_resources(adapter,
403 &adapter->rx_ring[i]);
404 adapter->rx_ring[i] = rx_ring[i];
405 }
406 adapter->rx_ring_count = new_rx_count;
407
408 vfree(rx_ring);
409 rx_ring = NULL;
410 }
411
412 /* restore interface using new values */
413 ixgbevf_up(adapter);
414
415 clear_reset:
416 /* free Tx resources if Rx error is encountered */
417 if (tx_ring) {
418 for (i = 0; i < adapter->num_tx_queues; i++)
419 ixgbevf_free_tx_resources(adapter, &tx_ring[i]);
420 vfree(tx_ring);
421 }
422
423 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
424 return err;
425 }
426
427 static int ixgbevf_get_sset_count(struct net_device *dev, int stringset)
428 {
429 switch (stringset) {
430 case ETH_SS_TEST:
431 return IXGBE_TEST_LEN;
432 case ETH_SS_STATS:
433 return IXGBE_GLOBAL_STATS_LEN;
434 default:
435 return -EINVAL;
436 }
437 }
438
439 static void ixgbevf_get_ethtool_stats(struct net_device *netdev,
440 struct ethtool_stats *stats, u64 *data)
441 {
442 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
443 int i;
444
445 ixgbevf_update_stats(adapter);
446 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
447 char *p = (char *)adapter +
448 ixgbe_gstrings_stats[i].stat_offset;
449 char *b = (char *)adapter +
450 ixgbe_gstrings_stats[i].base_stat_offset;
451 char *r = (char *)adapter +
452 ixgbe_gstrings_stats[i].saved_reset_offset;
453 data[i] = ((ixgbe_gstrings_stats[i].sizeof_stat ==
454 sizeof(u64)) ? *(u64 *)p : *(u32 *)p) -
455 ((ixgbe_gstrings_stats[i].sizeof_stat ==
456 sizeof(u64)) ? *(u64 *)b : *(u32 *)b) +
457 ((ixgbe_gstrings_stats[i].sizeof_stat ==
458 sizeof(u64)) ? *(u64 *)r : *(u32 *)r);
459 }
460 }
461
462 static void ixgbevf_get_strings(struct net_device *netdev, u32 stringset,
463 u8 *data)
464 {
465 char *p = (char *)data;
466 int i;
467
468 switch (stringset) {
469 case ETH_SS_TEST:
470 memcpy(data, *ixgbe_gstrings_test,
471 IXGBE_TEST_LEN * ETH_GSTRING_LEN);
472 break;
473 case ETH_SS_STATS:
474 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
475 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
476 ETH_GSTRING_LEN);
477 p += ETH_GSTRING_LEN;
478 }
479 break;
480 }
481 }
482
483 static int ixgbevf_link_test(struct ixgbevf_adapter *adapter, u64 *data)
484 {
485 struct ixgbe_hw *hw = &adapter->hw;
486 bool link_up;
487 u32 link_speed = 0;
488 *data = 0;
489
490 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
491 if (!link_up)
492 *data = 1;
493
494 return *data;
495 }
496
497 /* ethtool register test data */
498 struct ixgbevf_reg_test {
499 u16 reg;
500 u8 array_len;
501 u8 test_type;
502 u32 mask;
503 u32 write;
504 };
505
506 /* In the hardware, registers are laid out either singly, in arrays
507 * spaced 0x40 bytes apart, or in contiguous tables. We assume
508 * most tests take place on arrays or single registers (handled
509 * as a single-element array) and special-case the tables.
510 * Table tests are always pattern tests.
511 *
512 * We also make provision for some required setup steps by specifying
513 * registers to be written without any read-back testing.
514 */
515
516 #define PATTERN_TEST 1
517 #define SET_READ_TEST 2
518 #define WRITE_NO_TEST 3
519 #define TABLE32_TEST 4
520 #define TABLE64_TEST_LO 5
521 #define TABLE64_TEST_HI 6
522
523 /* default VF register test */
524 static const struct ixgbevf_reg_test reg_test_vf[] = {
525 { IXGBE_VFRDBAL(0), 2, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
526 { IXGBE_VFRDBAH(0), 2, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
527 { IXGBE_VFRDLEN(0), 2, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
528 { IXGBE_VFRXDCTL(0), 2, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
529 { IXGBE_VFRDT(0), 2, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
530 { IXGBE_VFRXDCTL(0), 2, WRITE_NO_TEST, 0, 0 },
531 { IXGBE_VFTDBAL(0), 2, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
532 { IXGBE_VFTDBAH(0), 2, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
533 { IXGBE_VFTDLEN(0), 2, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
534 { 0, 0, 0, 0 }
535 };
536
537 static const u32 register_test_patterns[] = {
538 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
539 };
540
541 #define REG_PATTERN_TEST(R, M, W) \
542 { \
543 u32 pat, val, before; \
544 for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) { \
545 before = readl(adapter->hw.hw_addr + R); \
546 writel((register_test_patterns[pat] & W), \
547 (adapter->hw.hw_addr + R)); \
548 val = readl(adapter->hw.hw_addr + R); \
549 if (val != (register_test_patterns[pat] & W & M)) { \
550 hw_dbg(&adapter->hw, \
551 "pattern test reg %04X failed: got " \
552 "0x%08X expected 0x%08X\n", \
553 R, val, (register_test_patterns[pat] & W & M)); \
554 *data = R; \
555 writel(before, adapter->hw.hw_addr + R); \
556 return 1; \
557 } \
558 writel(before, adapter->hw.hw_addr + R); \
559 } \
560 }
561
562 #define REG_SET_AND_CHECK(R, M, W) \
563 { \
564 u32 val, before; \
565 before = readl(adapter->hw.hw_addr + R); \
566 writel((W & M), (adapter->hw.hw_addr + R)); \
567 val = readl(adapter->hw.hw_addr + R); \
568 if ((W & M) != (val & M)) { \
569 pr_err("set/check reg %04X test failed: got 0x%08X expected " \
570 "0x%08X\n", R, (val & M), (W & M)); \
571 *data = R; \
572 writel(before, (adapter->hw.hw_addr + R)); \
573 return 1; \
574 } \
575 writel(before, (adapter->hw.hw_addr + R)); \
576 }
577
578 static int ixgbevf_reg_test(struct ixgbevf_adapter *adapter, u64 *data)
579 {
580 const struct ixgbevf_reg_test *test;
581 u32 i;
582
583 test = reg_test_vf;
584
585 /*
586 * Perform the register test, looping through the test table
587 * until we either fail or reach the null entry.
588 */
589 while (test->reg) {
590 for (i = 0; i < test->array_len; i++) {
591 switch (test->test_type) {
592 case PATTERN_TEST:
593 REG_PATTERN_TEST(test->reg + (i * 0x40),
594 test->mask,
595 test->write);
596 break;
597 case SET_READ_TEST:
598 REG_SET_AND_CHECK(test->reg + (i * 0x40),
599 test->mask,
600 test->write);
601 break;
602 case WRITE_NO_TEST:
603 writel(test->write,
604 (adapter->hw.hw_addr + test->reg)
605 + (i * 0x40));
606 break;
607 case TABLE32_TEST:
608 REG_PATTERN_TEST(test->reg + (i * 4),
609 test->mask,
610 test->write);
611 break;
612 case TABLE64_TEST_LO:
613 REG_PATTERN_TEST(test->reg + (i * 8),
614 test->mask,
615 test->write);
616 break;
617 case TABLE64_TEST_HI:
618 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
619 test->mask,
620 test->write);
621 break;
622 }
623 }
624 test++;
625 }
626
627 *data = 0;
628 return *data;
629 }
630
631 static void ixgbevf_diag_test(struct net_device *netdev,
632 struct ethtool_test *eth_test, u64 *data)
633 {
634 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
635 bool if_running = netif_running(netdev);
636
637 set_bit(__IXGBEVF_TESTING, &adapter->state);
638 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
639 /* Offline tests */
640
641 hw_dbg(&adapter->hw, "offline testing starting\n");
642
643 /* Link test performed before hardware reset so autoneg doesn't
644 * interfere with test result */
645 if (ixgbevf_link_test(adapter, &data[1]))
646 eth_test->flags |= ETH_TEST_FL_FAILED;
647
648 if (if_running)
649 /* indicate we're in test mode */
650 dev_close(netdev);
651 else
652 ixgbevf_reset(adapter);
653
654 hw_dbg(&adapter->hw, "register testing starting\n");
655 if (ixgbevf_reg_test(adapter, &data[0]))
656 eth_test->flags |= ETH_TEST_FL_FAILED;
657
658 ixgbevf_reset(adapter);
659
660 clear_bit(__IXGBEVF_TESTING, &adapter->state);
661 if (if_running)
662 dev_open(netdev);
663 } else {
664 hw_dbg(&adapter->hw, "online testing starting\n");
665 /* Online tests */
666 if (ixgbevf_link_test(adapter, &data[1]))
667 eth_test->flags |= ETH_TEST_FL_FAILED;
668
669 /* Online tests aren't run; pass by default */
670 data[0] = 0;
671
672 clear_bit(__IXGBEVF_TESTING, &adapter->state);
673 }
674 msleep_interruptible(4 * 1000);
675 }
676
677 static int ixgbevf_nway_reset(struct net_device *netdev)
678 {
679 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
680
681 if (netif_running(netdev))
682 ixgbevf_reinit_locked(adapter);
683
684 return 0;
685 }
686
687 static const struct ethtool_ops ixgbevf_ethtool_ops = {
688 .get_settings = ixgbevf_get_settings,
689 .get_drvinfo = ixgbevf_get_drvinfo,
690 .get_regs_len = ixgbevf_get_regs_len,
691 .get_regs = ixgbevf_get_regs,
692 .nway_reset = ixgbevf_nway_reset,
693 .get_link = ethtool_op_get_link,
694 .get_ringparam = ixgbevf_get_ringparam,
695 .set_ringparam = ixgbevf_set_ringparam,
696 .get_msglevel = ixgbevf_get_msglevel,
697 .set_msglevel = ixgbevf_set_msglevel,
698 .self_test = ixgbevf_diag_test,
699 .get_sset_count = ixgbevf_get_sset_count,
700 .get_strings = ixgbevf_get_strings,
701 .get_ethtool_stats = ixgbevf_get_ethtool_stats,
702 };
703
704 void ixgbevf_set_ethtool_ops(struct net_device *netdev)
705 {
706 SET_ETHTOOL_OPS(netdev, &ixgbevf_ethtool_ops);
707 }
Linux ARM platform port for MOXA ART SoC