drivers/net/ethernet/stmicro/stmmac/mmc.h

   1 /*******************************************************************************
   2   MMC Header file
   3
   4   Copyright (C) 2011  STMicroelectronics Ltd
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  23 *******************************************************************************/
  24
  25 #ifndef __MMC_H__
  26 #define __MMC_H__
  27
  28 /* MMC control register */
  29 /* When set, all counter are reset */
  30 #define MMC_CNTRL_COUNTER_RESET         0x1
  31 /* When set, do not roll over zero
  32  * after reaching the max value*/
  33 #define MMC_CNTRL_COUNTER_STOP_ROLLOVER 0x2
  34 #define MMC_CNTRL_RESET_ON_READ         0x4     /* Reset after reading */
  35 #define MMC_CNTRL_COUNTER_FREEZER       0x8     /* Freeze counter values to the
  36                                                  * current value.*/
  37 #define MMC_CNTRL_PRESET                0x10
  38 #define MMC_CNTRL_FULL_HALF_PRESET      0x20
  39 struct stmmac_counters {
  40         unsigned int mmc_tx_octetcount_gb;
  41         unsigned int mmc_tx_framecount_gb;
  42         unsigned int mmc_tx_broadcastframe_g;
  43         unsigned int mmc_tx_multicastframe_g;
  44         unsigned int mmc_tx_64_octets_gb;
  45         unsigned int mmc_tx_65_to_127_octets_gb;
  46         unsigned int mmc_tx_128_to_255_octets_gb;
  47         unsigned int mmc_tx_256_to_511_octets_gb;
  48         unsigned int mmc_tx_512_to_1023_octets_gb;
  49         unsigned int mmc_tx_1024_to_max_octets_gb;
  50         unsigned int mmc_tx_unicast_gb;
  51         unsigned int mmc_tx_multicast_gb;
  52         unsigned int mmc_tx_broadcast_gb;
  53         unsigned int mmc_tx_underflow_error;
  54         unsigned int mmc_tx_singlecol_g;
  55         unsigned int mmc_tx_multicol_g;
  56         unsigned int mmc_tx_deferred;
  57         unsigned int mmc_tx_latecol;
  58         unsigned int mmc_tx_exesscol;
  59         unsigned int mmc_tx_carrier_error;
  60         unsigned int mmc_tx_octetcount_g;
  61         unsigned int mmc_tx_framecount_g;
  62         unsigned int mmc_tx_excessdef;
  63         unsigned int mmc_tx_pause_frame;
  64         unsigned int mmc_tx_vlan_frame_g;
  65
  66         /* MMC RX counter registers */
  67         unsigned int mmc_rx_framecount_gb;
  68         unsigned int mmc_rx_octetcount_gb;
  69         unsigned int mmc_rx_octetcount_g;
  70         unsigned int mmc_rx_broadcastframe_g;
  71         unsigned int mmc_rx_multicastframe_g;
  72         unsigned int mmc_rx_crc_errror;
  73         unsigned int mmc_rx_align_error;
  74         unsigned int mmc_rx_run_error;
  75         unsigned int mmc_rx_jabber_error;
  76         unsigned int mmc_rx_undersize_g;
  77         unsigned int mmc_rx_oversize_g;
  78         unsigned int mmc_rx_64_octets_gb;
  79         unsigned int mmc_rx_65_to_127_octets_gb;
  80         unsigned int mmc_rx_128_to_255_octets_gb;
  81         unsigned int mmc_rx_256_to_511_octets_gb;
  82         unsigned int mmc_rx_512_to_1023_octets_gb;
  83         unsigned int mmc_rx_1024_to_max_octets_gb;
  84         unsigned int mmc_rx_unicast_g;
  85         unsigned int mmc_rx_length_error;
  86         unsigned int mmc_rx_autofrangetype;
  87         unsigned int mmc_rx_pause_frames;
  88         unsigned int mmc_rx_fifo_overflow;
  89         unsigned int mmc_rx_vlan_frames_gb;
  90         unsigned int mmc_rx_watchdog_error;
  91         /* IPC */
  92         unsigned int mmc_rx_ipc_intr_mask;
  93         unsigned int mmc_rx_ipc_intr;
  94         /* IPv4 */
  95         unsigned int mmc_rx_ipv4_gd;
  96         unsigned int mmc_rx_ipv4_hderr;
  97         unsigned int mmc_rx_ipv4_nopay;
  98         unsigned int mmc_rx_ipv4_frag;
  99         unsigned int mmc_rx_ipv4_udsbl;
 100
 101         unsigned int mmc_rx_ipv4_gd_octets;
 102         unsigned int mmc_rx_ipv4_hderr_octets;
 103         unsigned int mmc_rx_ipv4_nopay_octets;
 104         unsigned int mmc_rx_ipv4_frag_octets;
 105         unsigned int mmc_rx_ipv4_udsbl_octets;
 106
 107         /* IPV6 */
 108         unsigned int mmc_rx_ipv6_gd_octets;
 109         unsigned int mmc_rx_ipv6_hderr_octets;
 110         unsigned int mmc_rx_ipv6_nopay_octets;
 111
 112         unsigned int mmc_rx_ipv6_gd;
 113         unsigned int mmc_rx_ipv6_hderr;
 114         unsigned int mmc_rx_ipv6_nopay;
 115
 116         /* Protocols */
 117         unsigned int mmc_rx_udp_gd;
 118         unsigned int mmc_rx_udp_err;
 119         unsigned int mmc_rx_tcp_gd;
 120         unsigned int mmc_rx_tcp_err;
 121         unsigned int mmc_rx_icmp_gd;
 122         unsigned int mmc_rx_icmp_err;
 123
 124         unsigned int mmc_rx_udp_gd_octets;
 125         unsigned int mmc_rx_udp_err_octets;
 126         unsigned int mmc_rx_tcp_gd_octets;
 127         unsigned int mmc_rx_tcp_err_octets;
 128         unsigned int mmc_rx_icmp_gd_octets;
 129         unsigned int mmc_rx_icmp_err_octets;
 130 };
 131
 132 extern void dwmac_mmc_ctrl(void __iomem *ioaddr, unsigned int mode);
 133 extern void dwmac_mmc_intr_all_mask(void __iomem *ioaddr);
 134 extern void dwmac_mmc_read(void __iomem *ioaddr, struct stmmac_counters *mmc);
 135
 136 #endif /* __MMC_H__ */