Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / net / wireless / ath / ath9k / link.c
blob7b88b9c39ccddc4ef4e3aeafb53e437d0f35a0ce
1 /*
2 * Copyright (c) 2012 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include "ath9k.h"
20 * TX polling - checks if the TX engine is stuck somewhere
21 * and issues a chip reset if so.
23 void ath_tx_complete_poll_work(struct work_struct *work)
25 struct ath_softc *sc = container_of(work, struct ath_softc,
26 tx_complete_work.work);
27 struct ath_txq *txq;
28 int i;
29 bool needreset = false;
30 #ifdef CONFIG_ATH9K_DEBUGFS
31 sc->tx_complete_poll_work_seen++;
32 #endif
34 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
35 if (ATH_TXQ_SETUP(sc, i)) {
36 txq = &sc->tx.txq[i];
37 ath_txq_lock(sc, txq);
38 if (txq->axq_depth) {
39 if (txq->axq_tx_inprogress) {
40 needreset = true;
41 ath_txq_unlock(sc, txq);
42 break;
43 } else {
44 txq->axq_tx_inprogress = true;
47 ath_txq_unlock_complete(sc, txq);
50 if (needreset) {
51 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
52 "tx hung, resetting the chip\n");
53 ath9k_queue_reset(sc, RESET_TYPE_TX_HANG);
54 return;
57 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
58 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
62 * Checks if the BB/MAC is hung.
64 void ath_hw_check(struct work_struct *work)
66 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
67 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
68 unsigned long flags;
69 int busy;
70 u8 is_alive, nbeacon = 1;
71 enum ath_reset_type type;
73 ath9k_ps_wakeup(sc);
74 is_alive = ath9k_hw_check_alive(sc->sc_ah);
76 if (is_alive && !AR_SREV_9300(sc->sc_ah))
77 goto out;
78 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
79 ath_dbg(common, RESET,
80 "DCU stuck is detected. Schedule chip reset\n");
81 type = RESET_TYPE_MAC_HANG;
82 goto sched_reset;
85 spin_lock_irqsave(&common->cc_lock, flags);
86 busy = ath_update_survey_stats(sc);
87 spin_unlock_irqrestore(&common->cc_lock, flags);
89 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
90 busy, sc->hw_busy_count + 1);
91 if (busy >= 99) {
92 if (++sc->hw_busy_count >= 3) {
93 type = RESET_TYPE_BB_HANG;
94 goto sched_reset;
96 } else if (busy >= 0) {
97 sc->hw_busy_count = 0;
98 nbeacon = 3;
101 ath_start_rx_poll(sc, nbeacon);
102 goto out;
104 sched_reset:
105 ath9k_queue_reset(sc, type);
106 out:
107 ath9k_ps_restore(sc);
111 * PLL-WAR for AR9485/AR9340
113 static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
115 static int count;
116 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
118 if (pll_sqsum >= 0x40000) {
119 count++;
120 if (count == 3) {
121 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
122 ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG);
123 count = 0;
124 return true;
126 } else {
127 count = 0;
130 return false;
133 void ath_hw_pll_work(struct work_struct *work)
135 u32 pll_sqsum;
136 struct ath_softc *sc = container_of(work, struct ath_softc,
137 hw_pll_work.work);
139 * ensure that the PLL WAR is executed only
140 * after the STA is associated (or) if the
141 * beaconing had started in interfaces that
142 * uses beacons.
144 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
145 return;
147 ath9k_ps_wakeup(sc);
148 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
149 ath9k_ps_restore(sc);
150 if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
151 return;
153 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
154 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
158 * RX Polling - monitors baseband hangs.
160 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
162 if (!AR_SREV_9300(sc->sc_ah))
163 return;
165 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
166 return;
168 mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
169 (nbeacon * sc->cur_beacon_conf.beacon_interval));
172 void ath_rx_poll(unsigned long data)
174 struct ath_softc *sc = (struct ath_softc *)data;
176 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
180 * PA Pre-distortion.
182 static void ath_paprd_activate(struct ath_softc *sc)
184 struct ath_hw *ah = sc->sc_ah;
185 struct ath9k_hw_cal_data *caldata = ah->caldata;
186 int chain;
188 if (!caldata || !caldata->paprd_done)
189 return;
191 ath9k_ps_wakeup(sc);
192 ar9003_paprd_enable(ah, false);
193 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
194 if (!(ah->txchainmask & BIT(chain)))
195 continue;
197 ar9003_paprd_populate_single_table(ah, caldata, chain);
200 ar9003_paprd_enable(ah, true);
201 ath9k_ps_restore(sc);
204 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
206 struct ieee80211_hw *hw = sc->hw;
207 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
208 struct ath_hw *ah = sc->sc_ah;
209 struct ath_common *common = ath9k_hw_common(ah);
210 struct ath_tx_control txctl;
211 int time_left;
213 memset(&txctl, 0, sizeof(txctl));
214 txctl.txq = sc->tx.txq_map[WME_AC_BE];
216 memset(tx_info, 0, sizeof(*tx_info));
217 tx_info->band = hw->conf.channel->band;
218 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
219 tx_info->control.rates[0].idx = 0;
220 tx_info->control.rates[0].count = 1;
221 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
222 tx_info->control.rates[1].idx = -1;
224 init_completion(&sc->paprd_complete);
225 txctl.paprd = BIT(chain);
227 if (ath_tx_start(hw, skb, &txctl) != 0) {
228 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
229 dev_kfree_skb_any(skb);
230 return false;
233 time_left = wait_for_completion_timeout(&sc->paprd_complete,
234 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
236 if (!time_left)
237 ath_dbg(common, CALIBRATE,
238 "Timeout waiting for paprd training on TX chain %d\n",
239 chain);
241 return !!time_left;
244 void ath_paprd_calibrate(struct work_struct *work)
246 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
247 struct ieee80211_hw *hw = sc->hw;
248 struct ath_hw *ah = sc->sc_ah;
249 struct ieee80211_hdr *hdr;
250 struct sk_buff *skb = NULL;
251 struct ath9k_hw_cal_data *caldata = ah->caldata;
252 struct ath_common *common = ath9k_hw_common(ah);
253 int ftype;
254 int chain_ok = 0;
255 int chain;
256 int len = 1800;
257 int ret;
259 if (!caldata || !caldata->paprd_packet_sent || caldata->paprd_done)
260 return;
262 ath9k_ps_wakeup(sc);
264 if (ar9003_paprd_init_table(ah) < 0)
265 goto fail_paprd;
267 skb = alloc_skb(len, GFP_KERNEL);
268 if (!skb)
269 goto fail_paprd;
271 skb_put(skb, len);
272 memset(skb->data, 0, len);
273 hdr = (struct ieee80211_hdr *)skb->data;
274 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
275 hdr->frame_control = cpu_to_le16(ftype);
276 hdr->duration_id = cpu_to_le16(10);
277 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
278 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
279 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
281 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
282 if (!(ah->txchainmask & BIT(chain)))
283 continue;
285 chain_ok = 0;
286 ar9003_paprd_setup_gain_table(ah, chain);
288 ath_dbg(common, CALIBRATE,
289 "Sending PAPRD training frame on chain %d\n", chain);
290 if (!ath_paprd_send_frame(sc, skb, chain))
291 goto fail_paprd;
293 if (!ar9003_paprd_is_done(ah)) {
294 ath_dbg(common, CALIBRATE,
295 "PAPRD not yet done on chain %d\n", chain);
296 break;
299 ret = ar9003_paprd_create_curve(ah, caldata, chain);
300 if (ret == -EINPROGRESS) {
301 ath_dbg(common, CALIBRATE,
302 "PAPRD curve on chain %d needs to be re-trained\n",
303 chain);
304 break;
305 } else if (ret) {
306 ath_dbg(common, CALIBRATE,
307 "PAPRD create curve failed on chain %d\n",
308 chain);
309 break;
312 chain_ok = 1;
314 kfree_skb(skb);
316 if (chain_ok) {
317 caldata->paprd_done = true;
318 ath_paprd_activate(sc);
321 fail_paprd:
322 ath9k_ps_restore(sc);
326 * ANI performs periodic noise floor calibration
327 * that is used to adjust and optimize the chip performance. This
328 * takes environmental changes (location, temperature) into account.
329 * When the task is complete, it reschedules itself depending on the
330 * appropriate interval that was calculated.
332 void ath_ani_calibrate(unsigned long data)
334 struct ath_softc *sc = (struct ath_softc *)data;
335 struct ath_hw *ah = sc->sc_ah;
336 struct ath_common *common = ath9k_hw_common(ah);
337 bool longcal = false;
338 bool shortcal = false;
339 bool aniflag = false;
340 unsigned int timestamp = jiffies_to_msecs(jiffies);
341 u32 cal_interval, short_cal_interval, long_cal_interval;
342 unsigned long flags;
344 if (ah->caldata && ah->caldata->nfcal_interference)
345 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
346 else
347 long_cal_interval = ATH_LONG_CALINTERVAL;
349 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
350 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
352 /* Only calibrate if awake */
353 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
354 goto set_timer;
356 ath9k_ps_wakeup(sc);
358 /* Long calibration runs independently of short calibration. */
359 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
360 longcal = true;
361 common->ani.longcal_timer = timestamp;
364 /* Short calibration applies only while caldone is false */
365 if (!common->ani.caldone) {
366 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
367 shortcal = true;
368 common->ani.shortcal_timer = timestamp;
369 common->ani.resetcal_timer = timestamp;
371 } else {
372 if ((timestamp - common->ani.resetcal_timer) >=
373 ATH_RESTART_CALINTERVAL) {
374 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
375 if (common->ani.caldone)
376 common->ani.resetcal_timer = timestamp;
380 /* Verify whether we must check ANI */
381 if (sc->sc_ah->config.enable_ani
382 && (timestamp - common->ani.checkani_timer) >=
383 ah->config.ani_poll_interval) {
384 aniflag = true;
385 common->ani.checkani_timer = timestamp;
388 /* Call ANI routine if necessary */
389 if (aniflag) {
390 spin_lock_irqsave(&common->cc_lock, flags);
391 ath9k_hw_ani_monitor(ah, ah->curchan);
392 ath_update_survey_stats(sc);
393 spin_unlock_irqrestore(&common->cc_lock, flags);
396 /* Perform calibration if necessary */
397 if (longcal || shortcal) {
398 common->ani.caldone =
399 ath9k_hw_calibrate(ah, ah->curchan,
400 ah->rxchainmask, longcal);
403 ath_dbg(common, ANI,
404 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
405 jiffies,
406 longcal ? "long" : "", shortcal ? "short" : "",
407 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
409 ath9k_debug_samp_bb_mac(sc);
410 ath9k_ps_restore(sc);
412 set_timer:
414 * Set timer interval based on previous results.
415 * The interval must be the shortest necessary to satisfy ANI,
416 * short calibration and long calibration.
418 cal_interval = ATH_LONG_CALINTERVAL;
419 if (sc->sc_ah->config.enable_ani)
420 cal_interval = min(cal_interval,
421 (u32)ah->config.ani_poll_interval);
422 if (!common->ani.caldone)
423 cal_interval = min(cal_interval, (u32)short_cal_interval);
425 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
426 if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD) && ah->caldata) {
427 if (!ah->caldata->paprd_done)
428 ieee80211_queue_work(sc->hw, &sc->paprd_work);
429 else if (!ah->paprd_table_write_done)
430 ath_paprd_activate(sc);
434 void ath_start_ani(struct ath_softc *sc)
436 struct ath_hw *ah = sc->sc_ah;
437 struct ath_common *common = ath9k_hw_common(ah);
438 unsigned long timestamp = jiffies_to_msecs(jiffies);
440 if (common->disable_ani ||
441 !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) ||
442 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
443 return;
445 common->ani.longcal_timer = timestamp;
446 common->ani.shortcal_timer = timestamp;
447 common->ani.checkani_timer = timestamp;
449 ath_dbg(common, ANI, "Starting ANI\n");
450 mod_timer(&common->ani.timer,
451 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
454 void ath_stop_ani(struct ath_softc *sc)
456 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
458 ath_dbg(common, ANI, "Stopping ANI\n");
459 del_timer_sync(&common->ani.timer);
462 void ath_check_ani(struct ath_softc *sc)
464 struct ath_hw *ah = sc->sc_ah;
465 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
468 * Check for the various conditions in which ANI has to
469 * be stopped.
471 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
472 if (!cur_conf->enable_beacon)
473 goto stop_ani;
474 } else if (ah->opmode == NL80211_IFTYPE_AP) {
475 if (!cur_conf->enable_beacon) {
477 * Disable ANI only when there are no
478 * associated stations.
480 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
481 goto stop_ani;
483 } else if (ah->opmode == NL80211_IFTYPE_STATION) {
484 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
485 goto stop_ani;
488 if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags)) {
489 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
490 ath_start_ani(sc);
493 return;
495 stop_ani:
496 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
497 ath_stop_ani(sc);
500 void ath_update_survey_nf(struct ath_softc *sc, int channel)
502 struct ath_hw *ah = sc->sc_ah;
503 struct ath9k_channel *chan = &ah->channels[channel];
504 struct survey_info *survey = &sc->survey[channel];
506 if (chan->noisefloor) {
507 survey->filled |= SURVEY_INFO_NOISE_DBM;
508 survey->noise = ath9k_hw_getchan_noise(ah, chan);
513 * Updates the survey statistics and returns the busy time since last
514 * update in %, if the measurement duration was long enough for the
515 * result to be useful, -1 otherwise.
517 int ath_update_survey_stats(struct ath_softc *sc)
519 struct ath_hw *ah = sc->sc_ah;
520 struct ath_common *common = ath9k_hw_common(ah);
521 int pos = ah->curchan - &ah->channels[0];
522 struct survey_info *survey = &sc->survey[pos];
523 struct ath_cycle_counters *cc = &common->cc_survey;
524 unsigned int div = common->clockrate * 1000;
525 int ret = 0;
527 if (!ah->curchan)
528 return -1;
530 if (ah->power_mode == ATH9K_PM_AWAKE)
531 ath_hw_cycle_counters_update(common);
533 if (cc->cycles > 0) {
534 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
535 SURVEY_INFO_CHANNEL_TIME_BUSY |
536 SURVEY_INFO_CHANNEL_TIME_RX |
537 SURVEY_INFO_CHANNEL_TIME_TX;
538 survey->channel_time += cc->cycles / div;
539 survey->channel_time_busy += cc->rx_busy / div;
540 survey->channel_time_rx += cc->rx_frame / div;
541 survey->channel_time_tx += cc->tx_frame / div;
544 if (cc->cycles < div)
545 return -1;
547 if (cc->cycles > 0)
548 ret = cc->rx_busy * 100 / cc->cycles;
550 memset(cc, 0, sizeof(*cc));
552 ath_update_survey_nf(sc, pos);
554 return ret;