drivers/pci/pcie/portdrv_pci.c

   1 /*
   2  * File:        portdrv_pci.c
   3  * Purpose:     PCI Express Port Bus Driver
   4  *
   5  * Copyright (C) 2004 Intel
   6  * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/errno.h>
  13 #include <linux/pm.h>
  14 #include <linux/pm_runtime.h>
  15 #include <linux/init.h>
  16 #include <linux/pcieport_if.h>
  17 #include <linux/aer.h>
  18 #include <linux/dmi.h>
  19 #include <linux/pci-aspm.h>
  20
  21 #include "portdrv.h"
  22 #include "aer/aerdrv.h"
  23
  24 /*
  25  * Version Information
  26  */
  27 #define DRIVER_VERSION "v1.0"
  28 #define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
  29 #define DRIVER_DESC "PCIe Port Bus Driver"
  30 MODULE_AUTHOR(DRIVER_AUTHOR);
  31 MODULE_DESCRIPTION(DRIVER_DESC);
  32 MODULE_LICENSE("GPL");
  33
  34 /* If this switch is set, PCIe port native services should not be enabled. */
  35 bool pcie_ports_disabled;
  36
  37 /*
  38  * If this switch is set, ACPI _OSC will be used to determine whether or not to
  39  * enable PCIe port native services.
  40  */
  41 bool pcie_ports_auto = true;
  42
  43 static int __init pcie_port_setup(char *str)
  44 {
  45         if (!strncmp(str, "compat", 6)) {
  46                 pcie_ports_disabled = true;
  47         } else if (!strncmp(str, "native", 6)) {
  48                 pcie_ports_disabled = false;
  49                 pcie_ports_auto = false;
  50         } else if (!strncmp(str, "auto", 4)) {
  51                 pcie_ports_disabled = false;
  52                 pcie_ports_auto = true;
  53         }
  54
  55         return 1;
  56 }
  57 __setup("pcie_ports=", pcie_port_setup);
  58
  59 /* global data */
  60
  61 /**
  62  * pcie_clear_root_pme_status - Clear root port PME interrupt status.
  63  * @dev: PCIe root port or event collector.
  64  */
  65 void pcie_clear_root_pme_status(struct pci_dev *dev)
  66 {
  67         int rtsta_pos;
  68         u32 rtsta;
  69
  70         rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
  71
  72         pci_read_config_dword(dev, rtsta_pos, &rtsta);
  73         rtsta |= PCI_EXP_RTSTA_PME;
  74         pci_write_config_dword(dev, rtsta_pos, rtsta);
  75 }
  76
  77 static int pcie_portdrv_restore_config(struct pci_dev *dev)
  78 {
  79         int retval;
  80
  81         retval = pci_enable_device(dev);
  82         if (retval)
  83                 return retval;
  84         pci_set_master(dev);
  85         return 0;
  86 }
  87
  88 #ifdef CONFIG_PM
  89 static int pcie_port_resume_noirq(struct device *dev)
  90 {
  91         struct pci_dev *pdev = to_pci_dev(dev);
  92
  93         /*
  94          * Some BIOSes forget to clear Root PME Status bits after system wakeup
  95          * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
  96          * bits now just in case (shouldn't hurt).
  97          */
  98         if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
  99                 pcie_clear_root_pme_status(pdev);
 100         return 0;
 101 }
 102
 103 #ifdef CONFIG_PM_RUNTIME
 104 struct d3cold_info {
 105         bool no_d3cold;
 106         unsigned int d3cold_delay;
 107 };
 108
 109 static int pci_dev_d3cold_info(struct pci_dev *pdev, void *data)
 110 {
 111         struct d3cold_info *info = data;
 112
 113         info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
 114                                    info->d3cold_delay);
 115         if (pdev->no_d3cold)
 116                 info->no_d3cold = true;
 117         return 0;
 118 }
 119
 120 static int pcie_port_runtime_suspend(struct device *dev)
 121 {
 122         struct pci_dev *pdev = to_pci_dev(dev);
 123         struct d3cold_info d3cold_info = {
 124                 .no_d3cold      = false,
 125                 .d3cold_delay   = PCI_PM_D3_WAIT,
 126         };
 127
 128         /*
 129          * If any subordinate device disable D3cold, we should not put
 130          * the port into D3cold.  The D3cold delay of port should be
 131          * the max of that of all subordinate devices.
 132          */
 133         pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
 134         pdev->no_d3cold = d3cold_info.no_d3cold;
 135         pdev->d3cold_delay = d3cold_info.d3cold_delay;
 136         return 0;
 137 }
 138
 139 static int pcie_port_runtime_resume(struct device *dev)
 140 {
 141         return 0;
 142 }
 143
 144 static int pcie_port_runtime_idle(struct device *dev)
 145 {
 146         /* Delay for a short while to prevent too frequent suspend/resume */
 147         pm_schedule_suspend(dev, 10);
 148         return -EBUSY;
 149 }
 150 #else
 151 #define pcie_port_runtime_suspend       NULL
 152 #define pcie_port_runtime_resume        NULL
 153 #define pcie_port_runtime_idle          NULL
 154 #endif
 155
 156 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
 157         .suspend        = pcie_port_device_suspend,
 158         .resume         = pcie_port_device_resume,
 159         .freeze         = pcie_port_device_suspend,
 160         .thaw           = pcie_port_device_resume,
 161         .poweroff       = pcie_port_device_suspend,
 162         .restore        = pcie_port_device_resume,
 163         .resume_noirq   = pcie_port_resume_noirq,
 164         .runtime_suspend = pcie_port_runtime_suspend,
 165         .runtime_resume = pcie_port_runtime_resume,
 166         .runtime_idle   = pcie_port_runtime_idle,
 167 };
 168
 169 #define PCIE_PORTDRV_PM_OPS     (&pcie_portdrv_pm_ops)
 170
 171 #else /* !PM */
 172
 173 #define PCIE_PORTDRV_PM_OPS     NULL
 174 #endif /* !PM */
 175
 176 /*
 177  * PCIe port runtime suspend is broken for some chipsets, so use a
 178  * black list to disable runtime PM for these chipsets.
 179  */
 180 static const struct pci_device_id port_runtime_pm_black_list[] = {
 181         { /* end: all zeroes */ }
 182 };
 183
 184 /*
 185  * pcie_portdrv_probe - Probe PCI-Express port devices
 186  * @dev: PCI-Express port device being probed
 187  *
 188  * If detected invokes the pcie_port_device_register() method for
 189  * this port device.
 190  *
 191  */
 192 static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
 193                                         const struct pci_device_id *id)
 194 {
 195         int status;
 196
 197         if (!pci_is_pcie(dev) ||
 198             ((dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
 199              (dev->pcie_type != PCI_EXP_TYPE_UPSTREAM) &&
 200              (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
 201                 return -ENODEV;
 202
 203         if (!dev->irq && dev->pin) {
 204                 dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
 205                          "check vendor BIOS\n", dev->vendor, dev->device);
 206         }
 207         status = pcie_port_device_register(dev);
 208         if (status)
 209                 return status;
 210
 211         pci_save_state(dev);
 212         /*
 213          * D3cold may not work properly on some PCIe port, so disable
 214          * it by default.
 215          */
 216         dev->d3cold_allowed = false;
 217         if (!pci_match_id(port_runtime_pm_black_list, dev))
 218                 pm_runtime_put_noidle(&dev->dev);
 219
 220         return 0;
 221 }
 222
 223 static void pcie_portdrv_remove(struct pci_dev *dev)
 224 {
 225         if (!pci_match_id(port_runtime_pm_black_list, dev))
 226                 pm_runtime_get_noresume(&dev->dev);
 227         pcie_port_device_remove(dev);
 228         pci_disable_device(dev);
 229 }
 230
 231 static int error_detected_iter(struct device *device, void *data)
 232 {
 233         struct pcie_device *pcie_device;
 234         struct pcie_port_service_driver *driver;
 235         struct aer_broadcast_data *result_data;
 236         pci_ers_result_t status;
 237
 238         result_data = (struct aer_broadcast_data *) data;
 239
 240         if (device->bus == &pcie_port_bus_type && device->driver) {
 241                 driver = to_service_driver(device->driver);
 242                 if (!driver ||
 243                         !driver->err_handler ||
 244                         !driver->err_handler->error_detected)
 245                         return 0;
 246
 247                 pcie_device = to_pcie_device(device);
 248
 249                 /* Forward error detected message to service drivers */
 250                 status = driver->err_handler->error_detected(
 251                         pcie_device->port,
 252                         result_data->state);
 253                 result_data->result =
 254                         merge_result(result_data->result, status);
 255         }
 256
 257         return 0;
 258 }
 259
 260 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
 261                                         enum pci_channel_state error)
 262 {
 263         struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
 264         int ret;
 265
 266         /* can not fail */
 267         ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
 268
 269         return data.result;
 270 }
 271
 272 static int mmio_enabled_iter(struct device *device, void *data)
 273 {
 274         struct pcie_device *pcie_device;
 275         struct pcie_port_service_driver *driver;
 276         pci_ers_result_t status, *result;
 277
 278         result = (pci_ers_result_t *) data;
 279
 280         if (device->bus == &pcie_port_bus_type && device->driver) {
 281                 driver = to_service_driver(device->driver);
 282                 if (driver &&
 283                         driver->err_handler &&
 284                         driver->err_handler->mmio_enabled) {
 285                         pcie_device = to_pcie_device(device);
 286
 287                         /* Forward error message to service drivers */
 288                         status = driver->err_handler->mmio_enabled(
 289                                         pcie_device->port);
 290                         *result = merge_result(*result, status);
 291                 }
 292         }
 293
 294         return 0;
 295 }
 296
 297 static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
 298 {
 299         pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
 300         int retval;
 301
 302         /* get true return value from &status */
 303         retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
 304         return status;
 305 }
 306
 307 static int slot_reset_iter(struct device *device, void *data)
 308 {
 309         struct pcie_device *pcie_device;
 310         struct pcie_port_service_driver *driver;
 311         pci_ers_result_t status, *result;
 312
 313         result = (pci_ers_result_t *) data;
 314
 315         if (device->bus == &pcie_port_bus_type && device->driver) {
 316                 driver = to_service_driver(device->driver);
 317                 if (driver &&
 318                         driver->err_handler &&
 319                         driver->err_handler->slot_reset) {
 320                         pcie_device = to_pcie_device(device);
 321
 322                         /* Forward error message to service drivers */
 323                         status = driver->err_handler->slot_reset(
 324                                         pcie_device->port);
 325                         *result = merge_result(*result, status);
 326                 }
 327         }
 328
 329         return 0;
 330 }
 331
 332 static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
 333 {
 334         pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
 335         int retval;
 336
 337         /* If fatal, restore cfg space for possible link reset at upstream */
 338         if (dev->error_state == pci_channel_io_frozen) {
 339                 dev->state_saved = true;
 340                 pci_restore_state(dev);
 341                 pcie_portdrv_restore_config(dev);
 342                 pci_enable_pcie_error_reporting(dev);
 343         }
 344
 345         /* get true return value from &status */
 346         retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);
 347
 348         return status;
 349 }
 350
 351 static int resume_iter(struct device *device, void *data)
 352 {
 353         struct pcie_device *pcie_device;
 354         struct pcie_port_service_driver *driver;
 355
 356         if (device->bus == &pcie_port_bus_type && device->driver) {
 357                 driver = to_service_driver(device->driver);
 358                 if (driver &&
 359                         driver->err_handler &&
 360                         driver->err_handler->resume) {
 361                         pcie_device = to_pcie_device(device);
 362
 363                         /* Forward error message to service drivers */
 364                         driver->err_handler->resume(pcie_device->port);
 365                 }
 366         }
 367
 368         return 0;
 369 }
 370
 371 static void pcie_portdrv_err_resume(struct pci_dev *dev)
 372 {
 373         int retval;
 374         /* nothing to do with error value, if it ever happens */
 375         retval = device_for_each_child(&dev->dev, NULL, resume_iter);
 376 }
 377
 378 /*
 379  * LINUX Device Driver Model
 380  */
 381 static const struct pci_device_id port_pci_ids[] = { {
 382         /* handle any PCI-Express port */
 383         PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
 384         }, { /* end: all zeroes */ }
 385 };
 386 MODULE_DEVICE_TABLE(pci, port_pci_ids);
 387
 388 static struct pci_error_handlers pcie_portdrv_err_handler = {
 389                 .error_detected = pcie_portdrv_error_detected,
 390                 .mmio_enabled = pcie_portdrv_mmio_enabled,
 391                 .slot_reset = pcie_portdrv_slot_reset,
 392                 .resume = pcie_portdrv_err_resume,
 393 };
 394
 395 static struct pci_driver pcie_portdriver = {
 396         .name           = "pcieport",
 397         .id_table       = &port_pci_ids[0],
 398
 399         .probe          = pcie_portdrv_probe,
 400         .remove         = pcie_portdrv_remove,
 401
 402         .err_handler    = &pcie_portdrv_err_handler,
 403
 404         .driver.pm      = PCIE_PORTDRV_PM_OPS,
 405 };
 406
 407 static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
 408 {
 409         pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
 410                         d->ident);
 411         pcie_pme_disable_msi();
 412         return 0;
 413 }
 414
 415 static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
 416         /*
 417          * Boxes that should not use MSI for PCIe PME signaling.
 418          */
 419         {
 420          .callback = dmi_pcie_pme_disable_msi,
 421          .ident = "MSI Wind U-100",
 422          .matches = {
 423                      DMI_MATCH(DMI_SYS_VENDOR,
 424                                 "MICRO-STAR INTERNATIONAL CO., LTD"),
 425                      DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
 426                      },
 427          },
 428          {}
 429 };
 430
 431 static int __init pcie_portdrv_init(void)
 432 {
 433         int retval;
 434
 435         if (pcie_ports_disabled)
 436                 return pci_register_driver(&pcie_portdriver);
 437
 438         dmi_check_system(pcie_portdrv_dmi_table);
 439
 440         retval = pcie_port_bus_register();
 441         if (retval) {
 442                 printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
 443                 goto out;
 444         }
 445         retval = pci_register_driver(&pcie_portdriver);
 446         if (retval)
 447                 pcie_port_bus_unregister();
 448  out:
 449         return retval;
 450 }
 451
 452 module_init(pcie_portdrv_init);