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Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / regulator / tps65910-regulator.c
blob793adda560c3c3364c2053cdb152974fc2a2f02b
1 /*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/err.h>
20 #include <linux/platform_device.h>
21 #include <linux/regulator/driver.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/slab.h>
24 #include <linux/gpio.h>
25 #include <linux/mfd/tps65910.h>
26 #include <linux/regulator/of_regulator.h>
27
28 #define TPS65910_SUPPLY_STATE_ENABLED 0x1
29 #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
31 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
33
34 /* supported VIO voltages in microvolts */
35 static const unsigned int VIO_VSEL_table[] = {
36 1500000, 1800000, 2500000, 3300000,
37 };
38
39 /* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
41 /* supported VDD3 voltages in microvolts */
42 static const unsigned int VDD3_VSEL_table[] = {
43 5000000,
44 };
45
46 /* supported VDIG1 voltages in microvolts */
47 static const unsigned int VDIG1_VSEL_table[] = {
48 1200000, 1500000, 1800000, 2700000,
49 };
50
51 /* supported VDIG2 voltages in microvolts */
52 static const unsigned int VDIG2_VSEL_table[] = {
53 1000000, 1100000, 1200000, 1800000,
54 };
55
56 /* supported VPLL voltages in microvolts */
57 static const unsigned int VPLL_VSEL_table[] = {
58 1000000, 1100000, 1800000, 2500000,
59 };
60
61 /* supported VDAC voltages in microvolts */
62 static const unsigned int VDAC_VSEL_table[] = {
63 1800000, 2600000, 2800000, 2850000,
64 };
65
66 /* supported VAUX1 voltages in microvolts */
67 static const unsigned int VAUX1_VSEL_table[] = {
68 1800000, 2500000, 2800000, 2850000,
69 };
70
71 /* supported VAUX2 voltages in microvolts */
72 static const unsigned int VAUX2_VSEL_table[] = {
73 1800000, 2800000, 2900000, 3300000,
74 };
75
76 /* supported VAUX33 voltages in microvolts */
77 static const unsigned int VAUX33_VSEL_table[] = {
78 1800000, 2000000, 2800000, 3300000,
79 };
80
81 /* supported VMMC voltages in microvolts */
82 static const unsigned int VMMC_VSEL_table[] = {
83 1800000, 2800000, 3000000, 3300000,
84 };
85
86 struct tps_info {
87 const char *name;
88 const char *vin_name;
89 u8 n_voltages;
90 const unsigned int *voltage_table;
91 int enable_time_us;
92 };
93
94 static struct tps_info tps65910_regs[] = {
95 {
96 .name = "vrtc",
97 .vin_name = "vcc7",
98 .enable_time_us = 2200,
99 },
100 {
101 .name = "vio",
102 .vin_name = "vccio",
103 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
104 .voltage_table = VIO_VSEL_table,
105 .enable_time_us = 350,
106 },
107 {
108 .name = "vdd1",
109 .vin_name = "vcc1",
110 .enable_time_us = 350,
111 },
112 {
113 .name = "vdd2",
114 .vin_name = "vcc2",
115 .enable_time_us = 350,
116 },
117 {
118 .name = "vdd3",
119 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
120 .voltage_table = VDD3_VSEL_table,
121 .enable_time_us = 200,
122 },
123 {
124 .name = "vdig1",
125 .vin_name = "vcc6",
126 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
127 .voltage_table = VDIG1_VSEL_table,
128 .enable_time_us = 100,
129 },
130 {
131 .name = "vdig2",
132 .vin_name = "vcc6",
133 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
134 .voltage_table = VDIG2_VSEL_table,
135 .enable_time_us = 100,
136 },
137 {
138 .name = "vpll",
139 .vin_name = "vcc5",
140 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
141 .voltage_table = VPLL_VSEL_table,
142 .enable_time_us = 100,
143 },
144 {
145 .name = "vdac",
146 .vin_name = "vcc5",
147 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
148 .voltage_table = VDAC_VSEL_table,
149 .enable_time_us = 100,
150 },
151 {
152 .name = "vaux1",
153 .vin_name = "vcc4",
154 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
155 .voltage_table = VAUX1_VSEL_table,
156 .enable_time_us = 100,
157 },
158 {
159 .name = "vaux2",
160 .vin_name = "vcc4",
161 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
162 .voltage_table = VAUX2_VSEL_table,
163 .enable_time_us = 100,
164 },
165 {
166 .name = "vaux33",
167 .vin_name = "vcc3",
168 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
169 .voltage_table = VAUX33_VSEL_table,
170 .enable_time_us = 100,
171 },
172 {
173 .name = "vmmc",
174 .vin_name = "vcc3",
175 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
176 .voltage_table = VMMC_VSEL_table,
177 .enable_time_us = 100,
178 },
179 };
180
181 static struct tps_info tps65911_regs[] = {
182 {
183 .name = "vrtc",
184 .vin_name = "vcc7",
185 .enable_time_us = 2200,
186 },
187 {
188 .name = "vio",
189 .vin_name = "vccio",
190 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
191 .voltage_table = VIO_VSEL_table,
192 .enable_time_us = 350,
193 },
194 {
195 .name = "vdd1",
196 .vin_name = "vcc1",
197 .n_voltages = 0x4C,
198 .enable_time_us = 350,
199 },
200 {
201 .name = "vdd2",
202 .vin_name = "vcc2",
203 .n_voltages = 0x4C,
204 .enable_time_us = 350,
205 },
206 {
207 .name = "vddctrl",
208 .n_voltages = 0x44,
209 .enable_time_us = 900,
210 },
211 {
212 .name = "ldo1",
213 .vin_name = "vcc6",
214 .n_voltages = 0x33,
215 .enable_time_us = 420,
216 },
217 {
218 .name = "ldo2",
219 .vin_name = "vcc6",
220 .n_voltages = 0x33,
221 .enable_time_us = 420,
222 },
223 {
224 .name = "ldo3",
225 .vin_name = "vcc5",
226 .n_voltages = 0x1A,
227 .enable_time_us = 230,
228 },
229 {
230 .name = "ldo4",
231 .vin_name = "vcc5",
232 .n_voltages = 0x33,
233 .enable_time_us = 230,
234 },
235 {
236 .name = "ldo5",
237 .vin_name = "vcc4",
238 .n_voltages = 0x1A,
239 .enable_time_us = 230,
240 },
241 {
242 .name = "ldo6",
243 .vin_name = "vcc3",
244 .n_voltages = 0x1A,
245 .enable_time_us = 230,
246 },
247 {
248 .name = "ldo7",
249 .vin_name = "vcc3",
250 .n_voltages = 0x1A,
251 .enable_time_us = 230,
252 },
253 {
254 .name = "ldo8",
255 .vin_name = "vcc3",
256 .n_voltages = 0x1A,
257 .enable_time_us = 230,
258 },
259 };
260
261 #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
262 static unsigned int tps65910_ext_sleep_control[] = {
263 0,
264 EXT_CONTROL_REG_BITS(VIO, 1, 0),
265 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
266 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
267 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
268 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
269 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
270 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
271 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
272 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
273 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
274 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
275 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
276 };
277
278 static unsigned int tps65911_ext_sleep_control[] = {
279 0,
280 EXT_CONTROL_REG_BITS(VIO, 1, 0),
281 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
282 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
283 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
284 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
285 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
286 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
287 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
288 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
289 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
290 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
291 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
292 };
293
294 struct tps65910_reg {
295 struct regulator_desc *desc;
296 struct tps65910 *mfd;
297 struct regulator_dev **rdev;
298 struct tps_info **info;
299 int num_regulators;
300 int mode;
301 int (*get_ctrl_reg)(int);
302 unsigned int *ext_sleep_control;
303 unsigned int board_ext_control[TPS65910_NUM_REGS];
304 };
305
306 static int tps65910_get_ctrl_register(int id)
307 {
308 switch (id) {
309 case TPS65910_REG_VRTC:
310 return TPS65910_VRTC;
311 case TPS65910_REG_VIO:
312 return TPS65910_VIO;
313 case TPS65910_REG_VDD1:
314 return TPS65910_VDD1;
315 case TPS65910_REG_VDD2:
316 return TPS65910_VDD2;
317 case TPS65910_REG_VDD3:
318 return TPS65910_VDD3;
319 case TPS65910_REG_VDIG1:
320 return TPS65910_VDIG1;
321 case TPS65910_REG_VDIG2:
322 return TPS65910_VDIG2;
323 case TPS65910_REG_VPLL:
324 return TPS65910_VPLL;
325 case TPS65910_REG_VDAC:
326 return TPS65910_VDAC;
327 case TPS65910_REG_VAUX1:
328 return TPS65910_VAUX1;
329 case TPS65910_REG_VAUX2:
330 return TPS65910_VAUX2;
331 case TPS65910_REG_VAUX33:
332 return TPS65910_VAUX33;
333 case TPS65910_REG_VMMC:
334 return TPS65910_VMMC;
335 default:
336 return -EINVAL;
337 }
338 }
339
340 static int tps65911_get_ctrl_register(int id)
341 {
342 switch (id) {
343 case TPS65910_REG_VRTC:
344 return TPS65910_VRTC;
345 case TPS65910_REG_VIO:
346 return TPS65910_VIO;
347 case TPS65910_REG_VDD1:
348 return TPS65910_VDD1;
349 case TPS65910_REG_VDD2:
350 return TPS65910_VDD2;
351 case TPS65911_REG_VDDCTRL:
352 return TPS65911_VDDCTRL;
353 case TPS65911_REG_LDO1:
354 return TPS65911_LDO1;
355 case TPS65911_REG_LDO2:
356 return TPS65911_LDO2;
357 case TPS65911_REG_LDO3:
358 return TPS65911_LDO3;
359 case TPS65911_REG_LDO4:
360 return TPS65911_LDO4;
361 case TPS65911_REG_LDO5:
362 return TPS65911_LDO5;
363 case TPS65911_REG_LDO6:
364 return TPS65911_LDO6;
365 case TPS65911_REG_LDO7:
366 return TPS65911_LDO7;
367 case TPS65911_REG_LDO8:
368 return TPS65911_LDO8;
369 default:
370 return -EINVAL;
371 }
372 }
373
374 static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
375 {
376 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
377 struct tps65910 *mfd = pmic->mfd;
378 int reg, value, id = rdev_get_id(dev);
379
380 reg = pmic->get_ctrl_reg(id);
381 if (reg < 0)
382 return reg;
383
384 switch (mode) {
385 case REGULATOR_MODE_NORMAL:
386 return tps65910_reg_update_bits(pmic->mfd, reg,
387 LDO_ST_MODE_BIT | LDO_ST_ON_BIT,
388 LDO_ST_ON_BIT);
389 case REGULATOR_MODE_IDLE:
390 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
391 return tps65910_reg_set_bits(mfd, reg, value);
392 case REGULATOR_MODE_STANDBY:
393 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
394 }
395
396 return -EINVAL;
397 }
398
399 static unsigned int tps65910_get_mode(struct regulator_dev *dev)
400 {
401 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
402 int ret, reg, value, id = rdev_get_id(dev);
403
404 reg = pmic->get_ctrl_reg(id);
405 if (reg < 0)
406 return reg;
407
408 ret = tps65910_reg_read(pmic->mfd, reg, &value);
409 if (ret < 0)
410 return ret;
411
412 if (!(value & LDO_ST_ON_BIT))
413 return REGULATOR_MODE_STANDBY;
414 else if (value & LDO_ST_MODE_BIT)
415 return REGULATOR_MODE_IDLE;
416 else
417 return REGULATOR_MODE_NORMAL;
418 }
419
420 static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
421 {
422 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
423 int ret, id = rdev_get_id(dev);
424 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
425
426 switch (id) {
427 case TPS65910_REG_VDD1:
428 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_OP, &opvsel);
429 if (ret < 0)
430 return ret;
431 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1, &mult);
432 if (ret < 0)
433 return ret;
434 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
435 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD1_SR, &srvsel);
436 if (ret < 0)
437 return ret;
438 sr = opvsel & VDD1_OP_CMD_MASK;
439 opvsel &= VDD1_OP_SEL_MASK;
440 srvsel &= VDD1_SR_SEL_MASK;
441 vselmax = 75;
442 break;
443 case TPS65910_REG_VDD2:
444 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_OP, &opvsel);
445 if (ret < 0)
446 return ret;
447 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2, &mult);
448 if (ret < 0)
449 return ret;
450 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
451 ret = tps65910_reg_read(pmic->mfd, TPS65910_VDD2_SR, &srvsel);
452 if (ret < 0)
453 return ret;
454 sr = opvsel & VDD2_OP_CMD_MASK;
455 opvsel &= VDD2_OP_SEL_MASK;
456 srvsel &= VDD2_SR_SEL_MASK;
457 vselmax = 75;
458 break;
459 case TPS65911_REG_VDDCTRL:
460 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_OP,
461 &opvsel);
462 if (ret < 0)
463 return ret;
464 ret = tps65910_reg_read(pmic->mfd, TPS65911_VDDCTRL_SR,
465 &srvsel);
466 if (ret < 0)
467 return ret;
468 sr = opvsel & VDDCTRL_OP_CMD_MASK;
469 opvsel &= VDDCTRL_OP_SEL_MASK;
470 srvsel &= VDDCTRL_SR_SEL_MASK;
471 vselmax = 64;
472 break;
473 }
474
475 /* multiplier 0 == 1 but 2,3 normal */
476 if (!mult)
477 mult=1;
478
479 if (sr) {
480 /* normalise to valid range */
481 if (srvsel < 3)
482 srvsel = 3;
483 if (srvsel > vselmax)
484 srvsel = vselmax;
485 return srvsel - 3;
486 } else {
487
488 /* normalise to valid range*/
489 if (opvsel < 3)
490 opvsel = 3;
491 if (opvsel > vselmax)
492 opvsel = vselmax;
493 return opvsel - 3;
494 }
495 return -EINVAL;
496 }
497
498 static int tps65910_get_voltage_sel(struct regulator_dev *dev)
499 {
500 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
501 int ret, reg, value, id = rdev_get_id(dev);
502
503 reg = pmic->get_ctrl_reg(id);
504 if (reg < 0)
505 return reg;
506
507 ret = tps65910_reg_read(pmic->mfd, reg, &value);
508 if (ret < 0)
509 return ret;
510
511 switch (id) {
512 case TPS65910_REG_VIO:
513 case TPS65910_REG_VDIG1:
514 case TPS65910_REG_VDIG2:
515 case TPS65910_REG_VPLL:
516 case TPS65910_REG_VDAC:
517 case TPS65910_REG_VAUX1:
518 case TPS65910_REG_VAUX2:
519 case TPS65910_REG_VAUX33:
520 case TPS65910_REG_VMMC:
521 value &= LDO_SEL_MASK;
522 value >>= LDO_SEL_SHIFT;
523 break;
524 default:
525 return -EINVAL;
526 }
527
528 return value;
529 }
530
531 static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
532 {
533 return dev->desc->volt_table[0];
534 }
535
536 static int tps65911_get_voltage_sel(struct regulator_dev *dev)
537 {
538 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
539 int ret, id = rdev_get_id(dev);
540 unsigned int value, reg;
541
542 reg = pmic->get_ctrl_reg(id);
543
544 ret = tps65910_reg_read(pmic->mfd, reg, &value);
545 if (ret < 0)
546 return ret;
547
548 switch (id) {
549 case TPS65911_REG_LDO1:
550 case TPS65911_REG_LDO2:
551 case TPS65911_REG_LDO4:
552 value &= LDO1_SEL_MASK;
553 value >>= LDO_SEL_SHIFT;
554 break;
555 case TPS65911_REG_LDO3:
556 case TPS65911_REG_LDO5:
557 case TPS65911_REG_LDO6:
558 case TPS65911_REG_LDO7:
559 case TPS65911_REG_LDO8:
560 value &= LDO3_SEL_MASK;
561 value >>= LDO_SEL_SHIFT;
562 break;
563 case TPS65910_REG_VIO:
564 value &= LDO_SEL_MASK;
565 value >>= LDO_SEL_SHIFT;
566 break;
567 default:
568 return -EINVAL;
569 }
570
571 return value;
572 }
573
574 static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
575 unsigned selector)
576 {
577 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
578 int id = rdev_get_id(dev), vsel;
579 int dcdc_mult = 0;
580
581 switch (id) {
582 case TPS65910_REG_VDD1:
583 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
584 if (dcdc_mult == 1)
585 dcdc_mult--;
586 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
587
588 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD1,
589 VDD1_VGAIN_SEL_MASK,
590 dcdc_mult << VDD1_VGAIN_SEL_SHIFT);
591 tps65910_reg_write(pmic->mfd, TPS65910_VDD1_OP, vsel);
592 break;
593 case TPS65910_REG_VDD2:
594 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
595 if (dcdc_mult == 1)
596 dcdc_mult--;
597 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
598
599 tps65910_reg_update_bits(pmic->mfd, TPS65910_VDD2,
600 VDD1_VGAIN_SEL_MASK,
601 dcdc_mult << VDD2_VGAIN_SEL_SHIFT);
602 tps65910_reg_write(pmic->mfd, TPS65910_VDD2_OP, vsel);
603 break;
604 case TPS65911_REG_VDDCTRL:
605 vsel = selector + 3;
606 tps65910_reg_write(pmic->mfd, TPS65911_VDDCTRL_OP, vsel);
607 }
608
609 return 0;
610 }
611
612 static int tps65910_set_voltage_sel(struct regulator_dev *dev,
613 unsigned selector)
614 {
615 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
616 int reg, id = rdev_get_id(dev);
617
618 reg = pmic->get_ctrl_reg(id);
619 if (reg < 0)
620 return reg;
621
622 switch (id) {
623 case TPS65910_REG_VIO:
624 case TPS65910_REG_VDIG1:
625 case TPS65910_REG_VDIG2:
626 case TPS65910_REG_VPLL:
627 case TPS65910_REG_VDAC:
628 case TPS65910_REG_VAUX1:
629 case TPS65910_REG_VAUX2:
630 case TPS65910_REG_VAUX33:
631 case TPS65910_REG_VMMC:
632 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
633 selector << LDO_SEL_SHIFT);
634 }
635
636 return -EINVAL;
637 }
638
639 static int tps65911_set_voltage_sel(struct regulator_dev *dev,
640 unsigned selector)
641 {
642 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
643 int reg, id = rdev_get_id(dev);
644
645 reg = pmic->get_ctrl_reg(id);
646 if (reg < 0)
647 return reg;
648
649 switch (id) {
650 case TPS65911_REG_LDO1:
651 case TPS65911_REG_LDO2:
652 case TPS65911_REG_LDO4:
653 return tps65910_reg_update_bits(pmic->mfd, reg, LDO1_SEL_MASK,
654 selector << LDO_SEL_SHIFT);
655 case TPS65911_REG_LDO3:
656 case TPS65911_REG_LDO5:
657 case TPS65911_REG_LDO6:
658 case TPS65911_REG_LDO7:
659 case TPS65911_REG_LDO8:
660 return tps65910_reg_update_bits(pmic->mfd, reg, LDO3_SEL_MASK,
661 selector << LDO_SEL_SHIFT);
662 case TPS65910_REG_VIO:
663 return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
664 selector << LDO_SEL_SHIFT);
665 }
666
667 return -EINVAL;
668 }
669
670
671 static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
672 unsigned selector)
673 {
674 int volt, mult = 1, id = rdev_get_id(dev);
675
676 switch (id) {
677 case TPS65910_REG_VDD1:
678 case TPS65910_REG_VDD2:
679 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
680 volt = VDD1_2_MIN_VOLT +
681 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
682 break;
683 case TPS65911_REG_VDDCTRL:
684 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
685 break;
686 default:
687 BUG();
688 return -EINVAL;
689 }
690
691 return volt * 100 * mult;
692 }
693
694 static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
695 {
696 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
697 int step_mv = 0, id = rdev_get_id(dev);
698
699 switch(id) {
700 case TPS65911_REG_LDO1:
701 case TPS65911_REG_LDO2:
702 case TPS65911_REG_LDO4:
703 /* The first 5 values of the selector correspond to 1V */
704 if (selector < 5)
705 selector = 0;
706 else
707 selector -= 4;
708
709 step_mv = 50;
710 break;
711 case TPS65911_REG_LDO3:
712 case TPS65911_REG_LDO5:
713 case TPS65911_REG_LDO6:
714 case TPS65911_REG_LDO7:
715 case TPS65911_REG_LDO8:
716 /* The first 3 values of the selector correspond to 1V */
717 if (selector < 3)
718 selector = 0;
719 else
720 selector -= 2;
721
722 step_mv = 100;
723 break;
724 case TPS65910_REG_VIO:
725 return pmic->info[id]->voltage_table[selector];
726 default:
727 return -EINVAL;
728 }
729
730 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
731 }
732
733 /* Regulator ops (except VRTC) */
734 static struct regulator_ops tps65910_ops_dcdc = {
735 .is_enabled = regulator_is_enabled_regmap,
736 .enable = regulator_enable_regmap,
737 .disable = regulator_disable_regmap,
738 .set_mode = tps65910_set_mode,
739 .get_mode = tps65910_get_mode,
740 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
741 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
742 .set_voltage_time_sel = regulator_set_voltage_time_sel,
743 .list_voltage = tps65910_list_voltage_dcdc,
744 };
745
746 static struct regulator_ops tps65910_ops_vdd3 = {
747 .is_enabled = regulator_is_enabled_regmap,
748 .enable = regulator_enable_regmap,
749 .disable = regulator_disable_regmap,
750 .set_mode = tps65910_set_mode,
751 .get_mode = tps65910_get_mode,
752 .get_voltage = tps65910_get_voltage_vdd3,
753 .list_voltage = regulator_list_voltage_table,
754 };
755
756 static struct regulator_ops tps65910_ops = {
757 .is_enabled = regulator_is_enabled_regmap,
758 .enable = regulator_enable_regmap,
759 .disable = regulator_disable_regmap,
760 .set_mode = tps65910_set_mode,
761 .get_mode = tps65910_get_mode,
762 .get_voltage_sel = tps65910_get_voltage_sel,
763 .set_voltage_sel = tps65910_set_voltage_sel,
764 .list_voltage = regulator_list_voltage_table,
765 };
766
767 static struct regulator_ops tps65911_ops = {
768 .is_enabled = regulator_is_enabled_regmap,
769 .enable = regulator_enable_regmap,
770 .disable = regulator_disable_regmap,
771 .set_mode = tps65910_set_mode,
772 .get_mode = tps65910_get_mode,
773 .get_voltage_sel = tps65911_get_voltage_sel,
774 .set_voltage_sel = tps65911_set_voltage_sel,
775 .list_voltage = tps65911_list_voltage,
776 };
777
778 static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
779 int id, int ext_sleep_config)
780 {
781 struct tps65910 *mfd = pmic->mfd;
782 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
783 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
784 int ret;
785
786 /*
787 * Regulator can not be control from multiple external input EN1, EN2
788 * and EN3 together.
789 */
790 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
791 int en_count;
792 en_count = ((ext_sleep_config &
793 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
794 en_count += ((ext_sleep_config &
795 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
796 en_count += ((ext_sleep_config &
797 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
798 en_count += ((ext_sleep_config &
799 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
800 if (en_count > 1) {
801 dev_err(mfd->dev,
802 "External sleep control flag is not proper\n");
803 return -EINVAL;
804 }
805 }
806
807 pmic->board_ext_control[id] = ext_sleep_config;
808
809 /* External EN1 control */
810 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
811 ret = tps65910_reg_set_bits(mfd,
812 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
813 else
814 ret = tps65910_reg_clear_bits(mfd,
815 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
816 if (ret < 0) {
817 dev_err(mfd->dev,
818 "Error in configuring external control EN1\n");
819 return ret;
820 }
821
822 /* External EN2 control */
823 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
824 ret = tps65910_reg_set_bits(mfd,
825 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
826 else
827 ret = tps65910_reg_clear_bits(mfd,
828 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
829 if (ret < 0) {
830 dev_err(mfd->dev,
831 "Error in configuring external control EN2\n");
832 return ret;
833 }
834
835 /* External EN3 control for TPS65910 LDO only */
836 if ((tps65910_chip_id(mfd) == TPS65910) &&
837 (id >= TPS65910_REG_VDIG1)) {
838 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
839 ret = tps65910_reg_set_bits(mfd,
840 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
841 else
842 ret = tps65910_reg_clear_bits(mfd,
843 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
844 if (ret < 0) {
845 dev_err(mfd->dev,
846 "Error in configuring external control EN3\n");
847 return ret;
848 }
849 }
850
851 /* Return if no external control is selected */
852 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
853 /* Clear all sleep controls */
854 ret = tps65910_reg_clear_bits(mfd,
855 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
856 if (!ret)
857 ret = tps65910_reg_clear_bits(mfd,
858 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
859 if (ret < 0)
860 dev_err(mfd->dev,
861 "Error in configuring SLEEP register\n");
862 return ret;
863 }
864
865 /*
866 * For regulator that has separate operational and sleep register make
867 * sure that operational is used and clear sleep register to turn
868 * regulator off when external control is inactive
869 */
870 if ((id == TPS65910_REG_VDD1) ||
871 (id == TPS65910_REG_VDD2) ||
872 ((id == TPS65911_REG_VDDCTRL) &&
873 (tps65910_chip_id(mfd) == TPS65911))) {
874 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
875 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
876 int opvsel, srvsel;
877
878 ret = tps65910_reg_read(pmic->mfd, op_reg_add, &opvsel);
879 if (ret < 0)
880 return ret;
881 ret = tps65910_reg_read(pmic->mfd, sr_reg_add, &srvsel);
882 if (ret < 0)
883 return ret;
884
885 if (opvsel & VDD1_OP_CMD_MASK) {
886 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
887
888 ret = tps65910_reg_write(pmic->mfd, op_reg_add,
889 reg_val);
890 if (ret < 0) {
891 dev_err(mfd->dev,
892 "Error in configuring op register\n");
893 return ret;
894 }
895 }
896 ret = tps65910_reg_write(pmic->mfd, sr_reg_add, 0);
897 if (ret < 0) {
898 dev_err(mfd->dev, "Error in settting sr register\n");
899 return ret;
900 }
901 }
902
903 ret = tps65910_reg_clear_bits(mfd,
904 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
905 if (!ret) {
906 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
907 ret = tps65910_reg_set_bits(mfd,
908 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
909 else
910 ret = tps65910_reg_clear_bits(mfd,
911 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
912 }
913 if (ret < 0)
914 dev_err(mfd->dev,
915 "Error in configuring SLEEP register\n");
916
917 return ret;
918 }
919
920 #ifdef CONFIG_OF
921
922 static struct of_regulator_match tps65910_matches[] = {
923 { .name = "vrtc", .driver_data = (void *) &tps65910_regs[0] },
924 { .name = "vio", .driver_data = (void *) &tps65910_regs[1] },
925 { .name = "vdd1", .driver_data = (void *) &tps65910_regs[2] },
926 { .name = "vdd2", .driver_data = (void *) &tps65910_regs[3] },
927 { .name = "vdd3", .driver_data = (void *) &tps65910_regs[4] },
928 { .name = "vdig1", .driver_data = (void *) &tps65910_regs[5] },
929 { .name = "vdig2", .driver_data = (void *) &tps65910_regs[6] },
930 { .name = "vpll", .driver_data = (void *) &tps65910_regs[7] },
931 { .name = "vdac", .driver_data = (void *) &tps65910_regs[8] },
932 { .name = "vaux1", .driver_data = (void *) &tps65910_regs[9] },
933 { .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
934 { .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
935 { .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
936 };
937
938 static struct of_regulator_match tps65911_matches[] = {
939 { .name = "vrtc", .driver_data = (void *) &tps65911_regs[0] },
940 { .name = "vio", .driver_data = (void *) &tps65911_regs[1] },
941 { .name = "vdd1", .driver_data = (void *) &tps65911_regs[2] },
942 { .name = "vdd2", .driver_data = (void *) &tps65911_regs[3] },
943 { .name = "vddctrl", .driver_data = (void *) &tps65911_regs[4] },
944 { .name = "ldo1", .driver_data = (void *) &tps65911_regs[5] },
945 { .name = "ldo2", .driver_data = (void *) &tps65911_regs[6] },
946 { .name = "ldo3", .driver_data = (void *) &tps65911_regs[7] },
947 { .name = "ldo4", .driver_data = (void *) &tps65911_regs[8] },
948 { .name = "ldo5", .driver_data = (void *) &tps65911_regs[9] },
949 { .name = "ldo6", .driver_data = (void *) &tps65911_regs[10] },
950 { .name = "ldo7", .driver_data = (void *) &tps65911_regs[11] },
951 { .name = "ldo8", .driver_data = (void *) &tps65911_regs[12] },
952 };
953
954 static struct tps65910_board *tps65910_parse_dt_reg_data(
955 struct platform_device *pdev,
956 struct of_regulator_match **tps65910_reg_matches)
957 {
958 struct tps65910_board *pmic_plat_data;
959 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
960 struct device_node *np = pdev->dev.parent->of_node;
961 struct device_node *regulators;
962 struct of_regulator_match *matches;
963 unsigned int prop;
964 int idx = 0, ret, count;
965
966 pmic_plat_data = devm_kzalloc(&pdev->dev, sizeof(*pmic_plat_data),
967 GFP_KERNEL);
968
969 if (!pmic_plat_data) {
970 dev_err(&pdev->dev, "Failure to alloc pdata for regulators.\n");
971 return NULL;
972 }
973
974 regulators = of_find_node_by_name(np, "regulators");
975 if (!regulators) {
976 dev_err(&pdev->dev, "regulator node not found\n");
977 return NULL;
978 }
979
980 switch (tps65910_chip_id(tps65910)) {
981 case TPS65910:
982 count = ARRAY_SIZE(tps65910_matches);
983 matches = tps65910_matches;
984 break;
985 case TPS65911:
986 count = ARRAY_SIZE(tps65911_matches);
987 matches = tps65911_matches;
988 break;
989 default:
990 dev_err(&pdev->dev, "Invalid tps chip version\n");
991 return NULL;
992 }
993
994 ret = of_regulator_match(pdev->dev.parent, regulators, matches, count);
995 if (ret < 0) {
996 dev_err(&pdev->dev, "Error parsing regulator init data: %d\n",
997 ret);
998 return NULL;
999 }
1000
1001 *tps65910_reg_matches = matches;
1002
1003 for (idx = 0; idx < count; idx++) {
1004 if (!matches[idx].init_data || !matches[idx].of_node)
1005 continue;
1006
1007 pmic_plat_data->tps65910_pmic_init_data[idx] =
1008 matches[idx].init_data;
1009
1010 ret = of_property_read_u32(matches[idx].of_node,
1011 "ti,regulator-ext-sleep-control", &prop);
1012 if (!ret)
1013 pmic_plat_data->regulator_ext_sleep_control[idx] = prop;
1014
1015 }
1016
1017 return pmic_plat_data;
1018 }
1019 #else
1020 static inline struct tps65910_board *tps65910_parse_dt_reg_data(
1021 struct platform_device *pdev,
1022 struct of_regulator_match **tps65910_reg_matches)
1023 {
1024 *tps65910_reg_matches = NULL;
1025 return NULL;
1026 }
1027 #endif
1028
1029 static __devinit int tps65910_probe(struct platform_device *pdev)
1030 {
1031 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
1032 struct regulator_config config = { };
1033 struct tps_info *info;
1034 struct regulator_init_data *reg_data;
1035 struct regulator_dev *rdev;
1036 struct tps65910_reg *pmic;
1037 struct tps65910_board *pmic_plat_data;
1038 struct of_regulator_match *tps65910_reg_matches = NULL;
1039 int i, err;
1040
1041 pmic_plat_data = dev_get_platdata(tps65910->dev);
1042 if (!pmic_plat_data && tps65910->dev->of_node)
1043 pmic_plat_data = tps65910_parse_dt_reg_data(pdev,
1044 &tps65910_reg_matches);
1045
1046 if (!pmic_plat_data) {
1047 dev_err(&pdev->dev, "Platform data not found\n");
1048 return -EINVAL;
1049 }
1050
1051 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1052 if (!pmic) {
1053 dev_err(&pdev->dev, "Memory allocation failed for pmic\n");
1054 return -ENOMEM;
1055 }
1056
1057 pmic->mfd = tps65910;
1058 platform_set_drvdata(pdev, pmic);
1059
1060 /* Give control of all register to control port */
1061 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1062 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1063
1064 switch(tps65910_chip_id(tps65910)) {
1065 case TPS65910:
1066 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
1067 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
1068 pmic->ext_sleep_control = tps65910_ext_sleep_control;
1069 info = tps65910_regs;
1070 break;
1071 case TPS65911:
1072 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
1073 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
1074 pmic->ext_sleep_control = tps65911_ext_sleep_control;
1075 info = tps65911_regs;
1076 break;
1077 default:
1078 dev_err(&pdev->dev, "Invalid tps chip version\n");
1079 return -ENODEV;
1080 }
1081
1082 pmic->desc = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1083 sizeof(struct regulator_desc), GFP_KERNEL);
1084 if (!pmic->desc) {
1085 dev_err(&pdev->dev, "Memory alloc fails for desc\n");
1086 return -ENOMEM;
1087 }
1088
1089 pmic->info = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1090 sizeof(struct tps_info *), GFP_KERNEL);
1091 if (!pmic->info) {
1092 dev_err(&pdev->dev, "Memory alloc fails for info\n");
1093 return -ENOMEM;
1094 }
1095
1096 pmic->rdev = devm_kzalloc(&pdev->dev, pmic->num_regulators *
1097 sizeof(struct regulator_dev *), GFP_KERNEL);
1098 if (!pmic->rdev) {
1099 dev_err(&pdev->dev, "Memory alloc fails for rdev\n");
1100 return -ENOMEM;
1101 }
1102
1103 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1104 i++, info++) {
1105
1106 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1107
1108 /* Regulator API handles empty constraints but not NULL
1109 * constraints */
1110 if (!reg_data)
1111 continue;
1112
1113 /* Register the regulators */
1114 pmic->info[i] = info;
1115
1116 pmic->desc[i].name = info->name;
1117 pmic->desc[i].supply_name = info->vin_name;
1118 pmic->desc[i].id = i;
1119 pmic->desc[i].n_voltages = info->n_voltages;
1120 pmic->desc[i].enable_time = info->enable_time_us;
1121
1122 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
1123 pmic->desc[i].ops = &tps65910_ops_dcdc;
1124 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1125 VDD1_2_NUM_VOLT_COARSE;
1126 pmic->desc[i].ramp_delay = 12500;
1127 } else if (i == TPS65910_REG_VDD3) {
1128 if (tps65910_chip_id(tps65910) == TPS65910) {
1129 pmic->desc[i].ops = &tps65910_ops_vdd3;
1130 pmic->desc[i].volt_table = info->voltage_table;
1131 } else {
1132 pmic->desc[i].ops = &tps65910_ops_dcdc;
1133 pmic->desc[i].ramp_delay = 5000;
1134 }
1135 } else {
1136 if (tps65910_chip_id(tps65910) == TPS65910) {
1137 pmic->desc[i].ops = &tps65910_ops;
1138 pmic->desc[i].volt_table = info->voltage_table;
1139 } else {
1140 pmic->desc[i].ops = &tps65911_ops;
1141 }
1142 }
1143
1144 err = tps65910_set_ext_sleep_config(pmic, i,
1145 pmic_plat_data->regulator_ext_sleep_control[i]);
1146 /*
1147 * Failing on regulator for configuring externally control
1148 * is not a serious issue, just throw warning.
1149 */
1150 if (err < 0)
1151 dev_warn(tps65910->dev,
1152 "Failed to initialise ext control config\n");
1153
1154 pmic->desc[i].type = REGULATOR_VOLTAGE;
1155 pmic->desc[i].owner = THIS_MODULE;
1156 pmic->desc[i].enable_reg = pmic->get_ctrl_reg(i);
1157 pmic->desc[i].enable_mask = TPS65910_SUPPLY_STATE_ENABLED;
1158
1159 config.dev = tps65910->dev;
1160 config.init_data = reg_data;
1161 config.driver_data = pmic;
1162 config.regmap = tps65910->regmap;
1163
1164 if (tps65910_reg_matches)
1165 config.of_node = tps65910_reg_matches[i].of_node;
1166
1167 rdev = regulator_register(&pmic->desc[i], &config);
1168 if (IS_ERR(rdev)) {
1169 dev_err(tps65910->dev,
1170 "failed to register %s regulator\n",
1171 pdev->name);
1172 err = PTR_ERR(rdev);
1173 goto err_unregister_regulator;
1174 }
1175
1176 /* Save regulator for cleanup */
1177 pmic->rdev[i] = rdev;
1178 }
1179 return 0;
1180
1181 err_unregister_regulator:
1182 while (--i >= 0)
1183 regulator_unregister(pmic->rdev[i]);
1184 return err;
1185 }
1186
1187 static int __devexit tps65910_remove(struct platform_device *pdev)
1188 {
1189 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1190 int i;
1191
1192 for (i = 0; i < pmic->num_regulators; i++)
1193 regulator_unregister(pmic->rdev[i]);
1194
1195 return 0;
1196 }
1197
1198 static void tps65910_shutdown(struct platform_device *pdev)
1199 {
1200 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1201 int i;
1202
1203 /*
1204 * Before bootloader jumps to kernel, it makes sure that required
1205 * external control signals are in desired state so that given rails
1206 * can be configure accordingly.
1207 * If rails are configured to be controlled from external control
1208 * then before shutting down/rebooting the system, the external
1209 * control configuration need to be remove from the rails so that
1210 * its output will be available as per register programming even
1211 * if external controls are removed. This is require when the POR
1212 * value of the control signals are not in active state and before
1213 * bootloader initializes it, the system requires the rail output
1214 * to be active for booting.
1215 */
1216 for (i = 0; i < pmic->num_regulators; i++) {
1217 int err;
1218 if (!pmic->rdev[i])
1219 continue;
1220
1221 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1222 if (err < 0)
1223 dev_err(&pdev->dev,
1224 "Error in clearing external control\n");
1225 }
1226 }
1227
1228 static struct platform_driver tps65910_driver = {
1229 .driver = {
1230 .name = "tps65910-pmic",
1231 .owner = THIS_MODULE,
1232 },
1233 .probe = tps65910_probe,
1234 .remove = __devexit_p(tps65910_remove),
1235 .shutdown = tps65910_shutdown,
1236 };
1237
1238 static int __init tps65910_init(void)
1239 {
1240 return platform_driver_register(&tps65910_driver);
1241 }
1242 subsys_initcall(tps65910_init);
1243
1244 static void __exit tps65910_cleanup(void)
1245 {
1246 platform_driver_unregister(&tps65910_driver);
1247 }
1248 module_exit(tps65910_cleanup);
1249
1250 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1251 MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
1252 MODULE_LICENSE("GPL v2");
1253 MODULE_ALIAS("platform:tps65910-pmic");
Linux ARM platform port for MOXA ART SoC