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Adding support for MOXA ART SoC. Testing port of linux-2.6.32.60-moxart.
[linux-3.6.7-moxart.git] / drivers / scsi / hpsa.c
blobf9823f2b0c5196f160bfaffbbd8c5c18d3944c3f
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/pci-aspm.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fs.h>
31 #include <linux/timer.h>
32 #include <linux/seq_file.h>
33 #include <linux/init.h>
34 #include <linux/spinlock.h>
35 #include <linux/compat.h>
36 #include <linux/blktrace_api.h>
37 #include <linux/uaccess.h>
38 #include <linux/io.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/completion.h>
41 #include <linux/moduleparam.h>
42 #include <scsi/scsi.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <scsi/scsi_device.h>
45 #include <scsi/scsi_host.h>
46 #include <scsi/scsi_tcq.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/kthread.h>
52 #include <linux/jiffies.h>
53 #include "hpsa_cmd.h"
54 #include "hpsa.h"
55
56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
57 #define HPSA_DRIVER_VERSION "2.0.2-1"
58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
59 #define HPSA "hpsa"
60
61 /* How long to wait (in milliseconds) for board to go into simple mode */
62 #define MAX_CONFIG_WAIT 30000
63 #define MAX_IOCTL_CONFIG_WAIT 1000
64
65 /*define how many times we will try a command because of bus resets */
66 #define MAX_CMD_RETRIES 3
67
68 /* Embedded module documentation macros - see modules.h */
69 MODULE_AUTHOR("Hewlett-Packard Company");
70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 HPSA_DRIVER_VERSION);
72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73 MODULE_VERSION(HPSA_DRIVER_VERSION);
74 MODULE_LICENSE("GPL");
75
76 static int hpsa_allow_any;
77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78 MODULE_PARM_DESC(hpsa_allow_any,
79 "Allow hpsa driver to access unknown HP Smart Array hardware");
80 static int hpsa_simple_mode;
81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82 MODULE_PARM_DESC(hpsa_simple_mode,
83 "Use 'simple mode' rather than 'performant mode'");
84
85 /* define the PCI info for the cards we can control */
86 static const struct pci_device_id hpsa_pci_device_id[] = {
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
102 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
103 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
104 {0,}
105 };
106
107 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
108
109 /* board_id = Subsystem Device ID & Vendor ID
110 * product = Marketing Name for the board
111 * access = Address of the struct of function pointers
112 */
113 static struct board_type products[] = {
114 {0x3241103C, "Smart Array P212", &SA5_access},
115 {0x3243103C, "Smart Array P410", &SA5_access},
116 {0x3245103C, "Smart Array P410i", &SA5_access},
117 {0x3247103C, "Smart Array P411", &SA5_access},
118 {0x3249103C, "Smart Array P812", &SA5_access},
119 {0x324a103C, "Smart Array P712m", &SA5_access},
120 {0x324b103C, "Smart Array P711m", &SA5_access},
121 {0x3350103C, "Smart Array", &SA5_access},
122 {0x3351103C, "Smart Array", &SA5_access},
123 {0x3352103C, "Smart Array", &SA5_access},
124 {0x3353103C, "Smart Array", &SA5_access},
125 {0x3354103C, "Smart Array", &SA5_access},
126 {0x3355103C, "Smart Array", &SA5_access},
127 {0x3356103C, "Smart Array", &SA5_access},
128 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
129 };
130
131 static int number_of_controllers;
132
133 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
134 static spinlock_t lockup_detector_lock;
135 static struct task_struct *hpsa_lockup_detector;
136
137 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
138 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
139 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
140 static void start_io(struct ctlr_info *h);
141
142 #ifdef CONFIG_COMPAT
143 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
144 #endif
145
146 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
147 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
148 static struct CommandList *cmd_alloc(struct ctlr_info *h);
149 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
150 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
151 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
152 int cmd_type);
153
154 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
155 static void hpsa_scan_start(struct Scsi_Host *);
156 static int hpsa_scan_finished(struct Scsi_Host *sh,
157 unsigned long elapsed_time);
158 static int hpsa_change_queue_depth(struct scsi_device *sdev,
159 int qdepth, int reason);
160
161 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
162 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
163 static int hpsa_slave_alloc(struct scsi_device *sdev);
164 static void hpsa_slave_destroy(struct scsi_device *sdev);
165
166 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
167 static int check_for_unit_attention(struct ctlr_info *h,
168 struct CommandList *c);
169 static void check_ioctl_unit_attention(struct ctlr_info *h,
170 struct CommandList *c);
171 /* performant mode helper functions */
172 static void calc_bucket_map(int *bucket, int num_buckets,
173 int nsgs, int *bucket_map);
174 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
175 static inline u32 next_command(struct ctlr_info *h, u8 q);
176 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
177 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
178 u64 *cfg_offset);
179 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
180 unsigned long *memory_bar);
181 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
182 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
183 void __iomem *vaddr, int wait_for_ready);
184 static inline void finish_cmd(struct CommandList *c);
185 #define BOARD_NOT_READY 0
186 #define BOARD_READY 1
187
188 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
189 {
190 unsigned long *priv = shost_priv(sdev->host);
191 return (struct ctlr_info *) *priv;
192 }
193
194 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
195 {
196 unsigned long *priv = shost_priv(sh);
197 return (struct ctlr_info *) *priv;
198 }
199
200 static int check_for_unit_attention(struct ctlr_info *h,
201 struct CommandList *c)
202 {
203 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
204 return 0;
205
206 switch (c->err_info->SenseInfo[12]) {
207 case STATE_CHANGED:
208 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
209 "detected, command retried\n", h->ctlr);
210 break;
211 case LUN_FAILED:
212 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
213 "detected, action required\n", h->ctlr);
214 break;
215 case REPORT_LUNS_CHANGED:
216 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
217 "changed, action required\n", h->ctlr);
218 /*
219 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
220 * target (array) devices.
221 */
222 break;
223 case POWER_OR_RESET:
224 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
225 "or device reset detected\n", h->ctlr);
226 break;
227 case UNIT_ATTENTION_CLEARED:
228 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
229 "cleared by another initiator\n", h->ctlr);
230 break;
231 default:
232 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
233 "unit attention detected\n", h->ctlr);
234 break;
235 }
236 return 1;
237 }
238
239 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
240 {
241 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
242 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
243 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
244 return 0;
245 dev_warn(&h->pdev->dev, HPSA "device busy");
246 return 1;
247 }
248
249 static ssize_t host_store_rescan(struct device *dev,
250 struct device_attribute *attr,
251 const char *buf, size_t count)
252 {
253 struct ctlr_info *h;
254 struct Scsi_Host *shost = class_to_shost(dev);
255 h = shost_to_hba(shost);
256 hpsa_scan_start(h->scsi_host);
257 return count;
258 }
259
260 static ssize_t host_show_firmware_revision(struct device *dev,
261 struct device_attribute *attr, char *buf)
262 {
263 struct ctlr_info *h;
264 struct Scsi_Host *shost = class_to_shost(dev);
265 unsigned char *fwrev;
266
267 h = shost_to_hba(shost);
268 if (!h->hba_inquiry_data)
269 return 0;
270 fwrev = &h->hba_inquiry_data[32];
271 return snprintf(buf, 20, "%c%c%c%c\n",
272 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
273 }
274
275 static ssize_t host_show_commands_outstanding(struct device *dev,
276 struct device_attribute *attr, char *buf)
277 {
278 struct Scsi_Host *shost = class_to_shost(dev);
279 struct ctlr_info *h = shost_to_hba(shost);
280
281 return snprintf(buf, 20, "%d\n", h->commands_outstanding);
282 }
283
284 static ssize_t host_show_transport_mode(struct device *dev,
285 struct device_attribute *attr, char *buf)
286 {
287 struct ctlr_info *h;
288 struct Scsi_Host *shost = class_to_shost(dev);
289
290 h = shost_to_hba(shost);
291 return snprintf(buf, 20, "%s\n",
292 h->transMethod & CFGTBL_Trans_Performant ?
293 "performant" : "simple");
294 }
295
296 /* List of controllers which cannot be hard reset on kexec with reset_devices */
297 static u32 unresettable_controller[] = {
298 0x324a103C, /* Smart Array P712m */
299 0x324b103C, /* SmartArray P711m */
300 0x3223103C, /* Smart Array P800 */
301 0x3234103C, /* Smart Array P400 */
302 0x3235103C, /* Smart Array P400i */
303 0x3211103C, /* Smart Array E200i */
304 0x3212103C, /* Smart Array E200 */
305 0x3213103C, /* Smart Array E200i */
306 0x3214103C, /* Smart Array E200i */
307 0x3215103C, /* Smart Array E200i */
308 0x3237103C, /* Smart Array E500 */
309 0x323D103C, /* Smart Array P700m */
310 0x40800E11, /* Smart Array 5i */
311 0x409C0E11, /* Smart Array 6400 */
312 0x409D0E11, /* Smart Array 6400 EM */
313 0x40700E11, /* Smart Array 5300 */
314 0x40820E11, /* Smart Array 532 */
315 0x40830E11, /* Smart Array 5312 */
316 0x409A0E11, /* Smart Array 641 */
317 0x409B0E11, /* Smart Array 642 */
318 0x40910E11, /* Smart Array 6i */
319 };
320
321 /* List of controllers which cannot even be soft reset */
322 static u32 soft_unresettable_controller[] = {
323 0x40800E11, /* Smart Array 5i */
324 0x40700E11, /* Smart Array 5300 */
325 0x40820E11, /* Smart Array 532 */
326 0x40830E11, /* Smart Array 5312 */
327 0x409A0E11, /* Smart Array 641 */
328 0x409B0E11, /* Smart Array 642 */
329 0x40910E11, /* Smart Array 6i */
330 /* Exclude 640x boards. These are two pci devices in one slot
331 * which share a battery backed cache module. One controls the
332 * cache, the other accesses the cache through the one that controls
333 * it. If we reset the one controlling the cache, the other will
334 * likely not be happy. Just forbid resetting this conjoined mess.
335 * The 640x isn't really supported by hpsa anyway.
336 */
337 0x409C0E11, /* Smart Array 6400 */
338 0x409D0E11, /* Smart Array 6400 EM */
339 };
340
341 static int ctlr_is_hard_resettable(u32 board_id)
342 {
343 int i;
344
345 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
346 if (unresettable_controller[i] == board_id)
347 return 0;
348 return 1;
349 }
350
351 static int ctlr_is_soft_resettable(u32 board_id)
352 {
353 int i;
354
355 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
356 if (soft_unresettable_controller[i] == board_id)
357 return 0;
358 return 1;
359 }
360
361 static int ctlr_is_resettable(u32 board_id)
362 {
363 return ctlr_is_hard_resettable(board_id) ||
364 ctlr_is_soft_resettable(board_id);
365 }
366
367 static ssize_t host_show_resettable(struct device *dev,
368 struct device_attribute *attr, char *buf)
369 {
370 struct ctlr_info *h;
371 struct Scsi_Host *shost = class_to_shost(dev);
372
373 h = shost_to_hba(shost);
374 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
375 }
376
377 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
378 {
379 return (scsi3addr[3] & 0xC0) == 0x40;
380 }
381
382 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
383 "1(ADM)", "UNKNOWN"
384 };
385 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
386
387 static ssize_t raid_level_show(struct device *dev,
388 struct device_attribute *attr, char *buf)
389 {
390 ssize_t l = 0;
391 unsigned char rlevel;
392 struct ctlr_info *h;
393 struct scsi_device *sdev;
394 struct hpsa_scsi_dev_t *hdev;
395 unsigned long flags;
396
397 sdev = to_scsi_device(dev);
398 h = sdev_to_hba(sdev);
399 spin_lock_irqsave(&h->lock, flags);
400 hdev = sdev->hostdata;
401 if (!hdev) {
402 spin_unlock_irqrestore(&h->lock, flags);
403 return -ENODEV;
404 }
405
406 /* Is this even a logical drive? */
407 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
408 spin_unlock_irqrestore(&h->lock, flags);
409 l = snprintf(buf, PAGE_SIZE, "N/A\n");
410 return l;
411 }
412
413 rlevel = hdev->raid_level;
414 spin_unlock_irqrestore(&h->lock, flags);
415 if (rlevel > RAID_UNKNOWN)
416 rlevel = RAID_UNKNOWN;
417 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
418 return l;
419 }
420
421 static ssize_t lunid_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423 {
424 struct ctlr_info *h;
425 struct scsi_device *sdev;
426 struct hpsa_scsi_dev_t *hdev;
427 unsigned long flags;
428 unsigned char lunid[8];
429
430 sdev = to_scsi_device(dev);
431 h = sdev_to_hba(sdev);
432 spin_lock_irqsave(&h->lock, flags);
433 hdev = sdev->hostdata;
434 if (!hdev) {
435 spin_unlock_irqrestore(&h->lock, flags);
436 return -ENODEV;
437 }
438 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
439 spin_unlock_irqrestore(&h->lock, flags);
440 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
441 lunid[0], lunid[1], lunid[2], lunid[3],
442 lunid[4], lunid[5], lunid[6], lunid[7]);
443 }
444
445 static ssize_t unique_id_show(struct device *dev,
446 struct device_attribute *attr, char *buf)
447 {
448 struct ctlr_info *h;
449 struct scsi_device *sdev;
450 struct hpsa_scsi_dev_t *hdev;
451 unsigned long flags;
452 unsigned char sn[16];
453
454 sdev = to_scsi_device(dev);
455 h = sdev_to_hba(sdev);
456 spin_lock_irqsave(&h->lock, flags);
457 hdev = sdev->hostdata;
458 if (!hdev) {
459 spin_unlock_irqrestore(&h->lock, flags);
460 return -ENODEV;
461 }
462 memcpy(sn, hdev->device_id, sizeof(sn));
463 spin_unlock_irqrestore(&h->lock, flags);
464 return snprintf(buf, 16 * 2 + 2,
465 "%02X%02X%02X%02X%02X%02X%02X%02X"
466 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
467 sn[0], sn[1], sn[2], sn[3],
468 sn[4], sn[5], sn[6], sn[7],
469 sn[8], sn[9], sn[10], sn[11],
470 sn[12], sn[13], sn[14], sn[15]);
471 }
472
473 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
474 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
475 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
476 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
477 static DEVICE_ATTR(firmware_revision, S_IRUGO,
478 host_show_firmware_revision, NULL);
479 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
480 host_show_commands_outstanding, NULL);
481 static DEVICE_ATTR(transport_mode, S_IRUGO,
482 host_show_transport_mode, NULL);
483 static DEVICE_ATTR(resettable, S_IRUGO,
484 host_show_resettable, NULL);
485
486 static struct device_attribute *hpsa_sdev_attrs[] = {
487 &dev_attr_raid_level,
488 &dev_attr_lunid,
489 &dev_attr_unique_id,
490 NULL,
491 };
492
493 static struct device_attribute *hpsa_shost_attrs[] = {
494 &dev_attr_rescan,
495 &dev_attr_firmware_revision,
496 &dev_attr_commands_outstanding,
497 &dev_attr_transport_mode,
498 &dev_attr_resettable,
499 NULL,
500 };
501
502 static struct scsi_host_template hpsa_driver_template = {
503 .module = THIS_MODULE,
504 .name = HPSA,
505 .proc_name = HPSA,
506 .queuecommand = hpsa_scsi_queue_command,
507 .scan_start = hpsa_scan_start,
508 .scan_finished = hpsa_scan_finished,
509 .change_queue_depth = hpsa_change_queue_depth,
510 .this_id = -1,
511 .use_clustering = ENABLE_CLUSTERING,
512 .eh_abort_handler = hpsa_eh_abort_handler,
513 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
514 .ioctl = hpsa_ioctl,
515 .slave_alloc = hpsa_slave_alloc,
516 .slave_destroy = hpsa_slave_destroy,
517 #ifdef CONFIG_COMPAT
518 .compat_ioctl = hpsa_compat_ioctl,
519 #endif
520 .sdev_attrs = hpsa_sdev_attrs,
521 .shost_attrs = hpsa_shost_attrs,
522 .max_sectors = 8192,
523 };
524
525
526 /* Enqueuing and dequeuing functions for cmdlists. */
527 static inline void addQ(struct list_head *list, struct CommandList *c)
528 {
529 list_add_tail(&c->list, list);
530 }
531
532 static inline u32 next_command(struct ctlr_info *h, u8 q)
533 {
534 u32 a;
535 struct reply_pool *rq = &h->reply_queue[q];
536 unsigned long flags;
537
538 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
539 return h->access.command_completed(h, q);
540
541 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
542 a = rq->head[rq->current_entry];
543 rq->current_entry++;
544 spin_lock_irqsave(&h->lock, flags);
545 h->commands_outstanding--;
546 spin_unlock_irqrestore(&h->lock, flags);
547 } else {
548 a = FIFO_EMPTY;
549 }
550 /* Check for wraparound */
551 if (rq->current_entry == h->max_commands) {
552 rq->current_entry = 0;
553 rq->wraparound ^= 1;
554 }
555 return a;
556 }
557
558 /* set_performant_mode: Modify the tag for cciss performant
559 * set bit 0 for pull model, bits 3-1 for block fetch
560 * register number
561 */
562 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
563 {
564 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
565 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
566 if (likely(h->msix_vector))
567 c->Header.ReplyQueue =
568 smp_processor_id() % h->nreply_queues;
569 }
570 }
571
572 static int is_firmware_flash_cmd(u8 *cdb)
573 {
574 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
575 }
576
577 /*
578 * During firmware flash, the heartbeat register may not update as frequently
579 * as it should. So we dial down lockup detection during firmware flash. and
580 * dial it back up when firmware flash completes.
581 */
582 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
583 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
584 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
585 struct CommandList *c)
586 {
587 if (!is_firmware_flash_cmd(c->Request.CDB))
588 return;
589 atomic_inc(&h->firmware_flash_in_progress);
590 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
591 }
592
593 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
594 struct CommandList *c)
595 {
596 if (is_firmware_flash_cmd(c->Request.CDB) &&
597 atomic_dec_and_test(&h->firmware_flash_in_progress))
598 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
599 }
600
601 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
602 struct CommandList *c)
603 {
604 unsigned long flags;
605
606 set_performant_mode(h, c);
607 dial_down_lockup_detection_during_fw_flash(h, c);
608 spin_lock_irqsave(&h->lock, flags);
609 addQ(&h->reqQ, c);
610 h->Qdepth++;
611 spin_unlock_irqrestore(&h->lock, flags);
612 start_io(h);
613 }
614
615 static inline void removeQ(struct CommandList *c)
616 {
617 if (WARN_ON(list_empty(&c->list)))
618 return;
619 list_del_init(&c->list);
620 }
621
622 static inline int is_hba_lunid(unsigned char scsi3addr[])
623 {
624 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
625 }
626
627 static inline int is_scsi_rev_5(struct ctlr_info *h)
628 {
629 if (!h->hba_inquiry_data)
630 return 0;
631 if ((h->hba_inquiry_data[2] & 0x07) == 5)
632 return 1;
633 return 0;
634 }
635
636 static int hpsa_find_target_lun(struct ctlr_info *h,
637 unsigned char scsi3addr[], int bus, int *target, int *lun)
638 {
639 /* finds an unused bus, target, lun for a new physical device
640 * assumes h->devlock is held
641 */
642 int i, found = 0;
643 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
644
645 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
646
647 for (i = 0; i < h->ndevices; i++) {
648 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
649 __set_bit(h->dev[i]->target, lun_taken);
650 }
651
652 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
653 if (i < HPSA_MAX_DEVICES) {
654 /* *bus = 1; */
655 *target = i;
656 *lun = 0;
657 found = 1;
658 }
659 return !found;
660 }
661
662 /* Add an entry into h->dev[] array. */
663 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
664 struct hpsa_scsi_dev_t *device,
665 struct hpsa_scsi_dev_t *added[], int *nadded)
666 {
667 /* assumes h->devlock is held */
668 int n = h->ndevices;
669 int i;
670 unsigned char addr1[8], addr2[8];
671 struct hpsa_scsi_dev_t *sd;
672
673 if (n >= HPSA_MAX_DEVICES) {
674 dev_err(&h->pdev->dev, "too many devices, some will be "
675 "inaccessible.\n");
676 return -1;
677 }
678
679 /* physical devices do not have lun or target assigned until now. */
680 if (device->lun != -1)
681 /* Logical device, lun is already assigned. */
682 goto lun_assigned;
683
684 /* If this device a non-zero lun of a multi-lun device
685 * byte 4 of the 8-byte LUN addr will contain the logical
686 * unit no, zero otherise.
687 */
688 if (device->scsi3addr[4] == 0) {
689 /* This is not a non-zero lun of a multi-lun device */
690 if (hpsa_find_target_lun(h, device->scsi3addr,
691 device->bus, &device->target, &device->lun) != 0)
692 return -1;
693 goto lun_assigned;
694 }
695
696 /* This is a non-zero lun of a multi-lun device.
697 * Search through our list and find the device which
698 * has the same 8 byte LUN address, excepting byte 4.
699 * Assign the same bus and target for this new LUN.
700 * Use the logical unit number from the firmware.
701 */
702 memcpy(addr1, device->scsi3addr, 8);
703 addr1[4] = 0;
704 for (i = 0; i < n; i++) {
705 sd = h->dev[i];
706 memcpy(addr2, sd->scsi3addr, 8);
707 addr2[4] = 0;
708 /* differ only in byte 4? */
709 if (memcmp(addr1, addr2, 8) == 0) {
710 device->bus = sd->bus;
711 device->target = sd->target;
712 device->lun = device->scsi3addr[4];
713 break;
714 }
715 }
716 if (device->lun == -1) {
717 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
718 " suspect firmware bug or unsupported hardware "
719 "configuration.\n");
720 return -1;
721 }
722
723 lun_assigned:
724
725 h->dev[n] = device;
726 h->ndevices++;
727 added[*nadded] = device;
728 (*nadded)++;
729
730 /* initially, (before registering with scsi layer) we don't
731 * know our hostno and we don't want to print anything first
732 * time anyway (the scsi layer's inquiries will show that info)
733 */
734 /* if (hostno != -1) */
735 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
736 scsi_device_type(device->devtype), hostno,
737 device->bus, device->target, device->lun);
738 return 0;
739 }
740
741 /* Update an entry in h->dev[] array. */
742 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
743 int entry, struct hpsa_scsi_dev_t *new_entry)
744 {
745 /* assumes h->devlock is held */
746 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
747
748 /* Raid level changed. */
749 h->dev[entry]->raid_level = new_entry->raid_level;
750 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
751 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
752 new_entry->target, new_entry->lun);
753 }
754
755 /* Replace an entry from h->dev[] array. */
756 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
757 int entry, struct hpsa_scsi_dev_t *new_entry,
758 struct hpsa_scsi_dev_t *added[], int *nadded,
759 struct hpsa_scsi_dev_t *removed[], int *nremoved)
760 {
761 /* assumes h->devlock is held */
762 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
763 removed[*nremoved] = h->dev[entry];
764 (*nremoved)++;
765
766 /*
767 * New physical devices won't have target/lun assigned yet
768 * so we need to preserve the values in the slot we are replacing.
769 */
770 if (new_entry->target == -1) {
771 new_entry->target = h->dev[entry]->target;
772 new_entry->lun = h->dev[entry]->lun;
773 }
774
775 h->dev[entry] = new_entry;
776 added[*nadded] = new_entry;
777 (*nadded)++;
778 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
779 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
780 new_entry->target, new_entry->lun);
781 }
782
783 /* Remove an entry from h->dev[] array. */
784 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
785 struct hpsa_scsi_dev_t *removed[], int *nremoved)
786 {
787 /* assumes h->devlock is held */
788 int i;
789 struct hpsa_scsi_dev_t *sd;
790
791 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
792
793 sd = h->dev[entry];
794 removed[*nremoved] = h->dev[entry];
795 (*nremoved)++;
796
797 for (i = entry; i < h->ndevices-1; i++)
798 h->dev[i] = h->dev[i+1];
799 h->ndevices--;
800 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
801 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
802 sd->lun);
803 }
804
805 #define SCSI3ADDR_EQ(a, b) ( \
806 (a)[7] == (b)[7] && \
807 (a)[6] == (b)[6] && \
808 (a)[5] == (b)[5] && \
809 (a)[4] == (b)[4] && \
810 (a)[3] == (b)[3] && \
811 (a)[2] == (b)[2] && \
812 (a)[1] == (b)[1] && \
813 (a)[0] == (b)[0])
814
815 static void fixup_botched_add(struct ctlr_info *h,
816 struct hpsa_scsi_dev_t *added)
817 {
818 /* called when scsi_add_device fails in order to re-adjust
819 * h->dev[] to match the mid layer's view.
820 */
821 unsigned long flags;
822 int i, j;
823
824 spin_lock_irqsave(&h->lock, flags);
825 for (i = 0; i < h->ndevices; i++) {
826 if (h->dev[i] == added) {
827 for (j = i; j < h->ndevices-1; j++)
828 h->dev[j] = h->dev[j+1];
829 h->ndevices--;
830 break;
831 }
832 }
833 spin_unlock_irqrestore(&h->lock, flags);
834 kfree(added);
835 }
836
837 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
838 struct hpsa_scsi_dev_t *dev2)
839 {
840 /* we compare everything except lun and target as these
841 * are not yet assigned. Compare parts likely
842 * to differ first
843 */
844 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
845 sizeof(dev1->scsi3addr)) != 0)
846 return 0;
847 if (memcmp(dev1->device_id, dev2->device_id,
848 sizeof(dev1->device_id)) != 0)
849 return 0;
850 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
851 return 0;
852 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
853 return 0;
854 if (dev1->devtype != dev2->devtype)
855 return 0;
856 if (dev1->bus != dev2->bus)
857 return 0;
858 return 1;
859 }
860
861 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
862 struct hpsa_scsi_dev_t *dev2)
863 {
864 /* Device attributes that can change, but don't mean
865 * that the device is a different device, nor that the OS
866 * needs to be told anything about the change.
867 */
868 if (dev1->raid_level != dev2->raid_level)
869 return 1;
870 return 0;
871 }
872
873 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
874 * and return needle location in *index. If scsi3addr matches, but not
875 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
876 * location in *index.
877 * In the case of a minor device attribute change, such as RAID level, just
878 * return DEVICE_UPDATED, along with the updated device's location in index.
879 * If needle not found, return DEVICE_NOT_FOUND.
880 */
881 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
882 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
883 int *index)
884 {
885 int i;
886 #define DEVICE_NOT_FOUND 0
887 #define DEVICE_CHANGED 1
888 #define DEVICE_SAME 2
889 #define DEVICE_UPDATED 3
890 for (i = 0; i < haystack_size; i++) {
891 if (haystack[i] == NULL) /* previously removed. */
892 continue;
893 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
894 *index = i;
895 if (device_is_the_same(needle, haystack[i])) {
896 if (device_updated(needle, haystack[i]))
897 return DEVICE_UPDATED;
898 return DEVICE_SAME;
899 } else {
900 return DEVICE_CHANGED;
901 }
902 }
903 }
904 *index = -1;
905 return DEVICE_NOT_FOUND;
906 }
907
908 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
909 struct hpsa_scsi_dev_t *sd[], int nsds)
910 {
911 /* sd contains scsi3 addresses and devtypes, and inquiry
912 * data. This function takes what's in sd to be the current
913 * reality and updates h->dev[] to reflect that reality.
914 */
915 int i, entry, device_change, changes = 0;
916 struct hpsa_scsi_dev_t *csd;
917 unsigned long flags;
918 struct hpsa_scsi_dev_t **added, **removed;
919 int nadded, nremoved;
920 struct Scsi_Host *sh = NULL;
921
922 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
923 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
924
925 if (!added || !removed) {
926 dev_warn(&h->pdev->dev, "out of memory in "
927 "adjust_hpsa_scsi_table\n");
928 goto free_and_out;
929 }
930
931 spin_lock_irqsave(&h->devlock, flags);
932
933 /* find any devices in h->dev[] that are not in
934 * sd[] and remove them from h->dev[], and for any
935 * devices which have changed, remove the old device
936 * info and add the new device info.
937 * If minor device attributes change, just update
938 * the existing device structure.
939 */
940 i = 0;
941 nremoved = 0;
942 nadded = 0;
943 while (i < h->ndevices) {
944 csd = h->dev[i];
945 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
946 if (device_change == DEVICE_NOT_FOUND) {
947 changes++;
948 hpsa_scsi_remove_entry(h, hostno, i,
949 removed, &nremoved);
950 continue; /* remove ^^^, hence i not incremented */
951 } else if (device_change == DEVICE_CHANGED) {
952 changes++;
953 hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
954 added, &nadded, removed, &nremoved);
955 /* Set it to NULL to prevent it from being freed
956 * at the bottom of hpsa_update_scsi_devices()
957 */
958 sd[entry] = NULL;
959 } else if (device_change == DEVICE_UPDATED) {
960 hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
961 }
962 i++;
963 }
964
965 /* Now, make sure every device listed in sd[] is also
966 * listed in h->dev[], adding them if they aren't found
967 */
968
969 for (i = 0; i < nsds; i++) {
970 if (!sd[i]) /* if already added above. */
971 continue;
972 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
973 h->ndevices, &entry);
974 if (device_change == DEVICE_NOT_FOUND) {
975 changes++;
976 if (hpsa_scsi_add_entry(h, hostno, sd[i],
977 added, &nadded) != 0)
978 break;
979 sd[i] = NULL; /* prevent from being freed later. */
980 } else if (device_change == DEVICE_CHANGED) {
981 /* should never happen... */
982 changes++;
983 dev_warn(&h->pdev->dev,
984 "device unexpectedly changed.\n");
985 /* but if it does happen, we just ignore that device */
986 }
987 }
988 spin_unlock_irqrestore(&h->devlock, flags);
989
990 /* Don't notify scsi mid layer of any changes the first time through
991 * (or if there are no changes) scsi_scan_host will do it later the
992 * first time through.
993 */
994 if (hostno == -1 || !changes)
995 goto free_and_out;
996
997 sh = h->scsi_host;
998 /* Notify scsi mid layer of any removed devices */
999 for (i = 0; i < nremoved; i++) {
1000 struct scsi_device *sdev =
1001 scsi_device_lookup(sh, removed[i]->bus,
1002 removed[i]->target, removed[i]->lun);
1003 if (sdev != NULL) {
1004 scsi_remove_device(sdev);
1005 scsi_device_put(sdev);
1006 } else {
1007 /* We don't expect to get here.
1008 * future cmds to this device will get selection
1009 * timeout as if the device was gone.
1010 */
1011 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1012 " for removal.", hostno, removed[i]->bus,
1013 removed[i]->target, removed[i]->lun);
1014 }
1015 kfree(removed[i]);
1016 removed[i] = NULL;
1017 }
1018
1019 /* Notify scsi mid layer of any added devices */
1020 for (i = 0; i < nadded; i++) {
1021 if (scsi_add_device(sh, added[i]->bus,
1022 added[i]->target, added[i]->lun) == 0)
1023 continue;
1024 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1025 "device not added.\n", hostno, added[i]->bus,
1026 added[i]->target, added[i]->lun);
1027 /* now we have to remove it from h->dev,
1028 * since it didn't get added to scsi mid layer
1029 */
1030 fixup_botched_add(h, added[i]);
1031 }
1032
1033 free_and_out:
1034 kfree(added);
1035 kfree(removed);
1036 }
1037
1038 /*
1039 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
1040 * Assume's h->devlock is held.
1041 */
1042 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1043 int bus, int target, int lun)
1044 {
1045 int i;
1046 struct hpsa_scsi_dev_t *sd;
1047
1048 for (i = 0; i < h->ndevices; i++) {
1049 sd = h->dev[i];
1050 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1051 return sd;
1052 }
1053 return NULL;
1054 }
1055
1056 /* link sdev->hostdata to our per-device structure. */
1057 static int hpsa_slave_alloc(struct scsi_device *sdev)
1058 {
1059 struct hpsa_scsi_dev_t *sd;
1060 unsigned long flags;
1061 struct ctlr_info *h;
1062
1063 h = sdev_to_hba(sdev);
1064 spin_lock_irqsave(&h->devlock, flags);
1065 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1066 sdev_id(sdev), sdev->lun);
1067 if (sd != NULL)
1068 sdev->hostdata = sd;
1069 spin_unlock_irqrestore(&h->devlock, flags);
1070 return 0;
1071 }
1072
1073 static void hpsa_slave_destroy(struct scsi_device *sdev)
1074 {
1075 /* nothing to do. */
1076 }
1077
1078 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1079 {
1080 int i;
1081
1082 if (!h->cmd_sg_list)
1083 return;
1084 for (i = 0; i < h->nr_cmds; i++) {
1085 kfree(h->cmd_sg_list[i]);
1086 h->cmd_sg_list[i] = NULL;
1087 }
1088 kfree(h->cmd_sg_list);
1089 h->cmd_sg_list = NULL;
1090 }
1091
1092 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1093 {
1094 int i;
1095
1096 if (h->chainsize <= 0)
1097 return 0;
1098
1099 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1100 GFP_KERNEL);
1101 if (!h->cmd_sg_list)
1102 return -ENOMEM;
1103 for (i = 0; i < h->nr_cmds; i++) {
1104 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1105 h->chainsize, GFP_KERNEL);
1106 if (!h->cmd_sg_list[i])
1107 goto clean;
1108 }
1109 return 0;
1110
1111 clean:
1112 hpsa_free_sg_chain_blocks(h);
1113 return -ENOMEM;
1114 }
1115
1116 static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1117 struct CommandList *c)
1118 {
1119 struct SGDescriptor *chain_sg, *chain_block;
1120 u64 temp64;
1121
1122 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1123 chain_block = h->cmd_sg_list[c->cmdindex];
1124 chain_sg->Ext = HPSA_SG_CHAIN;
1125 chain_sg->Len = sizeof(*chain_sg) *
1126 (c->Header.SGTotal - h->max_cmd_sg_entries);
1127 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1128 PCI_DMA_TODEVICE);
1129 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1130 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1131 }
1132
1133 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1134 struct CommandList *c)
1135 {
1136 struct SGDescriptor *chain_sg;
1137 union u64bit temp64;
1138
1139 if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1140 return;
1141
1142 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1143 temp64.val32.lower = chain_sg->Addr.lower;
1144 temp64.val32.upper = chain_sg->Addr.upper;
1145 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1146 }
1147
1148 static void complete_scsi_command(struct CommandList *cp)
1149 {
1150 struct scsi_cmnd *cmd;
1151 struct ctlr_info *h;
1152 struct ErrorInfo *ei;
1153
1154 unsigned char sense_key;
1155 unsigned char asc; /* additional sense code */
1156 unsigned char ascq; /* additional sense code qualifier */
1157 unsigned long sense_data_size;
1158
1159 ei = cp->err_info;
1160 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1161 h = cp->h;
1162
1163 scsi_dma_unmap(cmd); /* undo the DMA mappings */
1164 if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1165 hpsa_unmap_sg_chain_block(h, cp);
1166
1167 cmd->result = (DID_OK << 16); /* host byte */
1168 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1169 cmd->result |= ei->ScsiStatus;
1170
1171 /* copy the sense data whether we need to or not. */
1172 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1173 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1174 else
1175 sense_data_size = sizeof(ei->SenseInfo);
1176 if (ei->SenseLen < sense_data_size)
1177 sense_data_size = ei->SenseLen;
1178
1179 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1180 scsi_set_resid(cmd, ei->ResidualCnt);
1181
1182 if (ei->CommandStatus == 0) {
1183 cmd->scsi_done(cmd);
1184 cmd_free(h, cp);
1185 return;
1186 }
1187
1188 /* an error has occurred */
1189 switch (ei->CommandStatus) {
1190
1191 case CMD_TARGET_STATUS:
1192 if (ei->ScsiStatus) {
1193 /* Get sense key */
1194 sense_key = 0xf & ei->SenseInfo[2];
1195 /* Get additional sense code */
1196 asc = ei->SenseInfo[12];
1197 /* Get addition sense code qualifier */
1198 ascq = ei->SenseInfo[13];
1199 }
1200
1201 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1202 if (check_for_unit_attention(h, cp)) {
1203 cmd->result = DID_SOFT_ERROR << 16;
1204 break;
1205 }
1206 if (sense_key == ILLEGAL_REQUEST) {
1207 /*
1208 * SCSI REPORT_LUNS is commonly unsupported on
1209 * Smart Array. Suppress noisy complaint.
1210 */
1211 if (cp->Request.CDB[0] == REPORT_LUNS)
1212 break;
1213
1214 /* If ASC/ASCQ indicate Logical Unit
1215 * Not Supported condition,
1216 */
1217 if ((asc == 0x25) && (ascq == 0x0)) {
1218 dev_warn(&h->pdev->dev, "cp %p "
1219 "has check condition\n", cp);
1220 break;
1221 }
1222 }
1223
1224 if (sense_key == NOT_READY) {
1225 /* If Sense is Not Ready, Logical Unit
1226 * Not ready, Manual Intervention
1227 * required
1228 */
1229 if ((asc == 0x04) && (ascq == 0x03)) {
1230 dev_warn(&h->pdev->dev, "cp %p "
1231 "has check condition: unit "
1232 "not ready, manual "
1233 "intervention required\n", cp);
1234 break;
1235 }
1236 }
1237 if (sense_key == ABORTED_COMMAND) {
1238 /* Aborted command is retryable */
1239 dev_warn(&h->pdev->dev, "cp %p "
1240 "has check condition: aborted command: "
1241 "ASC: 0x%x, ASCQ: 0x%x\n",
1242 cp, asc, ascq);
1243 cmd->result = DID_SOFT_ERROR << 16;
1244 break;
1245 }
1246 /* Must be some other type of check condition */
1247 dev_dbg(&h->pdev->dev, "cp %p has check condition: "
1248 "unknown type: "
1249 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1250 "Returning result: 0x%x, "
1251 "cmd=[%02x %02x %02x %02x %02x "
1252 "%02x %02x %02x %02x %02x %02x "
1253 "%02x %02x %02x %02x %02x]\n",
1254 cp, sense_key, asc, ascq,
1255 cmd->result,
1256 cmd->cmnd[0], cmd->cmnd[1],
1257 cmd->cmnd[2], cmd->cmnd[3],
1258 cmd->cmnd[4], cmd->cmnd[5],
1259 cmd->cmnd[6], cmd->cmnd[7],
1260 cmd->cmnd[8], cmd->cmnd[9],
1261 cmd->cmnd[10], cmd->cmnd[11],
1262 cmd->cmnd[12], cmd->cmnd[13],
1263 cmd->cmnd[14], cmd->cmnd[15]);
1264 break;
1265 }
1266
1267
1268 /* Problem was not a check condition
1269 * Pass it up to the upper layers...
1270 */
1271 if (ei->ScsiStatus) {
1272 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1273 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1274 "Returning result: 0x%x\n",
1275 cp, ei->ScsiStatus,
1276 sense_key, asc, ascq,
1277 cmd->result);
1278 } else { /* scsi status is zero??? How??? */
1279 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1280 "Returning no connection.\n", cp),
1281
1282 /* Ordinarily, this case should never happen,
1283 * but there is a bug in some released firmware
1284 * revisions that allows it to happen if, for
1285 * example, a 4100 backplane loses power and
1286 * the tape drive is in it. We assume that
1287 * it's a fatal error of some kind because we
1288 * can't show that it wasn't. We will make it
1289 * look like selection timeout since that is
1290 * the most common reason for this to occur,
1291 * and it's severe enough.
1292 */
1293
1294 cmd->result = DID_NO_CONNECT << 16;
1295 }
1296 break;
1297
1298 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1299 break;
1300 case CMD_DATA_OVERRUN:
1301 dev_warn(&h->pdev->dev, "cp %p has"
1302 " completed with data overrun "
1303 "reported\n", cp);
1304 break;
1305 case CMD_INVALID: {
1306 /* print_bytes(cp, sizeof(*cp), 1, 0);
1307 print_cmd(cp); */
1308 /* We get CMD_INVALID if you address a non-existent device
1309 * instead of a selection timeout (no response). You will
1310 * see this if you yank out a drive, then try to access it.
1311 * This is kind of a shame because it means that any other
1312 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1313 * missing target. */
1314 cmd->result = DID_NO_CONNECT << 16;
1315 }
1316 break;
1317 case CMD_PROTOCOL_ERR:
1318 cmd->result = DID_ERROR << 16;
1319 dev_warn(&h->pdev->dev, "cp %p has "
1320 "protocol error\n", cp);
1321 break;
1322 case CMD_HARDWARE_ERR:
1323 cmd->result = DID_ERROR << 16;
1324 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1325 break;
1326 case CMD_CONNECTION_LOST:
1327 cmd->result = DID_ERROR << 16;
1328 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1329 break;
1330 case CMD_ABORTED:
1331 cmd->result = DID_ABORT << 16;
1332 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1333 cp, ei->ScsiStatus);
1334 break;
1335 case CMD_ABORT_FAILED:
1336 cmd->result = DID_ERROR << 16;
1337 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1338 break;
1339 case CMD_UNSOLICITED_ABORT:
1340 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1341 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1342 "abort\n", cp);
1343 break;
1344 case CMD_TIMEOUT:
1345 cmd->result = DID_TIME_OUT << 16;
1346 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1347 break;
1348 case CMD_UNABORTABLE:
1349 cmd->result = DID_ERROR << 16;
1350 dev_warn(&h->pdev->dev, "Command unabortable\n");
1351 break;
1352 default:
1353 cmd->result = DID_ERROR << 16;
1354 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1355 cp, ei->CommandStatus);
1356 }
1357 cmd->scsi_done(cmd);
1358 cmd_free(h, cp);
1359 }
1360
1361 static void hpsa_pci_unmap(struct pci_dev *pdev,
1362 struct CommandList *c, int sg_used, int data_direction)
1363 {
1364 int i;
1365 union u64bit addr64;
1366
1367 for (i = 0; i < sg_used; i++) {
1368 addr64.val32.lower = c->SG[i].Addr.lower;
1369 addr64.val32.upper = c->SG[i].Addr.upper;
1370 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1371 data_direction);
1372 }
1373 }
1374
1375 static void hpsa_map_one(struct pci_dev *pdev,
1376 struct CommandList *cp,
1377 unsigned char *buf,
1378 size_t buflen,
1379 int data_direction)
1380 {
1381 u64 addr64;
1382
1383 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1384 cp->Header.SGList = 0;
1385 cp->Header.SGTotal = 0;
1386 return;
1387 }
1388
1389 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1390 cp->SG[0].Addr.lower =
1391 (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1392 cp->SG[0].Addr.upper =
1393 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1394 cp->SG[0].Len = buflen;
1395 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
1396 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1397 }
1398
1399 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1400 struct CommandList *c)
1401 {
1402 DECLARE_COMPLETION_ONSTACK(wait);
1403
1404 c->waiting = &wait;
1405 enqueue_cmd_and_start_io(h, c);
1406 wait_for_completion(&wait);
1407 }
1408
1409 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1410 struct CommandList *c)
1411 {
1412 unsigned long flags;
1413
1414 /* If controller lockup detected, fake a hardware error. */
1415 spin_lock_irqsave(&h->lock, flags);
1416 if (unlikely(h->lockup_detected)) {
1417 spin_unlock_irqrestore(&h->lock, flags);
1418 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1419 } else {
1420 spin_unlock_irqrestore(&h->lock, flags);
1421 hpsa_scsi_do_simple_cmd_core(h, c);
1422 }
1423 }
1424
1425 #define MAX_DRIVER_CMD_RETRIES 25
1426 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1427 struct CommandList *c, int data_direction)
1428 {
1429 int backoff_time = 10, retry_count = 0;
1430
1431 do {
1432 memset(c->err_info, 0, sizeof(*c->err_info));
1433 hpsa_scsi_do_simple_cmd_core(h, c);
1434 retry_count++;
1435 if (retry_count > 3) {
1436 msleep(backoff_time);
1437 if (backoff_time < 1000)
1438 backoff_time *= 2;
1439 }
1440 } while ((check_for_unit_attention(h, c) ||
1441 check_for_busy(h, c)) &&
1442 retry_count <= MAX_DRIVER_CMD_RETRIES);
1443 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1444 }
1445
1446 static void hpsa_scsi_interpret_error(struct CommandList *cp)
1447 {
1448 struct ErrorInfo *ei;
1449 struct device *d = &cp->h->pdev->dev;
1450
1451 ei = cp->err_info;
1452 switch (ei->CommandStatus) {
1453 case CMD_TARGET_STATUS:
1454 dev_warn(d, "cmd %p has completed with errors\n", cp);
1455 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1456 ei->ScsiStatus);
1457 if (ei->ScsiStatus == 0)
1458 dev_warn(d, "SCSI status is abnormally zero. "
1459 "(probably indicates selection timeout "
1460 "reported incorrectly due to a known "
1461 "firmware bug, circa July, 2001.)\n");
1462 break;
1463 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1464 dev_info(d, "UNDERRUN\n");
1465 break;
1466 case CMD_DATA_OVERRUN:
1467 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1468 break;
1469 case CMD_INVALID: {
1470 /* controller unfortunately reports SCSI passthru's
1471 * to non-existent targets as invalid commands.
1472 */
1473 dev_warn(d, "cp %p is reported invalid (probably means "
1474 "target device no longer present)\n", cp);
1475 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1476 print_cmd(cp); */
1477 }
1478 break;
1479 case CMD_PROTOCOL_ERR:
1480 dev_warn(d, "cp %p has protocol error \n", cp);
1481 break;
1482 case CMD_HARDWARE_ERR:
1483 /* cmd->result = DID_ERROR << 16; */
1484 dev_warn(d, "cp %p had hardware error\n", cp);
1485 break;
1486 case CMD_CONNECTION_LOST:
1487 dev_warn(d, "cp %p had connection lost\n", cp);
1488 break;
1489 case CMD_ABORTED:
1490 dev_warn(d, "cp %p was aborted\n", cp);
1491 break;
1492 case CMD_ABORT_FAILED:
1493 dev_warn(d, "cp %p reports abort failed\n", cp);
1494 break;
1495 case CMD_UNSOLICITED_ABORT:
1496 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1497 break;
1498 case CMD_TIMEOUT:
1499 dev_warn(d, "cp %p timed out\n", cp);
1500 break;
1501 case CMD_UNABORTABLE:
1502 dev_warn(d, "Command unabortable\n");
1503 break;
1504 default:
1505 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1506 ei->CommandStatus);
1507 }
1508 }
1509
1510 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1511 unsigned char page, unsigned char *buf,
1512 unsigned char bufsize)
1513 {
1514 int rc = IO_OK;
1515 struct CommandList *c;
1516 struct ErrorInfo *ei;
1517
1518 c = cmd_special_alloc(h);
1519
1520 if (c == NULL) { /* trouble... */
1521 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1522 return -ENOMEM;
1523 }
1524
1525 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1526 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1527 ei = c->err_info;
1528 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1529 hpsa_scsi_interpret_error(c);
1530 rc = -1;
1531 }
1532 cmd_special_free(h, c);
1533 return rc;
1534 }
1535
1536 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1537 {
1538 int rc = IO_OK;
1539 struct CommandList *c;
1540 struct ErrorInfo *ei;
1541
1542 c = cmd_special_alloc(h);
1543
1544 if (c == NULL) { /* trouble... */
1545 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1546 return -ENOMEM;
1547 }
1548
1549 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1550 hpsa_scsi_do_simple_cmd_core(h, c);
1551 /* no unmap needed here because no data xfer. */
1552
1553 ei = c->err_info;
1554 if (ei->CommandStatus != 0) {
1555 hpsa_scsi_interpret_error(c);
1556 rc = -1;
1557 }
1558 cmd_special_free(h, c);
1559 return rc;
1560 }
1561
1562 static void hpsa_get_raid_level(struct ctlr_info *h,
1563 unsigned char *scsi3addr, unsigned char *raid_level)
1564 {
1565 int rc;
1566 unsigned char *buf;
1567
1568 *raid_level = RAID_UNKNOWN;
1569 buf = kzalloc(64, GFP_KERNEL);
1570 if (!buf)
1571 return;
1572 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1573 if (rc == 0)
1574 *raid_level = buf[8];
1575 if (*raid_level > RAID_UNKNOWN)
1576 *raid_level = RAID_UNKNOWN;
1577 kfree(buf);
1578 return;
1579 }
1580
1581 /* Get the device id from inquiry page 0x83 */
1582 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1583 unsigned char *device_id, int buflen)
1584 {
1585 int rc;
1586 unsigned char *buf;
1587
1588 if (buflen > 16)
1589 buflen = 16;
1590 buf = kzalloc(64, GFP_KERNEL);
1591 if (!buf)
1592 return -1;
1593 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1594 if (rc == 0)
1595 memcpy(device_id, &buf[8], buflen);
1596 kfree(buf);
1597 return rc != 0;
1598 }
1599
1600 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1601 struct ReportLUNdata *buf, int bufsize,
1602 int extended_response)
1603 {
1604 int rc = IO_OK;
1605 struct CommandList *c;
1606 unsigned char scsi3addr[8];
1607 struct ErrorInfo *ei;
1608
1609 c = cmd_special_alloc(h);
1610 if (c == NULL) { /* trouble... */
1611 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1612 return -1;
1613 }
1614 /* address the controller */
1615 memset(scsi3addr, 0, sizeof(scsi3addr));
1616 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1617 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1618 if (extended_response)
1619 c->Request.CDB[1] = extended_response;
1620 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1621 ei = c->err_info;
1622 if (ei->CommandStatus != 0 &&
1623 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1624 hpsa_scsi_interpret_error(c);
1625 rc = -1;
1626 }
1627 cmd_special_free(h, c);
1628 return rc;
1629 }
1630
1631 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1632 struct ReportLUNdata *buf,
1633 int bufsize, int extended_response)
1634 {
1635 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1636 }
1637
1638 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1639 struct ReportLUNdata *buf, int bufsize)
1640 {
1641 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1642 }
1643
1644 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1645 int bus, int target, int lun)
1646 {
1647 device->bus = bus;
1648 device->target = target;
1649 device->lun = lun;
1650 }
1651
1652 static int hpsa_update_device_info(struct ctlr_info *h,
1653 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1654 unsigned char *is_OBDR_device)
1655 {
1656
1657 #define OBDR_SIG_OFFSET 43
1658 #define OBDR_TAPE_SIG "$DR-10"
1659 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1660 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1661
1662 unsigned char *inq_buff;
1663 unsigned char *obdr_sig;
1664
1665 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1666 if (!inq_buff)
1667 goto bail_out;
1668
1669 /* Do an inquiry to the device to see what it is. */
1670 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1671 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1672 /* Inquiry failed (msg printed already) */
1673 dev_err(&h->pdev->dev,
1674 "hpsa_update_device_info: inquiry failed\n");
1675 goto bail_out;
1676 }
1677
1678 this_device->devtype = (inq_buff[0] & 0x1f);
1679 memcpy(this_device->scsi3addr, scsi3addr, 8);
1680 memcpy(this_device->vendor, &inq_buff[8],
1681 sizeof(this_device->vendor));
1682 memcpy(this_device->model, &inq_buff[16],
1683 sizeof(this_device->model));
1684 memset(this_device->device_id, 0,
1685 sizeof(this_device->device_id));
1686 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1687 sizeof(this_device->device_id));
1688
1689 if (this_device->devtype == TYPE_DISK &&
1690 is_logical_dev_addr_mode(scsi3addr))
1691 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1692 else
1693 this_device->raid_level = RAID_UNKNOWN;
1694
1695 if (is_OBDR_device) {
1696 /* See if this is a One-Button-Disaster-Recovery device
1697 * by looking for "$DR-10" at offset 43 in inquiry data.
1698 */
1699 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1700 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1701 strncmp(obdr_sig, OBDR_TAPE_SIG,
1702 OBDR_SIG_LEN) == 0);
1703 }
1704
1705 kfree(inq_buff);
1706 return 0;
1707
1708 bail_out:
1709 kfree(inq_buff);
1710 return 1;
1711 }
1712
1713 static unsigned char *ext_target_model[] = {
1714 "MSA2012",
1715 "MSA2024",
1716 "MSA2312",
1717 "MSA2324",
1718 "P2000 G3 SAS",
1719 NULL,
1720 };
1721
1722 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1723 {
1724 int i;
1725
1726 for (i = 0; ext_target_model[i]; i++)
1727 if (strncmp(device->model, ext_target_model[i],
1728 strlen(ext_target_model[i])) == 0)
1729 return 1;
1730 return 0;
1731 }
1732
1733 /* Helper function to assign bus, target, lun mapping of devices.
1734 * Puts non-external target logical volumes on bus 0, external target logical
1735 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1736 * Logical drive target and lun are assigned at this time, but
1737 * physical device lun and target assignment are deferred (assigned
1738 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1739 */
1740 static void figure_bus_target_lun(struct ctlr_info *h,
1741 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
1742 {
1743 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1744
1745 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1746 /* physical device, target and lun filled in later */
1747 if (is_hba_lunid(lunaddrbytes))
1748 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
1749 else
1750 /* defer target, lun assignment for physical devices */
1751 hpsa_set_bus_target_lun(device, 2, -1, -1);
1752 return;
1753 }
1754 /* It's a logical device */
1755 if (is_ext_target(h, device)) {
1756 /* external target way, put logicals on bus 1
1757 * and match target/lun numbers box
1758 * reports, other smart array, bus 0, target 0, match lunid
1759 */
1760 hpsa_set_bus_target_lun(device,
1761 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1762 return;
1763 }
1764 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
1765 }
1766
1767 /*
1768 * If there is no lun 0 on a target, linux won't find any devices.
1769 * For the external targets (arrays), we have to manually detect the enclosure
1770 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1771 * it for some reason. *tmpdevice is the target we're adding,
1772 * this_device is a pointer into the current element of currentsd[]
1773 * that we're building up in update_scsi_devices(), below.
1774 * lunzerobits is a bitmap that tracks which targets already have a
1775 * lun 0 assigned.
1776 * Returns 1 if an enclosure was added, 0 if not.
1777 */
1778 static int add_ext_target_dev(struct ctlr_info *h,
1779 struct hpsa_scsi_dev_t *tmpdevice,
1780 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1781 unsigned long lunzerobits[], int *n_ext_target_devs)
1782 {
1783 unsigned char scsi3addr[8];
1784
1785 if (test_bit(tmpdevice->target, lunzerobits))
1786 return 0; /* There is already a lun 0 on this target. */
1787
1788 if (!is_logical_dev_addr_mode(lunaddrbytes))
1789 return 0; /* It's the logical targets that may lack lun 0. */
1790
1791 if (!is_ext_target(h, tmpdevice))
1792 return 0; /* Only external target devices have this problem. */
1793
1794 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
1795 return 0;
1796
1797 memset(scsi3addr, 0, 8);
1798 scsi3addr[3] = tmpdevice->target;
1799 if (is_hba_lunid(scsi3addr))
1800 return 0; /* Don't add the RAID controller here. */
1801
1802 if (is_scsi_rev_5(h))
1803 return 0; /* p1210m doesn't need to do this. */
1804
1805 if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
1806 dev_warn(&h->pdev->dev, "Maximum number of external "
1807 "target devices exceeded. Check your hardware "
1808 "configuration.");
1809 return 0;
1810 }
1811
1812 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
1813 return 0;
1814 (*n_ext_target_devs)++;
1815 hpsa_set_bus_target_lun(this_device,
1816 tmpdevice->bus, tmpdevice->target, 0);
1817 set_bit(tmpdevice->target, lunzerobits);
1818 return 1;
1819 }
1820
1821 /*
1822 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1823 * logdev. The number of luns in physdev and logdev are returned in
1824 * *nphysicals and *nlogicals, respectively.
1825 * Returns 0 on success, -1 otherwise.
1826 */
1827 static int hpsa_gather_lun_info(struct ctlr_info *h,
1828 int reportlunsize,
1829 struct ReportLUNdata *physdev, u32 *nphysicals,
1830 struct ReportLUNdata *logdev, u32 *nlogicals)
1831 {
1832 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1833 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1834 return -1;
1835 }
1836 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1837 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1838 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1839 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1840 *nphysicals - HPSA_MAX_PHYS_LUN);
1841 *nphysicals = HPSA_MAX_PHYS_LUN;
1842 }
1843 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1844 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1845 return -1;
1846 }
1847 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1848 /* Reject Logicals in excess of our max capability. */
1849 if (*nlogicals > HPSA_MAX_LUN) {
1850 dev_warn(&h->pdev->dev,
1851 "maximum logical LUNs (%d) exceeded. "
1852 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1853 *nlogicals - HPSA_MAX_LUN);
1854 *nlogicals = HPSA_MAX_LUN;
1855 }
1856 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1857 dev_warn(&h->pdev->dev,
1858 "maximum logical + physical LUNs (%d) exceeded. "
1859 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1860 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1861 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1862 }
1863 return 0;
1864 }
1865
1866 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1867 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1868 struct ReportLUNdata *logdev_list)
1869 {
1870 /* Helper function, figure out where the LUN ID info is coming from
1871 * given index i, lists of physical and logical devices, where in
1872 * the list the raid controller is supposed to appear (first or last)
1873 */
1874
1875 int logicals_start = nphysicals + (raid_ctlr_position == 0);
1876 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1877
1878 if (i == raid_ctlr_position)
1879 return RAID_CTLR_LUNID;
1880
1881 if (i < logicals_start)
1882 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1883
1884 if (i < last_device)
1885 return &logdev_list->LUN[i - nphysicals -
1886 (raid_ctlr_position == 0)][0];
1887 BUG();
1888 return NULL;
1889 }
1890
1891 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1892 {
1893 /* the idea here is we could get notified
1894 * that some devices have changed, so we do a report
1895 * physical luns and report logical luns cmd, and adjust
1896 * our list of devices accordingly.
1897 *
1898 * The scsi3addr's of devices won't change so long as the
1899 * adapter is not reset. That means we can rescan and
1900 * tell which devices we already know about, vs. new
1901 * devices, vs. disappearing devices.
1902 */
1903 struct ReportLUNdata *physdev_list = NULL;
1904 struct ReportLUNdata *logdev_list = NULL;
1905 u32 nphysicals = 0;
1906 u32 nlogicals = 0;
1907 u32 ndev_allocated = 0;
1908 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1909 int ncurrent = 0;
1910 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1911 int i, n_ext_target_devs, ndevs_to_allocate;
1912 int raid_ctlr_position;
1913 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
1914
1915 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
1916 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1917 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1918 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1919
1920 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
1921 dev_err(&h->pdev->dev, "out of memory\n");
1922 goto out;
1923 }
1924 memset(lunzerobits, 0, sizeof(lunzerobits));
1925
1926 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1927 logdev_list, &nlogicals))
1928 goto out;
1929
1930 /* We might see up to the maximum number of logical and physical disks
1931 * plus external target devices, and a device for the local RAID
1932 * controller.
1933 */
1934 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
1935
1936 /* Allocate the per device structures */
1937 for (i = 0; i < ndevs_to_allocate; i++) {
1938 if (i >= HPSA_MAX_DEVICES) {
1939 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1940 " %d devices ignored.\n", HPSA_MAX_DEVICES,
1941 ndevs_to_allocate - HPSA_MAX_DEVICES);
1942 break;
1943 }
1944
1945 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1946 if (!currentsd[i]) {
1947 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1948 __FILE__, __LINE__);
1949 goto out;
1950 }
1951 ndev_allocated++;
1952 }
1953
1954 if (unlikely(is_scsi_rev_5(h)))
1955 raid_ctlr_position = 0;
1956 else
1957 raid_ctlr_position = nphysicals + nlogicals;
1958
1959 /* adjust our table of devices */
1960 n_ext_target_devs = 0;
1961 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1962 u8 *lunaddrbytes, is_OBDR = 0;
1963
1964 /* Figure out where the LUN ID info is coming from */
1965 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1966 i, nphysicals, nlogicals, physdev_list, logdev_list);
1967 /* skip masked physical devices. */
1968 if (lunaddrbytes[3] & 0xC0 &&
1969 i < nphysicals + (raid_ctlr_position == 0))
1970 continue;
1971
1972 /* Get device type, vendor, model, device id */
1973 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1974 &is_OBDR))
1975 continue; /* skip it if we can't talk to it. */
1976 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
1977 this_device = currentsd[ncurrent];
1978
1979 /*
1980 * For external target devices, we have to insert a LUN 0 which
1981 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1982 * is nonetheless an enclosure device there. We have to
1983 * present that otherwise linux won't find anything if
1984 * there is no lun 0.
1985 */
1986 if (add_ext_target_dev(h, tmpdevice, this_device,
1987 lunaddrbytes, lunzerobits,
1988 &n_ext_target_devs)) {
1989 ncurrent++;
1990 this_device = currentsd[ncurrent];
1991 }
1992
1993 *this_device = *tmpdevice;
1994
1995 switch (this_device->devtype) {
1996 case TYPE_ROM:
1997 /* We don't *really* support actual CD-ROM devices,
1998 * just "One Button Disaster Recovery" tape drive
1999 * which temporarily pretends to be a CD-ROM drive.
2000 * So we check that the device is really an OBDR tape
2001 * device by checking for "$DR-10" in bytes 43-48 of
2002 * the inquiry data.
2003 */
2004 if (is_OBDR)
2005 ncurrent++;
2006 break;
2007 case TYPE_DISK:
2008 if (i < nphysicals)
2009 break;
2010 ncurrent++;
2011 break;
2012 case TYPE_TAPE:
2013 case TYPE_MEDIUM_CHANGER:
2014 ncurrent++;
2015 break;
2016 case TYPE_RAID:
2017 /* Only present the Smartarray HBA as a RAID controller.
2018 * If it's a RAID controller other than the HBA itself
2019 * (an external RAID controller, MSA500 or similar)
2020 * don't present it.
2021 */
2022 if (!is_hba_lunid(lunaddrbytes))
2023 break;
2024 ncurrent++;
2025 break;
2026 default:
2027 break;
2028 }
2029 if (ncurrent >= HPSA_MAX_DEVICES)
2030 break;
2031 }
2032 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2033 out:
2034 kfree(tmpdevice);
2035 for (i = 0; i < ndev_allocated; i++)
2036 kfree(currentsd[i]);
2037 kfree(currentsd);
2038 kfree(physdev_list);
2039 kfree(logdev_list);
2040 }
2041
2042 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2043 * dma mapping and fills in the scatter gather entries of the
2044 * hpsa command, cp.
2045 */
2046 static int hpsa_scatter_gather(struct ctlr_info *h,
2047 struct CommandList *cp,
2048 struct scsi_cmnd *cmd)
2049 {
2050 unsigned int len;
2051 struct scatterlist *sg;
2052 u64 addr64;
2053 int use_sg, i, sg_index, chained;
2054 struct SGDescriptor *curr_sg;
2055
2056 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
2057
2058 use_sg = scsi_dma_map(cmd);
2059 if (use_sg < 0)
2060 return use_sg;
2061
2062 if (!use_sg)
2063 goto sglist_finished;
2064
2065 curr_sg = cp->SG;
2066 chained = 0;
2067 sg_index = 0;
2068 scsi_for_each_sg(cmd, sg, use_sg, i) {
2069 if (i == h->max_cmd_sg_entries - 1 &&
2070 use_sg > h->max_cmd_sg_entries) {
2071 chained = 1;
2072 curr_sg = h->cmd_sg_list[cp->cmdindex];
2073 sg_index = 0;
2074 }
2075 addr64 = (u64) sg_dma_address(sg);
2076 len = sg_dma_len(sg);
2077 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2078 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2079 curr_sg->Len = len;
2080 curr_sg->Ext = 0; /* we are not chaining */
2081 curr_sg++;
2082 }
2083
2084 if (use_sg + chained > h->maxSG)
2085 h->maxSG = use_sg + chained;
2086
2087 if (chained) {
2088 cp->Header.SGList = h->max_cmd_sg_entries;
2089 cp->Header.SGTotal = (u16) (use_sg + 1);
2090 hpsa_map_sg_chain_block(h, cp);
2091 return 0;
2092 }
2093
2094 sglist_finished:
2095
2096 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
2097 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
2098 return 0;
2099 }
2100
2101
2102 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
2103 void (*done)(struct scsi_cmnd *))
2104 {
2105 struct ctlr_info *h;
2106 struct hpsa_scsi_dev_t *dev;
2107 unsigned char scsi3addr[8];
2108 struct CommandList *c;
2109 unsigned long flags;
2110
2111 /* Get the ptr to our adapter structure out of cmd->host. */
2112 h = sdev_to_hba(cmd->device);
2113 dev = cmd->device->hostdata;
2114 if (!dev) {
2115 cmd->result = DID_NO_CONNECT << 16;
2116 done(cmd);
2117 return 0;
2118 }
2119 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2120
2121 spin_lock_irqsave(&h->lock, flags);
2122 if (unlikely(h->lockup_detected)) {
2123 spin_unlock_irqrestore(&h->lock, flags);
2124 cmd->result = DID_ERROR << 16;
2125 done(cmd);
2126 return 0;
2127 }
2128 spin_unlock_irqrestore(&h->lock, flags);
2129 c = cmd_alloc(h);
2130 if (c == NULL) { /* trouble... */
2131 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2132 return SCSI_MLQUEUE_HOST_BUSY;
2133 }
2134
2135 /* Fill in the command list header */
2136
2137 cmd->scsi_done = done; /* save this for use by completion code */
2138
2139 /* save c in case we have to abort it */
2140 cmd->host_scribble = (unsigned char *) c;
2141
2142 c->cmd_type = CMD_SCSI;
2143 c->scsi_cmd = cmd;
2144 c->Header.ReplyQueue = 0; /* unused in simple mode */
2145 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
2146 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2147 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
2148
2149 /* Fill in the request block... */
2150
2151 c->Request.Timeout = 0;
2152 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2153 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2154 c->Request.CDBLen = cmd->cmd_len;
2155 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2156 c->Request.Type.Type = TYPE_CMD;
2157 c->Request.Type.Attribute = ATTR_SIMPLE;
2158 switch (cmd->sc_data_direction) {
2159 case DMA_TO_DEVICE:
2160 c->Request.Type.Direction = XFER_WRITE;
2161 break;
2162 case DMA_FROM_DEVICE:
2163 c->Request.Type.Direction = XFER_READ;
2164 break;
2165 case DMA_NONE:
2166 c->Request.Type.Direction = XFER_NONE;
2167 break;
2168 case DMA_BIDIRECTIONAL:
2169 /* This can happen if a buggy application does a scsi passthru
2170 * and sets both inlen and outlen to non-zero. ( see
2171 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2172 */
2173
2174 c->Request.Type.Direction = XFER_RSVD;
2175 /* This is technically wrong, and hpsa controllers should
2176 * reject it with CMD_INVALID, which is the most correct
2177 * response, but non-fibre backends appear to let it
2178 * slide by, and give the same results as if this field
2179 * were set correctly. Either way is acceptable for
2180 * our purposes here.
2181 */
2182
2183 break;
2184
2185 default:
2186 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2187 cmd->sc_data_direction);
2188 BUG();
2189 break;
2190 }
2191
2192 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
2193 cmd_free(h, c);
2194 return SCSI_MLQUEUE_HOST_BUSY;
2195 }
2196 enqueue_cmd_and_start_io(h, c);
2197 /* the cmd'll come back via intr handler in complete_scsi_command() */
2198 return 0;
2199 }
2200
2201 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2202
2203 static void hpsa_scan_start(struct Scsi_Host *sh)
2204 {
2205 struct ctlr_info *h = shost_to_hba(sh);
2206 unsigned long flags;
2207
2208 /* wait until any scan already in progress is finished. */
2209 while (1) {
2210 spin_lock_irqsave(&h->scan_lock, flags);
2211 if (h->scan_finished)
2212 break;
2213 spin_unlock_irqrestore(&h->scan_lock, flags);
2214 wait_event(h->scan_wait_queue, h->scan_finished);
2215 /* Note: We don't need to worry about a race between this
2216 * thread and driver unload because the midlayer will
2217 * have incremented the reference count, so unload won't
2218 * happen if we're in here.
2219 */
2220 }
2221 h->scan_finished = 0; /* mark scan as in progress */
2222 spin_unlock_irqrestore(&h->scan_lock, flags);
2223
2224 hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2225
2226 spin_lock_irqsave(&h->scan_lock, flags);
2227 h->scan_finished = 1; /* mark scan as finished. */
2228 wake_up_all(&h->scan_wait_queue);
2229 spin_unlock_irqrestore(&h->scan_lock, flags);
2230 }
2231
2232 static int hpsa_scan_finished(struct Scsi_Host *sh,
2233 unsigned long elapsed_time)
2234 {
2235 struct ctlr_info *h = shost_to_hba(sh);
2236 unsigned long flags;
2237 int finished;
2238
2239 spin_lock_irqsave(&h->scan_lock, flags);
2240 finished = h->scan_finished;
2241 spin_unlock_irqrestore(&h->scan_lock, flags);
2242 return finished;
2243 }
2244
2245 static int hpsa_change_queue_depth(struct scsi_device *sdev,
2246 int qdepth, int reason)
2247 {
2248 struct ctlr_info *h = sdev_to_hba(sdev);
2249
2250 if (reason != SCSI_QDEPTH_DEFAULT)
2251 return -ENOTSUPP;
2252
2253 if (qdepth < 1)
2254 qdepth = 1;
2255 else
2256 if (qdepth > h->nr_cmds)
2257 qdepth = h->nr_cmds;
2258 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2259 return sdev->queue_depth;
2260 }
2261
2262 static void hpsa_unregister_scsi(struct ctlr_info *h)
2263 {
2264 /* we are being forcibly unloaded, and may not refuse. */
2265 scsi_remove_host(h->scsi_host);
2266 scsi_host_put(h->scsi_host);
2267 h->scsi_host = NULL;
2268 }
2269
2270 static int hpsa_register_scsi(struct ctlr_info *h)
2271 {
2272 struct Scsi_Host *sh;
2273 int error;
2274
2275 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2276 if (sh == NULL)
2277 goto fail;
2278
2279 sh->io_port = 0;
2280 sh->n_io_port = 0;
2281 sh->this_id = -1;
2282 sh->max_channel = 3;
2283 sh->max_cmd_len = MAX_COMMAND_SIZE;
2284 sh->max_lun = HPSA_MAX_LUN;
2285 sh->max_id = HPSA_MAX_LUN;
2286 sh->can_queue = h->nr_cmds;
2287 sh->cmd_per_lun = h->nr_cmds;
2288 sh->sg_tablesize = h->maxsgentries;
2289 h->scsi_host = sh;
2290 sh->hostdata[0] = (unsigned long) h;
2291 sh->irq = h->intr[h->intr_mode];
2292 sh->unique_id = sh->irq;
2293 error = scsi_add_host(sh, &h->pdev->dev);
2294 if (error)
2295 goto fail_host_put;
2296 scsi_scan_host(sh);
2297 return 0;
2298
2299 fail_host_put:
2300 dev_err(&h->pdev->dev, "%s: scsi_add_host"
2301 " failed for controller %d\n", __func__, h->ctlr);
2302 scsi_host_put(sh);
2303 return error;
2304 fail:
2305 dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2306 " failed for controller %d\n", __func__, h->ctlr);
2307 return -ENOMEM;
2308 }
2309
2310 static int wait_for_device_to_become_ready(struct ctlr_info *h,
2311 unsigned char lunaddr[])
2312 {
2313 int rc = 0;
2314 int count = 0;
2315 int waittime = 1; /* seconds */
2316 struct CommandList *c;
2317
2318 c = cmd_special_alloc(h);
2319 if (!c) {
2320 dev_warn(&h->pdev->dev, "out of memory in "
2321 "wait_for_device_to_become_ready.\n");
2322 return IO_ERROR;
2323 }
2324
2325 /* Send test unit ready until device ready, or give up. */
2326 while (count < HPSA_TUR_RETRY_LIMIT) {
2327
2328 /* Wait for a bit. do this first, because if we send
2329 * the TUR right away, the reset will just abort it.
2330 */
2331 msleep(1000 * waittime);
2332 count++;
2333
2334 /* Increase wait time with each try, up to a point. */
2335 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2336 waittime = waittime * 2;
2337
2338 /* Send the Test Unit Ready */
2339 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2340 hpsa_scsi_do_simple_cmd_core(h, c);
2341 /* no unmap needed here because no data xfer. */
2342
2343 if (c->err_info->CommandStatus == CMD_SUCCESS)
2344 break;
2345
2346 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2347 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2348 (c->err_info->SenseInfo[2] == NO_SENSE ||
2349 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2350 break;
2351
2352 dev_warn(&h->pdev->dev, "waiting %d secs "
2353 "for device to become ready.\n", waittime);
2354 rc = 1; /* device not ready. */
2355 }
2356
2357 if (rc)
2358 dev_warn(&h->pdev->dev, "giving up on device.\n");
2359 else
2360 dev_warn(&h->pdev->dev, "device is ready.\n");
2361
2362 cmd_special_free(h, c);
2363 return rc;
2364 }
2365
2366 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
2367 * complaining. Doing a host- or bus-reset can't do anything good here.
2368 */
2369 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2370 {
2371 int rc;
2372 struct ctlr_info *h;
2373 struct hpsa_scsi_dev_t *dev;
2374
2375 /* find the controller to which the command to be aborted was sent */
2376 h = sdev_to_hba(scsicmd->device);
2377 if (h == NULL) /* paranoia */
2378 return FAILED;
2379 dev = scsicmd->device->hostdata;
2380 if (!dev) {
2381 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2382 "device lookup failed.\n");
2383 return FAILED;
2384 }
2385 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2386 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2387 /* send a reset to the SCSI LUN which the command was sent to */
2388 rc = hpsa_send_reset(h, dev->scsi3addr);
2389 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2390 return SUCCESS;
2391
2392 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2393 return FAILED;
2394 }
2395
2396 static void swizzle_abort_tag(u8 *tag)
2397 {
2398 u8 original_tag[8];
2399
2400 memcpy(original_tag, tag, 8);
2401 tag[0] = original_tag[3];
2402 tag[1] = original_tag[2];
2403 tag[2] = original_tag[1];
2404 tag[3] = original_tag[0];
2405 tag[4] = original_tag[7];
2406 tag[5] = original_tag[6];
2407 tag[6] = original_tag[5];
2408 tag[7] = original_tag[4];
2409 }
2410
2411 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
2412 struct CommandList *abort, int swizzle)
2413 {
2414 int rc = IO_OK;
2415 struct CommandList *c;
2416 struct ErrorInfo *ei;
2417
2418 c = cmd_special_alloc(h);
2419 if (c == NULL) { /* trouble... */
2420 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2421 return -ENOMEM;
2422 }
2423
2424 fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
2425 if (swizzle)
2426 swizzle_abort_tag(&c->Request.CDB[4]);
2427 hpsa_scsi_do_simple_cmd_core(h, c);
2428 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2429 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2430 /* no unmap needed here because no data xfer. */
2431
2432 ei = c->err_info;
2433 switch (ei->CommandStatus) {
2434 case CMD_SUCCESS:
2435 break;
2436 case CMD_UNABORTABLE: /* Very common, don't make noise. */
2437 rc = -1;
2438 break;
2439 default:
2440 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2441 __func__, abort->Header.Tag.upper,
2442 abort->Header.Tag.lower);
2443 hpsa_scsi_interpret_error(c);
2444 rc = -1;
2445 break;
2446 }
2447 cmd_special_free(h, c);
2448 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2449 abort->Header.Tag.upper, abort->Header.Tag.lower);
2450 return rc;
2451 }
2452
2453 /*
2454 * hpsa_find_cmd_in_queue
2455 *
2456 * Used to determine whether a command (find) is still present
2457 * in queue_head. Optionally excludes the last element of queue_head.
2458 *
2459 * This is used to avoid unnecessary aborts. Commands in h->reqQ have
2460 * not yet been submitted, and so can be aborted by the driver without
2461 * sending an abort to the hardware.
2462 *
2463 * Returns pointer to command if found in queue, NULL otherwise.
2464 */
2465 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2466 struct scsi_cmnd *find, struct list_head *queue_head)
2467 {
2468 unsigned long flags;
2469 struct CommandList *c = NULL; /* ptr into cmpQ */
2470
2471 if (!find)
2472 return 0;
2473 spin_lock_irqsave(&h->lock, flags);
2474 list_for_each_entry(c, queue_head, list) {
2475 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2476 continue;
2477 if (c->scsi_cmd == find) {
2478 spin_unlock_irqrestore(&h->lock, flags);
2479 return c;
2480 }
2481 }
2482 spin_unlock_irqrestore(&h->lock, flags);
2483 return NULL;
2484 }
2485
2486 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2487 u8 *tag, struct list_head *queue_head)
2488 {
2489 unsigned long flags;
2490 struct CommandList *c;
2491
2492 spin_lock_irqsave(&h->lock, flags);
2493 list_for_each_entry(c, queue_head, list) {
2494 if (memcmp(&c->Header.Tag, tag, 8) != 0)
2495 continue;
2496 spin_unlock_irqrestore(&h->lock, flags);
2497 return c;
2498 }
2499 spin_unlock_irqrestore(&h->lock, flags);
2500 return NULL;
2501 }
2502
2503 /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
2504 * tell which kind we're dealing with, so we send the abort both ways. There
2505 * shouldn't be any collisions between swizzled and unswizzled tags due to the
2506 * way we construct our tags but we check anyway in case the assumptions which
2507 * make this true someday become false.
2508 */
2509 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2510 unsigned char *scsi3addr, struct CommandList *abort)
2511 {
2512 u8 swizzled_tag[8];
2513 struct CommandList *c;
2514 int rc = 0, rc2 = 0;
2515
2516 /* we do not expect to find the swizzled tag in our queue, but
2517 * check anyway just to be sure the assumptions which make this
2518 * the case haven't become wrong.
2519 */
2520 memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2521 swizzle_abort_tag(swizzled_tag);
2522 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2523 if (c != NULL) {
2524 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2525 return hpsa_send_abort(h, scsi3addr, abort, 0);
2526 }
2527 rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2528
2529 /* if the command is still in our queue, we can't conclude that it was
2530 * aborted (it might have just completed normally) but in any case
2531 * we don't need to try to abort it another way.
2532 */
2533 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2534 if (c)
2535 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2536 return rc && rc2;
2537 }
2538
2539 /* Send an abort for the specified command.
2540 * If the device and controller support it,
2541 * send a task abort request.
2542 */
2543 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2544 {
2545
2546 int i, rc;
2547 struct ctlr_info *h;
2548 struct hpsa_scsi_dev_t *dev;
2549 struct CommandList *abort; /* pointer to command to be aborted */
2550 struct CommandList *found;
2551 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
2552 char msg[256]; /* For debug messaging. */
2553 int ml = 0;
2554
2555 /* Find the controller of the command to be aborted */
2556 h = sdev_to_hba(sc->device);
2557 if (WARN(h == NULL,
2558 "ABORT REQUEST FAILED, Controller lookup failed.\n"))
2559 return FAILED;
2560
2561 /* Check that controller supports some kind of task abort */
2562 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2563 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2564 return FAILED;
2565
2566 memset(msg, 0, sizeof(msg));
2567 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2568 h->scsi_host->host_no, sc->device->channel,
2569 sc->device->id, sc->device->lun);
2570
2571 /* Find the device of the command to be aborted */
2572 dev = sc->device->hostdata;
2573 if (!dev) {
2574 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2575 msg);
2576 return FAILED;
2577 }
2578
2579 /* Get SCSI command to be aborted */
2580 abort = (struct CommandList *) sc->host_scribble;
2581 if (abort == NULL) {
2582 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2583 msg);
2584 return FAILED;
2585 }
2586
2587 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2588 abort->Header.Tag.upper, abort->Header.Tag.lower);
2589 as = (struct scsi_cmnd *) abort->scsi_cmd;
2590 if (as != NULL)
2591 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2592 as->cmnd[0], as->serial_number);
2593 dev_dbg(&h->pdev->dev, "%s\n", msg);
2594 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2595 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2596
2597 /* Search reqQ to See if command is queued but not submitted,
2598 * if so, complete the command with aborted status and remove
2599 * it from the reqQ.
2600 */
2601 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2602 if (found) {
2603 found->err_info->CommandStatus = CMD_ABORTED;
2604 finish_cmd(found);
2605 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2606 msg);
2607 return SUCCESS;
2608 }
2609
2610 /* not in reqQ, if also not in cmpQ, must have already completed */
2611 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2612 if (!found) {
2613 dev_dbg(&h->pdev->dev, "%s Request FAILED (not known to driver).\n",
2614 msg);
2615 return SUCCESS;
2616 }
2617
2618 /*
2619 * Command is in flight, or possibly already completed
2620 * by the firmware (but not to the scsi mid layer) but we can't
2621 * distinguish which. Send the abort down.
2622 */
2623 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
2624 if (rc != 0) {
2625 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2626 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2627 h->scsi_host->host_no,
2628 dev->bus, dev->target, dev->lun);
2629 return FAILED;
2630 }
2631 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2632
2633 /* If the abort(s) above completed and actually aborted the
2634 * command, then the command to be aborted should already be
2635 * completed. If not, wait around a bit more to see if they
2636 * manage to complete normally.
2637 */
2638 #define ABORT_COMPLETE_WAIT_SECS 30
2639 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2640 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2641 if (!found)
2642 return SUCCESS;
2643 msleep(100);
2644 }
2645 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2646 msg, ABORT_COMPLETE_WAIT_SECS);
2647 return FAILED;
2648 }
2649
2650
2651 /*
2652 * For operations that cannot sleep, a command block is allocated at init,
2653 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2654 * which ones are free or in use. Lock must be held when calling this.
2655 * cmd_free() is the complement.
2656 */
2657 static struct CommandList *cmd_alloc(struct ctlr_info *h)
2658 {
2659 struct CommandList *c;
2660 int i;
2661 union u64bit temp64;
2662 dma_addr_t cmd_dma_handle, err_dma_handle;
2663 unsigned long flags;
2664
2665 spin_lock_irqsave(&h->lock, flags);
2666 do {
2667 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2668 if (i == h->nr_cmds) {
2669 spin_unlock_irqrestore(&h->lock, flags);
2670 return NULL;
2671 }
2672 } while (test_and_set_bit
2673 (i & (BITS_PER_LONG - 1),
2674 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2675 h->nr_allocs++;
2676 spin_unlock_irqrestore(&h->lock, flags);
2677
2678 c = h->cmd_pool + i;
2679 memset(c, 0, sizeof(*c));
2680 cmd_dma_handle = h->cmd_pool_dhandle
2681 + i * sizeof(*c);
2682 c->err_info = h->errinfo_pool + i;
2683 memset(c->err_info, 0, sizeof(*c->err_info));
2684 err_dma_handle = h->errinfo_pool_dhandle
2685 + i * sizeof(*c->err_info);
2686
2687 c->cmdindex = i;
2688
2689 INIT_LIST_HEAD(&c->list);
2690 c->busaddr = (u32) cmd_dma_handle;
2691 temp64.val = (u64) err_dma_handle;
2692 c->ErrDesc.Addr.lower = temp64.val32.lower;
2693 c->ErrDesc.Addr.upper = temp64.val32.upper;
2694 c->ErrDesc.Len = sizeof(*c->err_info);
2695
2696 c->h = h;
2697 return c;
2698 }
2699
2700 /* For operations that can wait for kmalloc to possibly sleep,
2701 * this routine can be called. Lock need not be held to call
2702 * cmd_special_alloc. cmd_special_free() is the complement.
2703 */
2704 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2705 {
2706 struct CommandList *c;
2707 union u64bit temp64;
2708 dma_addr_t cmd_dma_handle, err_dma_handle;
2709
2710 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2711 if (c == NULL)
2712 return NULL;
2713 memset(c, 0, sizeof(*c));
2714
2715 c->cmdindex = -1;
2716
2717 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2718 &err_dma_handle);
2719
2720 if (c->err_info == NULL) {
2721 pci_free_consistent(h->pdev,
2722 sizeof(*c), c, cmd_dma_handle);
2723 return NULL;
2724 }
2725 memset(c->err_info, 0, sizeof(*c->err_info));
2726
2727 INIT_LIST_HEAD(&c->list);
2728 c->busaddr = (u32) cmd_dma_handle;
2729 temp64.val = (u64) err_dma_handle;
2730 c->ErrDesc.Addr.lower = temp64.val32.lower;
2731 c->ErrDesc.Addr.upper = temp64.val32.upper;
2732 c->ErrDesc.Len = sizeof(*c->err_info);
2733
2734 c->h = h;
2735 return c;
2736 }
2737
2738 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2739 {
2740 int i;
2741 unsigned long flags;
2742
2743 i = c - h->cmd_pool;
2744 spin_lock_irqsave(&h->lock, flags);
2745 clear_bit(i & (BITS_PER_LONG - 1),
2746 h->cmd_pool_bits + (i / BITS_PER_LONG));
2747 h->nr_frees++;
2748 spin_unlock_irqrestore(&h->lock, flags);
2749 }
2750
2751 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2752 {
2753 union u64bit temp64;
2754
2755 temp64.val32.lower = c->ErrDesc.Addr.lower;
2756 temp64.val32.upper = c->ErrDesc.Addr.upper;
2757 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2758 c->err_info, (dma_addr_t) temp64.val);
2759 pci_free_consistent(h->pdev, sizeof(*c),
2760 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
2761 }
2762
2763 #ifdef CONFIG_COMPAT
2764
2765 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2766 {
2767 IOCTL32_Command_struct __user *arg32 =
2768 (IOCTL32_Command_struct __user *) arg;
2769 IOCTL_Command_struct arg64;
2770 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2771 int err;
2772 u32 cp;
2773
2774 memset(&arg64, 0, sizeof(arg64));
2775 err = 0;
2776 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2777 sizeof(arg64.LUN_info));
2778 err |= copy_from_user(&arg64.Request, &arg32->Request,
2779 sizeof(arg64.Request));
2780 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2781 sizeof(arg64.error_info));
2782 err |= get_user(arg64.buf_size, &arg32->buf_size);
2783 err |= get_user(cp, &arg32->buf);
2784 arg64.buf = compat_ptr(cp);
2785 err |= copy_to_user(p, &arg64, sizeof(arg64));
2786
2787 if (err)
2788 return -EFAULT;
2789
2790 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2791 if (err)
2792 return err;
2793 err |= copy_in_user(&arg32->error_info, &p->error_info,
2794 sizeof(arg32->error_info));
2795 if (err)
2796 return -EFAULT;
2797 return err;
2798 }
2799
2800 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2801 int cmd, void *arg)
2802 {
2803 BIG_IOCTL32_Command_struct __user *arg32 =
2804 (BIG_IOCTL32_Command_struct __user *) arg;
2805 BIG_IOCTL_Command_struct arg64;
2806 BIG_IOCTL_Command_struct __user *p =
2807 compat_alloc_user_space(sizeof(arg64));
2808 int err;
2809 u32 cp;
2810
2811 memset(&arg64, 0, sizeof(arg64));
2812 err = 0;
2813 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2814 sizeof(arg64.LUN_info));
2815 err |= copy_from_user(&arg64.Request, &arg32->Request,
2816 sizeof(arg64.Request));
2817 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2818 sizeof(arg64.error_info));
2819 err |= get_user(arg64.buf_size, &arg32->buf_size);
2820 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2821 err |= get_user(cp, &arg32->buf);
2822 arg64.buf = compat_ptr(cp);
2823 err |= copy_to_user(p, &arg64, sizeof(arg64));
2824
2825 if (err)
2826 return -EFAULT;
2827
2828 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2829 if (err)
2830 return err;
2831 err |= copy_in_user(&arg32->error_info, &p->error_info,
2832 sizeof(arg32->error_info));
2833 if (err)
2834 return -EFAULT;
2835 return err;
2836 }
2837
2838 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2839 {
2840 switch (cmd) {
2841 case CCISS_GETPCIINFO:
2842 case CCISS_GETINTINFO:
2843 case CCISS_SETINTINFO:
2844 case CCISS_GETNODENAME:
2845 case CCISS_SETNODENAME:
2846 case CCISS_GETHEARTBEAT:
2847 case CCISS_GETBUSTYPES:
2848 case CCISS_GETFIRMVER:
2849 case CCISS_GETDRIVVER:
2850 case CCISS_REVALIDVOLS:
2851 case CCISS_DEREGDISK:
2852 case CCISS_REGNEWDISK:
2853 case CCISS_REGNEWD:
2854 case CCISS_RESCANDISK:
2855 case CCISS_GETLUNINFO:
2856 return hpsa_ioctl(dev, cmd, arg);
2857
2858 case CCISS_PASSTHRU32:
2859 return hpsa_ioctl32_passthru(dev, cmd, arg);
2860 case CCISS_BIG_PASSTHRU32:
2861 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2862
2863 default:
2864 return -ENOIOCTLCMD;
2865 }
2866 }
2867 #endif
2868
2869 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2870 {
2871 struct hpsa_pci_info pciinfo;
2872
2873 if (!argp)
2874 return -EINVAL;
2875 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2876 pciinfo.bus = h->pdev->bus->number;
2877 pciinfo.dev_fn = h->pdev->devfn;
2878 pciinfo.board_id = h->board_id;
2879 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2880 return -EFAULT;
2881 return 0;
2882 }
2883
2884 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2885 {
2886 DriverVer_type DriverVer;
2887 unsigned char vmaj, vmin, vsubmin;
2888 int rc;
2889
2890 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2891 &vmaj, &vmin, &vsubmin);
2892 if (rc != 3) {
2893 dev_info(&h->pdev->dev, "driver version string '%s' "
2894 "unrecognized.", HPSA_DRIVER_VERSION);
2895 vmaj = 0;
2896 vmin = 0;
2897 vsubmin = 0;
2898 }
2899 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2900 if (!argp)
2901 return -EINVAL;
2902 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2903 return -EFAULT;
2904 return 0;
2905 }
2906
2907 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2908 {
2909 IOCTL_Command_struct iocommand;
2910 struct CommandList *c;
2911 char *buff = NULL;
2912 union u64bit temp64;
2913
2914 if (!argp)
2915 return -EINVAL;
2916 if (!capable(CAP_SYS_RAWIO))
2917 return -EPERM;
2918 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2919 return -EFAULT;
2920 if ((iocommand.buf_size < 1) &&
2921 (iocommand.Request.Type.Direction != XFER_NONE)) {
2922 return -EINVAL;
2923 }
2924 if (iocommand.buf_size > 0) {
2925 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2926 if (buff == NULL)
2927 return -EFAULT;
2928 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2929 /* Copy the data into the buffer we created */
2930 if (copy_from_user(buff, iocommand.buf,
2931 iocommand.buf_size)) {
2932 kfree(buff);
2933 return -EFAULT;
2934 }
2935 } else {
2936 memset(buff, 0, iocommand.buf_size);
2937 }
2938 }
2939 c = cmd_special_alloc(h);
2940 if (c == NULL) {
2941 kfree(buff);
2942 return -ENOMEM;
2943 }
2944 /* Fill in the command type */
2945 c->cmd_type = CMD_IOCTL_PEND;
2946 /* Fill in Command Header */
2947 c->Header.ReplyQueue = 0; /* unused in simple mode */
2948 if (iocommand.buf_size > 0) { /* buffer to fill */
2949 c->Header.SGList = 1;
2950 c->Header.SGTotal = 1;
2951 } else { /* no buffers to fill */
2952 c->Header.SGList = 0;
2953 c->Header.SGTotal = 0;
2954 }
2955 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2956 /* use the kernel address the cmd block for tag */
2957 c->Header.Tag.lower = c->busaddr;
2958
2959 /* Fill in Request block */
2960 memcpy(&c->Request, &iocommand.Request,
2961 sizeof(c->Request));
2962
2963 /* Fill in the scatter gather information */
2964 if (iocommand.buf_size > 0) {
2965 temp64.val = pci_map_single(h->pdev, buff,
2966 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2967 c->SG[0].Addr.lower = temp64.val32.lower;
2968 c->SG[0].Addr.upper = temp64.val32.upper;
2969 c->SG[0].Len = iocommand.buf_size;
2970 c->SG[0].Ext = 0; /* we are not chaining*/
2971 }
2972 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2973 if (iocommand.buf_size > 0)
2974 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2975 check_ioctl_unit_attention(h, c);
2976
2977 /* Copy the error information out */
2978 memcpy(&iocommand.error_info, c->err_info,
2979 sizeof(iocommand.error_info));
2980 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2981 kfree(buff);
2982 cmd_special_free(h, c);
2983 return -EFAULT;
2984 }
2985 if (iocommand.Request.Type.Direction == XFER_READ &&
2986 iocommand.buf_size > 0) {
2987 /* Copy the data out of the buffer we created */
2988 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2989 kfree(buff);
2990 cmd_special_free(h, c);
2991 return -EFAULT;
2992 }
2993 }
2994 kfree(buff);
2995 cmd_special_free(h, c);
2996 return 0;
2997 }
2998
2999 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3000 {
3001 BIG_IOCTL_Command_struct *ioc;
3002 struct CommandList *c;
3003 unsigned char **buff = NULL;
3004 int *buff_size = NULL;
3005 union u64bit temp64;
3006 BYTE sg_used = 0;
3007 int status = 0;
3008 int i;
3009 u32 left;
3010 u32 sz;
3011 BYTE __user *data_ptr;
3012
3013 if (!argp)
3014 return -EINVAL;
3015 if (!capable(CAP_SYS_RAWIO))
3016 return -EPERM;
3017 ioc = (BIG_IOCTL_Command_struct *)
3018 kmalloc(sizeof(*ioc), GFP_KERNEL);
3019 if (!ioc) {
3020 status = -ENOMEM;
3021 goto cleanup1;
3022 }
3023 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3024 status = -EFAULT;
3025 goto cleanup1;
3026 }
3027 if ((ioc->buf_size < 1) &&
3028 (ioc->Request.Type.Direction != XFER_NONE)) {
3029 status = -EINVAL;
3030 goto cleanup1;
3031 }
3032 /* Check kmalloc limits using all SGs */
3033 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3034 status = -EINVAL;
3035 goto cleanup1;
3036 }
3037 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
3038 status = -EINVAL;
3039 goto cleanup1;
3040 }
3041 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
3042 if (!buff) {
3043 status = -ENOMEM;
3044 goto cleanup1;
3045 }
3046 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
3047 if (!buff_size) {
3048 status = -ENOMEM;
3049 goto cleanup1;
3050 }
3051 left = ioc->buf_size;
3052 data_ptr = ioc->buf;
3053 while (left) {
3054 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3055 buff_size[sg_used] = sz;
3056 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3057 if (buff[sg_used] == NULL) {
3058 status = -ENOMEM;
3059 goto cleanup1;
3060 }
3061 if (ioc->Request.Type.Direction == XFER_WRITE) {
3062 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3063 status = -ENOMEM;
3064 goto cleanup1;
3065 }
3066 } else
3067 memset(buff[sg_used], 0, sz);
3068 left -= sz;
3069 data_ptr += sz;
3070 sg_used++;
3071 }
3072 c = cmd_special_alloc(h);
3073 if (c == NULL) {
3074 status = -ENOMEM;
3075 goto cleanup1;
3076 }
3077 c->cmd_type = CMD_IOCTL_PEND;
3078 c->Header.ReplyQueue = 0;
3079 c->Header.SGList = c->Header.SGTotal = sg_used;
3080 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3081 c->Header.Tag.lower = c->busaddr;
3082 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3083 if (ioc->buf_size > 0) {
3084 int i;
3085 for (i = 0; i < sg_used; i++) {
3086 temp64.val = pci_map_single(h->pdev, buff[i],
3087 buff_size[i], PCI_DMA_BIDIRECTIONAL);
3088 c->SG[i].Addr.lower = temp64.val32.lower;
3089 c->SG[i].Addr.upper = temp64.val32.upper;
3090 c->SG[i].Len = buff_size[i];
3091 /* we are not chaining */
3092 c->SG[i].Ext = 0;
3093 }
3094 }
3095 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
3096 if (sg_used)
3097 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
3098 check_ioctl_unit_attention(h, c);
3099 /* Copy the error information out */
3100 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3101 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3102 cmd_special_free(h, c);
3103 status = -EFAULT;
3104 goto cleanup1;
3105 }
3106 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
3107 /* Copy the data out of the buffer we created */
3108 BYTE __user *ptr = ioc->buf;
3109 for (i = 0; i < sg_used; i++) {
3110 if (copy_to_user(ptr, buff[i], buff_size[i])) {
3111 cmd_special_free(h, c);
3112 status = -EFAULT;
3113 goto cleanup1;
3114 }
3115 ptr += buff_size[i];
3116 }
3117 }
3118 cmd_special_free(h, c);
3119 status = 0;
3120 cleanup1:
3121 if (buff) {
3122 for (i = 0; i < sg_used; i++)
3123 kfree(buff[i]);
3124 kfree(buff);
3125 }
3126 kfree(buff_size);
3127 kfree(ioc);
3128 return status;
3129 }
3130
3131 static void check_ioctl_unit_attention(struct ctlr_info *h,
3132 struct CommandList *c)
3133 {
3134 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3135 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3136 (void) check_for_unit_attention(h, c);
3137 }
3138 /*
3139 * ioctl
3140 */
3141 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3142 {
3143 struct ctlr_info *h;
3144 void __user *argp = (void __user *)arg;
3145
3146 h = sdev_to_hba(dev);
3147
3148 switch (cmd) {
3149 case CCISS_DEREGDISK:
3150 case CCISS_REGNEWDISK:
3151 case CCISS_REGNEWD:
3152 hpsa_scan_start(h->scsi_host);
3153 return 0;
3154 case CCISS_GETPCIINFO:
3155 return hpsa_getpciinfo_ioctl(h, argp);
3156 case CCISS_GETDRIVVER:
3157 return hpsa_getdrivver_ioctl(h, argp);
3158 case CCISS_PASSTHRU:
3159 return hpsa_passthru_ioctl(h, argp);
3160 case CCISS_BIG_PASSTHRU:
3161 return hpsa_big_passthru_ioctl(h, argp);
3162 default:
3163 return -ENOTTY;
3164 }
3165 }
3166
3167 static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
3168 unsigned char *scsi3addr, u8 reset_type)
3169 {
3170 struct CommandList *c;
3171
3172 c = cmd_alloc(h);
3173 if (!c)
3174 return -ENOMEM;
3175 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
3176 RAID_CTLR_LUNID, TYPE_MSG);
3177 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3178 c->waiting = NULL;
3179 enqueue_cmd_and_start_io(h, c);
3180 /* Don't wait for completion, the reset won't complete. Don't free
3181 * the command either. This is the last command we will send before
3182 * re-initializing everything, so it doesn't matter and won't leak.
3183 */
3184 return 0;
3185 }
3186
3187 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
3188 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
3189 int cmd_type)
3190 {
3191 int pci_dir = XFER_NONE;
3192 struct CommandList *a; /* for commands to be aborted */
3193
3194 c->cmd_type = CMD_IOCTL_PEND;
3195 c->Header.ReplyQueue = 0;
3196 if (buff != NULL && size > 0) {
3197 c->Header.SGList = 1;
3198 c->Header.SGTotal = 1;
3199 } else {
3200 c->Header.SGList = 0;
3201 c->Header.SGTotal = 0;
3202 }
3203 c->Header.Tag.lower = c->busaddr;
3204 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3205
3206 c->Request.Type.Type = cmd_type;
3207 if (cmd_type == TYPE_CMD) {
3208 switch (cmd) {
3209 case HPSA_INQUIRY:
3210 /* are we trying to read a vital product page */
3211 if (page_code != 0) {
3212 c->Request.CDB[1] = 0x01;
3213 c->Request.CDB[2] = page_code;
3214 }
3215 c->Request.CDBLen = 6;
3216 c->Request.Type.Attribute = ATTR_SIMPLE;
3217 c->Request.Type.Direction = XFER_READ;
3218 c->Request.Timeout = 0;
3219 c->Request.CDB[0] = HPSA_INQUIRY;
3220 c->Request.CDB[4] = size & 0xFF;
3221 break;
3222 case HPSA_REPORT_LOG:
3223 case HPSA_REPORT_PHYS:
3224 /* Talking to controller so It's a physical command
3225 mode = 00 target = 0. Nothing to write.
3226 */
3227 c->Request.CDBLen = 12;
3228 c->Request.Type.Attribute = ATTR_SIMPLE;
3229 c->Request.Type.Direction = XFER_READ;
3230 c->Request.Timeout = 0;
3231 c->Request.CDB[0] = cmd;
3232 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3233 c->Request.CDB[7] = (size >> 16) & 0xFF;
3234 c->Request.CDB[8] = (size >> 8) & 0xFF;
3235 c->Request.CDB[9] = size & 0xFF;
3236 break;
3237 case HPSA_CACHE_FLUSH:
3238 c->Request.CDBLen = 12;
3239 c->Request.Type.Attribute = ATTR_SIMPLE;
3240 c->Request.Type.Direction = XFER_WRITE;
3241 c->Request.Timeout = 0;
3242 c->Request.CDB[0] = BMIC_WRITE;
3243 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
3244 c->Request.CDB[7] = (size >> 8) & 0xFF;
3245 c->Request.CDB[8] = size & 0xFF;
3246 break;
3247 case TEST_UNIT_READY:
3248 c->Request.CDBLen = 6;
3249 c->Request.Type.Attribute = ATTR_SIMPLE;
3250 c->Request.Type.Direction = XFER_NONE;
3251 c->Request.Timeout = 0;
3252 break;
3253 default:
3254 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3255 BUG();
3256 return;
3257 }
3258 } else if (cmd_type == TYPE_MSG) {
3259 switch (cmd) {
3260
3261 case HPSA_DEVICE_RESET_MSG:
3262 c->Request.CDBLen = 16;
3263 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
3264 c->Request.Type.Attribute = ATTR_SIMPLE;
3265 c->Request.Type.Direction = XFER_NONE;
3266 c->Request.Timeout = 0; /* Don't time out */
3267 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3268 c->Request.CDB[0] = cmd;
3269 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
3270 /* If bytes 4-7 are zero, it means reset the */
3271 /* LunID device */
3272 c->Request.CDB[4] = 0x00;
3273 c->Request.CDB[5] = 0x00;
3274 c->Request.CDB[6] = 0x00;
3275 c->Request.CDB[7] = 0x00;
3276 break;
3277 case HPSA_ABORT_MSG:
3278 a = buff; /* point to command to be aborted */
3279 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3280 a->Header.Tag.upper, a->Header.Tag.lower,
3281 c->Header.Tag.upper, c->Header.Tag.lower);
3282 c->Request.CDBLen = 16;
3283 c->Request.Type.Type = TYPE_MSG;
3284 c->Request.Type.Attribute = ATTR_SIMPLE;
3285 c->Request.Type.Direction = XFER_WRITE;
3286 c->Request.Timeout = 0; /* Don't time out */
3287 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3288 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3289 c->Request.CDB[2] = 0x00; /* reserved */
3290 c->Request.CDB[3] = 0x00; /* reserved */
3291 /* Tag to abort goes in CDB[4]-CDB[11] */
3292 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3293 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3294 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3295 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3296 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3297 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3298 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3299 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3300 c->Request.CDB[12] = 0x00; /* reserved */
3301 c->Request.CDB[13] = 0x00; /* reserved */
3302 c->Request.CDB[14] = 0x00; /* reserved */
3303 c->Request.CDB[15] = 0x00; /* reserved */
3304 break;
3305 default:
3306 dev_warn(&h->pdev->dev, "unknown message type %d\n",
3307 cmd);
3308 BUG();
3309 }
3310 } else {
3311 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3312 BUG();
3313 }
3314
3315 switch (c->Request.Type.Direction) {
3316 case XFER_READ:
3317 pci_dir = PCI_DMA_FROMDEVICE;
3318 break;
3319 case XFER_WRITE:
3320 pci_dir = PCI_DMA_TODEVICE;
3321 break;
3322 case XFER_NONE:
3323 pci_dir = PCI_DMA_NONE;
3324 break;
3325 default:
3326 pci_dir = PCI_DMA_BIDIRECTIONAL;
3327 }
3328
3329 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
3330
3331 return;
3332 }
3333
3334 /*
3335 * Map (physical) PCI mem into (virtual) kernel space
3336 */
3337 static void __iomem *remap_pci_mem(ulong base, ulong size)
3338 {
3339 ulong page_base = ((ulong) base) & PAGE_MASK;
3340 ulong page_offs = ((ulong) base) - page_base;
3341 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
3342
3343 return page_remapped ? (page_remapped + page_offs) : NULL;
3344 }
3345
3346 /* Takes cmds off the submission queue and sends them to the hardware,
3347 * then puts them on the queue of cmds waiting for completion.
3348 */
3349 static void start_io(struct ctlr_info *h)
3350 {
3351 struct CommandList *c;
3352 unsigned long flags;
3353
3354 spin_lock_irqsave(&h->lock, flags);
3355 while (!list_empty(&h->reqQ)) {
3356 c = list_entry(h->reqQ.next, struct CommandList, list);
3357 /* can't do anything if fifo is full */
3358 if ((h->access.fifo_full(h))) {
3359 dev_warn(&h->pdev->dev, "fifo full\n");
3360 break;
3361 }
3362
3363 /* Get the first entry from the Request Q */
3364 removeQ(c);
3365 h->Qdepth--;
3366
3367 /* Put job onto the completed Q */
3368 addQ(&h->cmpQ, c);
3369
3370 /* Must increment commands_outstanding before unlocking
3371 * and submitting to avoid race checking for fifo full
3372 * condition.
3373 */
3374 h->commands_outstanding++;
3375 if (h->commands_outstanding > h->max_outstanding)
3376 h->max_outstanding = h->commands_outstanding;
3377
3378 /* Tell the controller execute command */
3379 spin_unlock_irqrestore(&h->lock, flags);
3380 h->access.submit_command(h, c);
3381 spin_lock_irqsave(&h->lock, flags);
3382 }
3383 spin_unlock_irqrestore(&h->lock, flags);
3384 }
3385
3386 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
3387 {
3388 return h->access.command_completed(h, q);
3389 }
3390
3391 static inline bool interrupt_pending(struct ctlr_info *h)
3392 {
3393 return h->access.intr_pending(h);
3394 }
3395
3396 static inline long interrupt_not_for_us(struct ctlr_info *h)
3397 {
3398 return (h->access.intr_pending(h) == 0) ||
3399 (h->interrupts_enabled == 0);
3400 }
3401
3402 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3403 u32 raw_tag)
3404 {
3405 if (unlikely(tag_index >= h->nr_cmds)) {
3406 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3407 return 1;
3408 }
3409 return 0;
3410 }
3411
3412 static inline void finish_cmd(struct CommandList *c)
3413 {
3414 unsigned long flags;
3415
3416 spin_lock_irqsave(&c->h->lock, flags);
3417 removeQ(c);
3418 spin_unlock_irqrestore(&c->h->lock, flags);
3419 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
3420 if (likely(c->cmd_type == CMD_SCSI))
3421 complete_scsi_command(c);
3422 else if (c->cmd_type == CMD_IOCTL_PEND)
3423 complete(c->waiting);
3424 }
3425
3426 static inline u32 hpsa_tag_contains_index(u32 tag)
3427 {
3428 return tag & DIRECT_LOOKUP_BIT;
3429 }
3430
3431 static inline u32 hpsa_tag_to_index(u32 tag)
3432 {
3433 return tag >> DIRECT_LOOKUP_SHIFT;
3434 }
3435
3436
3437 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
3438 {
3439 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3440 #define HPSA_SIMPLE_ERROR_BITS 0x03
3441 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3442 return tag & ~HPSA_SIMPLE_ERROR_BITS;
3443 return tag & ~HPSA_PERF_ERROR_BITS;
3444 }
3445
3446 /* process completion of an indexed ("direct lookup") command */
3447 static inline void process_indexed_cmd(struct ctlr_info *h,
3448 u32 raw_tag)
3449 {
3450 u32 tag_index;
3451 struct CommandList *c;
3452
3453 tag_index = hpsa_tag_to_index(raw_tag);
3454 if (!bad_tag(h, tag_index, raw_tag)) {
3455 c = h->cmd_pool + tag_index;
3456 finish_cmd(c);
3457 }
3458 }
3459
3460 /* process completion of a non-indexed command */
3461 static inline void process_nonindexed_cmd(struct ctlr_info *h,
3462 u32 raw_tag)
3463 {
3464 u32 tag;
3465 struct CommandList *c = NULL;
3466 unsigned long flags;
3467
3468 tag = hpsa_tag_discard_error_bits(h, raw_tag);
3469 spin_lock_irqsave(&h->lock, flags);
3470 list_for_each_entry(c, &h->cmpQ, list) {
3471 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3472 spin_unlock_irqrestore(&h->lock, flags);
3473 finish_cmd(c);
3474 return;
3475 }
3476 }
3477 spin_unlock_irqrestore(&h->lock, flags);
3478 bad_tag(h, h->nr_cmds + 1, raw_tag);
3479 }
3480
3481 /* Some controllers, like p400, will give us one interrupt
3482 * after a soft reset, even if we turned interrupts off.
3483 * Only need to check for this in the hpsa_xxx_discard_completions
3484 * functions.
3485 */
3486 static int ignore_bogus_interrupt(struct ctlr_info *h)
3487 {
3488 if (likely(!reset_devices))
3489 return 0;
3490
3491 if (likely(h->interrupts_enabled))
3492 return 0;
3493
3494 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3495 "(known firmware bug.) Ignoring.\n");
3496
3497 return 1;
3498 }
3499
3500 /*
3501 * Convert &h->q[x] (passed to interrupt handlers) back to h.
3502 * Relies on (h-q[x] == x) being true for x such that
3503 * 0 <= x < MAX_REPLY_QUEUES.
3504 */
3505 static struct ctlr_info *queue_to_hba(u8 *queue)
3506 {
3507 return container_of((queue - *queue), struct ctlr_info, q[0]);
3508 }
3509
3510 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3511 {
3512 struct ctlr_info *h = queue_to_hba(queue);
3513 u8 q = *(u8 *) queue;
3514 u32 raw_tag;
3515
3516 if (ignore_bogus_interrupt(h))
3517 return IRQ_NONE;
3518
3519 if (interrupt_not_for_us(h))
3520 return IRQ_NONE;
3521 h->last_intr_timestamp = get_jiffies_64();
3522 while (interrupt_pending(h)) {
3523 raw_tag = get_next_completion(h, q);
3524 while (raw_tag != FIFO_EMPTY)
3525 raw_tag = next_command(h, q);
3526 }
3527 return IRQ_HANDLED;
3528 }
3529
3530 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
3531 {
3532 struct ctlr_info *h = queue_to_hba(queue);
3533 u32 raw_tag;
3534 u8 q = *(u8 *) queue;
3535
3536 if (ignore_bogus_interrupt(h))
3537 return IRQ_NONE;
3538
3539 h->last_intr_timestamp = get_jiffies_64();
3540 raw_tag = get_next_completion(h, q);
3541 while (raw_tag != FIFO_EMPTY)
3542 raw_tag = next_command(h, q);
3543 return IRQ_HANDLED;
3544 }
3545
3546 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
3547 {
3548 struct ctlr_info *h = queue_to_hba((u8 *) queue);
3549 u32 raw_tag;
3550 u8 q = *(u8 *) queue;
3551
3552 if (interrupt_not_for_us(h))
3553 return IRQ_NONE;
3554 h->last_intr_timestamp = get_jiffies_64();
3555 while (interrupt_pending(h)) {
3556 raw_tag = get_next_completion(h, q);
3557 while (raw_tag != FIFO_EMPTY) {
3558 if (likely(hpsa_tag_contains_index(raw_tag)))
3559 process_indexed_cmd(h, raw_tag);
3560 else
3561 process_nonindexed_cmd(h, raw_tag);
3562 raw_tag = next_command(h, q);
3563 }
3564 }
3565 return IRQ_HANDLED;
3566 }
3567
3568 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
3569 {
3570 struct ctlr_info *h = queue_to_hba(queue);
3571 u32 raw_tag;
3572 u8 q = *(u8 *) queue;
3573
3574 h->last_intr_timestamp = get_jiffies_64();
3575 raw_tag = get_next_completion(h, q);
3576 while (raw_tag != FIFO_EMPTY) {
3577 if (likely(hpsa_tag_contains_index(raw_tag)))
3578 process_indexed_cmd(h, raw_tag);
3579 else
3580 process_nonindexed_cmd(h, raw_tag);
3581 raw_tag = next_command(h, q);
3582 }
3583 return IRQ_HANDLED;
3584 }
3585
3586 /* Send a message CDB to the firmware. Careful, this only works
3587 * in simple mode, not performant mode due to the tag lookup.
3588 * We only ever use this immediately after a controller reset.
3589 */
3590 static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3591 unsigned char type)
3592 {
3593 struct Command {
3594 struct CommandListHeader CommandHeader;
3595 struct RequestBlock Request;
3596 struct ErrDescriptor ErrorDescriptor;
3597 };
3598 struct Command *cmd;
3599 static const size_t cmd_sz = sizeof(*cmd) +
3600 sizeof(cmd->ErrorDescriptor);
3601 dma_addr_t paddr64;
3602 uint32_t paddr32, tag;
3603 void __iomem *vaddr;
3604 int i, err;
3605
3606 vaddr = pci_ioremap_bar(pdev, 0);
3607 if (vaddr == NULL)
3608 return -ENOMEM;
3609
3610 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
3611 * CCISS commands, so they must be allocated from the lower 4GiB of
3612 * memory.
3613 */
3614 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3615 if (err) {
3616 iounmap(vaddr);
3617 return -ENOMEM;
3618 }
3619
3620 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3621 if (cmd == NULL) {
3622 iounmap(vaddr);
3623 return -ENOMEM;
3624 }
3625
3626 /* This must fit, because of the 32-bit consistent DMA mask. Also,
3627 * although there's no guarantee, we assume that the address is at
3628 * least 4-byte aligned (most likely, it's page-aligned).
3629 */
3630 paddr32 = paddr64;
3631
3632 cmd->CommandHeader.ReplyQueue = 0;
3633 cmd->CommandHeader.SGList = 0;
3634 cmd->CommandHeader.SGTotal = 0;
3635 cmd->CommandHeader.Tag.lower = paddr32;
3636 cmd->CommandHeader.Tag.upper = 0;
3637 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3638
3639 cmd->Request.CDBLen = 16;
3640 cmd->Request.Type.Type = TYPE_MSG;
3641 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3642 cmd->Request.Type.Direction = XFER_NONE;
3643 cmd->Request.Timeout = 0; /* Don't time out */
3644 cmd->Request.CDB[0] = opcode;
3645 cmd->Request.CDB[1] = type;
3646 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3647 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3648 cmd->ErrorDescriptor.Addr.upper = 0;
3649 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3650
3651 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3652
3653 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3654 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3655 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
3656 break;
3657 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3658 }
3659
3660 iounmap(vaddr);
3661
3662 /* we leak the DMA buffer here ... no choice since the controller could
3663 * still complete the command.
3664 */
3665 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3666 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3667 opcode, type);
3668 return -ETIMEDOUT;
3669 }
3670
3671 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3672
3673 if (tag & HPSA_ERROR_BIT) {
3674 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3675 opcode, type);
3676 return -EIO;
3677 }
3678
3679 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3680 opcode, type);
3681 return 0;
3682 }
3683
3684 #define hpsa_noop(p) hpsa_message(p, 3, 0)
3685
3686 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3687 void * __iomem vaddr, u32 use_doorbell)
3688 {
3689 u16 pmcsr;
3690 int pos;
3691
3692 if (use_doorbell) {
3693 /* For everything after the P600, the PCI power state method
3694 * of resetting the controller doesn't work, so we have this
3695 * other way using the doorbell register.
3696 */
3697 dev_info(&pdev->dev, "using doorbell to reset controller\n");
3698 writel(use_doorbell, vaddr + SA5_DOORBELL);
3699 } else { /* Try to do it the PCI power state way */
3700
3701 /* Quoting from the Open CISS Specification: "The Power
3702 * Management Control/Status Register (CSR) controls the power
3703 * state of the device. The normal operating state is D0,
3704 * CSR=00h. The software off state is D3, CSR=03h. To reset
3705 * the controller, place the interface device in D3 then to D0,
3706 * this causes a secondary PCI reset which will reset the
3707 * controller." */
3708
3709 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3710 if (pos == 0) {
3711 dev_err(&pdev->dev,
3712 "hpsa_reset_controller: "
3713 "PCI PM not supported\n");
3714 return -ENODEV;
3715 }
3716 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3717 /* enter the D3hot power management state */
3718 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3719 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3720 pmcsr |= PCI_D3hot;
3721 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3722
3723 msleep(500);
3724
3725 /* enter the D0 power management state */
3726 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3727 pmcsr |= PCI_D0;
3728 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3729
3730 /*
3731 * The P600 requires a small delay when changing states.
3732 * Otherwise we may think the board did not reset and we bail.
3733 * This for kdump only and is particular to the P600.
3734 */
3735 msleep(500);
3736 }
3737 return 0;
3738 }
3739
3740 static __devinit void init_driver_version(char *driver_version, int len)
3741 {
3742 memset(driver_version, 0, len);
3743 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
3744 }
3745
3746 static __devinit int write_driver_ver_to_cfgtable(
3747 struct CfgTable __iomem *cfgtable)
3748 {
3749 char *driver_version;
3750 int i, size = sizeof(cfgtable->driver_version);
3751
3752 driver_version = kmalloc(size, GFP_KERNEL);
3753 if (!driver_version)
3754 return -ENOMEM;
3755
3756 init_driver_version(driver_version, size);
3757 for (i = 0; i < size; i++)
3758 writeb(driver_version[i], &cfgtable->driver_version[i]);
3759 kfree(driver_version);
3760 return 0;
3761 }
3762
3763 static __devinit void read_driver_ver_from_cfgtable(
3764 struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
3765 {
3766 int i;
3767
3768 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3769 driver_ver[i] = readb(&cfgtable->driver_version[i]);
3770 }
3771
3772 static __devinit int controller_reset_failed(
3773 struct CfgTable __iomem *cfgtable)
3774 {
3775
3776 char *driver_ver, *old_driver_ver;
3777 int rc, size = sizeof(cfgtable->driver_version);
3778
3779 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3780 if (!old_driver_ver)
3781 return -ENOMEM;
3782 driver_ver = old_driver_ver + size;
3783
3784 /* After a reset, the 32 bytes of "driver version" in the cfgtable
3785 * should have been changed, otherwise we know the reset failed.
3786 */
3787 init_driver_version(old_driver_ver, size);
3788 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3789 rc = !memcmp(driver_ver, old_driver_ver, size);
3790 kfree(old_driver_ver);
3791 return rc;
3792 }
3793 /* This does a hard reset of the controller using PCI power management
3794 * states or the using the doorbell register.
3795 */
3796 static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
3797 {
3798 u64 cfg_offset;
3799 u32 cfg_base_addr;
3800 u64 cfg_base_addr_index;
3801 void __iomem *vaddr;
3802 unsigned long paddr;
3803 u32 misc_fw_support;
3804 int rc;
3805 struct CfgTable __iomem *cfgtable;
3806 u32 use_doorbell;
3807 u32 board_id;
3808 u16 command_register;
3809
3810 /* For controllers as old as the P600, this is very nearly
3811 * the same thing as
3812 *
3813 * pci_save_state(pci_dev);
3814 * pci_set_power_state(pci_dev, PCI_D3hot);
3815 * pci_set_power_state(pci_dev, PCI_D0);
3816 * pci_restore_state(pci_dev);
3817 *
3818 * For controllers newer than the P600, the pci power state
3819 * method of resetting doesn't work so we have another way
3820 * using the doorbell register.
3821 */
3822
3823 rc = hpsa_lookup_board_id(pdev, &board_id);
3824 if (rc < 0 || !ctlr_is_resettable(board_id)) {
3825 dev_warn(&pdev->dev, "Not resetting device.\n");
3826 return -ENODEV;
3827 }
3828
3829 /* if controller is soft- but not hard resettable... */
3830 if (!ctlr_is_hard_resettable(board_id))
3831 return -ENOTSUPP; /* try soft reset later. */
3832
3833 /* Save the PCI command register */
3834 pci_read_config_word(pdev, 4, &command_register);
3835 /* Turn the board off. This is so that later pci_restore_state()
3836 * won't turn the board on before the rest of config space is ready.
3837 */
3838 pci_disable_device(pdev);
3839 pci_save_state(pdev);
3840
3841 /* find the first memory BAR, so we can find the cfg table */
3842 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3843 if (rc)
3844 return rc;
3845 vaddr = remap_pci_mem(paddr, 0x250);
3846 if (!vaddr)
3847 return -ENOMEM;
3848
3849 /* find cfgtable in order to check if reset via doorbell is supported */
3850 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3851 &cfg_base_addr_index, &cfg_offset);
3852 if (rc)
3853 goto unmap_vaddr;
3854 cfgtable = remap_pci_mem(pci_resource_start(pdev,
3855 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3856 if (!cfgtable) {
3857 rc = -ENOMEM;
3858 goto unmap_vaddr;
3859 }
3860 rc = write_driver_ver_to_cfgtable(cfgtable);
3861 if (rc)
3862 goto unmap_vaddr;
3863
3864 /* If reset via doorbell register is supported, use that.
3865 * There are two such methods. Favor the newest method.
3866 */
3867 misc_fw_support = readl(&cfgtable->misc_fw_support);
3868 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3869 if (use_doorbell) {
3870 use_doorbell = DOORBELL_CTLR_RESET2;
3871 } else {
3872 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3873 if (use_doorbell) {
3874 dev_warn(&pdev->dev, "Soft reset not supported. "
3875 "Firmware update is required.\n");
3876 rc = -ENOTSUPP; /* try soft reset */
3877 goto unmap_cfgtable;
3878 }
3879 }
3880
3881 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3882 if (rc)
3883 goto unmap_cfgtable;
3884
3885 pci_restore_state(pdev);
3886 rc = pci_enable_device(pdev);
3887 if (rc) {
3888 dev_warn(&pdev->dev, "failed to enable device.\n");
3889 goto unmap_cfgtable;
3890 }
3891 pci_write_config_word(pdev, 4, command_register);
3892
3893 /* Some devices (notably the HP Smart Array 5i Controller)
3894 need a little pause here */
3895 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3896
3897 /* Wait for board to become not ready, then ready. */
3898 dev_info(&pdev->dev, "Waiting for board to reset.\n");
3899 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3900 if (rc) {
3901 dev_warn(&pdev->dev,
3902 "failed waiting for board to reset."
3903 " Will try soft reset.\n");
3904 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3905 goto unmap_cfgtable;
3906 }
3907 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3908 if (rc) {
3909 dev_warn(&pdev->dev,
3910 "failed waiting for board to become ready "
3911 "after hard reset\n");
3912 goto unmap_cfgtable;
3913 }
3914
3915 rc = controller_reset_failed(vaddr);
3916 if (rc < 0)
3917 goto unmap_cfgtable;
3918 if (rc) {
3919 dev_warn(&pdev->dev, "Unable to successfully reset "
3920 "controller. Will try soft reset.\n");
3921 rc = -ENOTSUPP;
3922 } else {
3923 dev_info(&pdev->dev, "board ready after hard reset.\n");
3924 }
3925
3926 unmap_cfgtable:
3927 iounmap(cfgtable);
3928
3929 unmap_vaddr:
3930 iounmap(vaddr);
3931 return rc;
3932 }
3933
3934 /*
3935 * We cannot read the structure directly, for portability we must use
3936 * the io functions.
3937 * This is for debug only.
3938 */
3939 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3940 {
3941 #ifdef HPSA_DEBUG
3942 int i;
3943 char temp_name[17];
3944
3945 dev_info(dev, "Controller Configuration information\n");
3946 dev_info(dev, "------------------------------------\n");
3947 for (i = 0; i < 4; i++)
3948 temp_name[i] = readb(&(tb->Signature[i]));
3949 temp_name[4] = '\0';
3950 dev_info(dev, " Signature = %s\n", temp_name);
3951 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3952 dev_info(dev, " Transport methods supported = 0x%x\n",
3953 readl(&(tb->TransportSupport)));
3954 dev_info(dev, " Transport methods active = 0x%x\n",
3955 readl(&(tb->TransportActive)));
3956 dev_info(dev, " Requested transport Method = 0x%x\n",
3957 readl(&(tb->HostWrite.TransportRequest)));
3958 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3959 readl(&(tb->HostWrite.CoalIntDelay)));
3960 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3961 readl(&(tb->HostWrite.CoalIntCount)));
3962 dev_info(dev, " Max outstanding commands = 0x%d\n",
3963 readl(&(tb->CmdsOutMax)));
3964 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3965 for (i = 0; i < 16; i++)
3966 temp_name[i] = readb(&(tb->ServerName[i]));
3967 temp_name[16] = '\0';
3968 dev_info(dev, " Server Name = %s\n", temp_name);
3969 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3970 readl(&(tb->HeartBeat)));
3971 #endif /* HPSA_DEBUG */
3972 }
3973
3974 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3975 {
3976 int i, offset, mem_type, bar_type;
3977
3978 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3979 return 0;
3980 offset = 0;
3981 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3982 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3983 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3984 offset += 4;
3985 else {
3986 mem_type = pci_resource_flags(pdev, i) &
3987 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3988 switch (mem_type) {
3989 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3990 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3991 offset += 4; /* 32 bit */
3992 break;
3993 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3994 offset += 8;
3995 break;
3996 default: /* reserved in PCI 2.2 */
3997 dev_warn(&pdev->dev,
3998 "base address is invalid\n");
3999 return -1;
4000 break;
4001 }
4002 }
4003 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4004 return i + 1;
4005 }
4006 return -1;
4007 }
4008
4009 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4010 * controllers that are capable. If not, we use IO-APIC mode.
4011 */
4012
4013 static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
4014 {
4015 #ifdef CONFIG_PCI_MSI
4016 int err, i;
4017 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4018
4019 for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4020 hpsa_msix_entries[i].vector = 0;
4021 hpsa_msix_entries[i].entry = i;
4022 }
4023
4024 /* Some boards advertise MSI but don't really support it */
4025 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4026 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4027 goto default_int_mode;
4028 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4029 dev_info(&h->pdev->dev, "MSIX\n");
4030 err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4031 MAX_REPLY_QUEUES);
4032 if (!err) {
4033 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4034 h->intr[i] = hpsa_msix_entries[i].vector;
4035 h->msix_vector = 1;
4036 return;
4037 }
4038 if (err > 0) {
4039 dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
4040 "available\n", err);
4041 goto default_int_mode;
4042 } else {
4043 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
4044 err);
4045 goto default_int_mode;
4046 }
4047 }
4048 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4049 dev_info(&h->pdev->dev, "MSI\n");
4050 if (!pci_enable_msi(h->pdev))
4051 h->msi_vector = 1;
4052 else
4053 dev_warn(&h->pdev->dev, "MSI init failed\n");
4054 }
4055 default_int_mode:
4056 #endif /* CONFIG_PCI_MSI */
4057 /* if we get here we're going to use the default interrupt mode */
4058 h->intr[h->intr_mode] = h->pdev->irq;
4059 }
4060
4061 static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4062 {
4063 int i;
4064 u32 subsystem_vendor_id, subsystem_device_id;
4065
4066 subsystem_vendor_id = pdev->subsystem_vendor;
4067 subsystem_device_id = pdev->subsystem_device;
4068 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4069 subsystem_vendor_id;
4070
4071 for (i = 0; i < ARRAY_SIZE(products); i++)
4072 if (*board_id == products[i].board_id)
4073 return i;
4074
4075 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4076 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4077 !hpsa_allow_any) {
4078 dev_warn(&pdev->dev, "unrecognized board ID: "
4079 "0x%08x, ignoring.\n", *board_id);
4080 return -ENODEV;
4081 }
4082 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4083 }
4084
4085 static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4086 unsigned long *memory_bar)
4087 {
4088 int i;
4089
4090 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4091 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4092 /* addressing mode bits already removed */
4093 *memory_bar = pci_resource_start(pdev, i);
4094 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4095 *memory_bar);
4096 return 0;
4097 }
4098 dev_warn(&pdev->dev, "no memory BAR found\n");
4099 return -ENODEV;
4100 }
4101
4102 static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
4103 void __iomem *vaddr, int wait_for_ready)
4104 {
4105 int i, iterations;
4106 u32 scratchpad;
4107 if (wait_for_ready)
4108 iterations = HPSA_BOARD_READY_ITERATIONS;
4109 else
4110 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
4111
4112 for (i = 0; i < iterations; i++) {
4113 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4114 if (wait_for_ready) {
4115 if (scratchpad == HPSA_FIRMWARE_READY)
4116 return 0;
4117 } else {
4118 if (scratchpad != HPSA_FIRMWARE_READY)
4119 return 0;
4120 }
4121 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4122 }
4123 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4124 return -ENODEV;
4125 }
4126
4127 static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
4128 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4129 u64 *cfg_offset)
4130 {
4131 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4132 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4133 *cfg_base_addr &= (u32) 0x0000ffff;
4134 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4135 if (*cfg_base_addr_index == -1) {
4136 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4137 return -ENODEV;
4138 }
4139 return 0;
4140 }
4141
4142 static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
4143 {
4144 u64 cfg_offset;
4145 u32 cfg_base_addr;
4146 u64 cfg_base_addr_index;
4147 u32 trans_offset;
4148 int rc;
4149
4150 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4151 &cfg_base_addr_index, &cfg_offset);
4152 if (rc)
4153 return rc;
4154 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4155 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4156 if (!h->cfgtable)
4157 return -ENOMEM;
4158 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4159 if (rc)
4160 return rc;
4161 /* Find performant mode table. */
4162 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4163 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4164 cfg_base_addr_index)+cfg_offset+trans_offset,
4165 sizeof(*h->transtable));
4166 if (!h->transtable)
4167 return -ENOMEM;
4168 return 0;
4169 }
4170
4171 static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
4172 {
4173 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4174
4175 /* Limit commands in memory limited kdump scenario. */
4176 if (reset_devices && h->max_commands > 32)
4177 h->max_commands = 32;
4178
4179 if (h->max_commands < 16) {
4180 dev_warn(&h->pdev->dev, "Controller reports "
4181 "max supported commands of %d, an obvious lie. "
4182 "Using 16. Ensure that firmware is up to date.\n",
4183 h->max_commands);
4184 h->max_commands = 16;
4185 }
4186 }
4187
4188 /* Interrogate the hardware for some limits:
4189 * max commands, max SG elements without chaining, and with chaining,
4190 * SG chain block size, etc.
4191 */
4192 static void __devinit hpsa_find_board_params(struct ctlr_info *h)
4193 {
4194 hpsa_get_max_perf_mode_cmds(h);
4195 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4196 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4197 /*
4198 * Limit in-command s/g elements to 32 save dma'able memory.
4199 * Howvever spec says if 0, use 31
4200 */
4201 h->max_cmd_sg_entries = 31;
4202 if (h->maxsgentries > 512) {
4203 h->max_cmd_sg_entries = 32;
4204 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4205 h->maxsgentries--; /* save one for chain pointer */
4206 } else {
4207 h->maxsgentries = 31; /* default to traditional values */
4208 h->chainsize = 0;
4209 }
4210
4211 /* Find out what task management functions are supported and cache */
4212 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
4213 }
4214
4215 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4216 {
4217 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4218 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4219 return false;
4220 }
4221 return true;
4222 }
4223
4224 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4225 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4226 {
4227 #ifdef CONFIG_X86
4228 u32 prefetch;
4229
4230 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4231 prefetch |= 0x100;
4232 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4233 #endif
4234 }
4235
4236 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4237 * in a prefetch beyond physical memory.
4238 */
4239 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4240 {
4241 u32 dma_prefetch;
4242
4243 if (h->board_id != 0x3225103C)
4244 return;
4245 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4246 dma_prefetch |= 0x8000;
4247 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4248 }
4249
4250 static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
4251 {
4252 int i;
4253 u32 doorbell_value;
4254 unsigned long flags;
4255
4256 /* under certain very rare conditions, this can take awhile.
4257 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4258 * as we enter this code.)
4259 */
4260 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
4261 spin_lock_irqsave(&h->lock, flags);
4262 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4263 spin_unlock_irqrestore(&h->lock, flags);
4264 if (!(doorbell_value & CFGTBL_ChangeReq))
4265 break;
4266 /* delay and try again */
4267 usleep_range(10000, 20000);
4268 }
4269 }
4270
4271 static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
4272 {
4273 u32 trans_support;
4274
4275 trans_support = readl(&(h->cfgtable->TransportSupport));
4276 if (!(trans_support & SIMPLE_MODE))
4277 return -ENOTSUPP;
4278
4279 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4280 /* Update the field, and then ring the doorbell */
4281 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4282 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4283 hpsa_wait_for_mode_change_ack(h);
4284 print_cfg_table(&h->pdev->dev, h->cfgtable);
4285 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4286 dev_warn(&h->pdev->dev,
4287 "unable to get board into simple mode\n");
4288 return -ENODEV;
4289 }
4290 h->transMethod = CFGTBL_Trans_Simple;
4291 return 0;
4292 }
4293
4294 static int __devinit hpsa_pci_init(struct ctlr_info *h)
4295 {
4296 int prod_index, err;
4297
4298 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4299 if (prod_index < 0)
4300 return -ENODEV;
4301 h->product_name = products[prod_index].product_name;
4302 h->access = *(products[prod_index].access);
4303
4304 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4305 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4306
4307 err = pci_enable_device(h->pdev);
4308 if (err) {
4309 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
4310 return err;
4311 }
4312
4313 /* Enable bus mastering (pci_disable_device may disable this) */
4314 pci_set_master(h->pdev);
4315
4316 err = pci_request_regions(h->pdev, HPSA);
4317 if (err) {
4318 dev_err(&h->pdev->dev,
4319 "cannot obtain PCI resources, aborting\n");
4320 return err;
4321 }
4322 hpsa_interrupt_mode(h);
4323 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
4324 if (err)
4325 goto err_out_free_res;
4326 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4327 if (!h->vaddr) {
4328 err = -ENOMEM;
4329 goto err_out_free_res;
4330 }
4331 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4332 if (err)
4333 goto err_out_free_res;
4334 err = hpsa_find_cfgtables(h);
4335 if (err)
4336 goto err_out_free_res;
4337 hpsa_find_board_params(h);
4338
4339 if (!hpsa_CISS_signature_present(h)) {
4340 err = -ENODEV;
4341 goto err_out_free_res;
4342 }
4343 hpsa_enable_scsi_prefetch(h);
4344 hpsa_p600_dma_prefetch_quirk(h);
4345 err = hpsa_enter_simple_mode(h);
4346 if (err)
4347 goto err_out_free_res;
4348 return 0;
4349
4350 err_out_free_res:
4351 if (h->transtable)
4352 iounmap(h->transtable);
4353 if (h->cfgtable)
4354 iounmap(h->cfgtable);
4355 if (h->vaddr)
4356 iounmap(h->vaddr);
4357 pci_disable_device(h->pdev);
4358 pci_release_regions(h->pdev);
4359 return err;
4360 }
4361
4362 static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
4363 {
4364 int rc;
4365
4366 #define HBA_INQUIRY_BYTE_COUNT 64
4367 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4368 if (!h->hba_inquiry_data)
4369 return;
4370 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4371 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4372 if (rc != 0) {
4373 kfree(h->hba_inquiry_data);
4374 h->hba_inquiry_data = NULL;
4375 }
4376 }
4377
4378 static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
4379 {
4380 int rc, i;
4381
4382 if (!reset_devices)
4383 return 0;
4384
4385 /* Reset the controller with a PCI power-cycle or via doorbell */
4386 rc = hpsa_kdump_hard_reset_controller(pdev);
4387
4388 /* -ENOTSUPP here means we cannot reset the controller
4389 * but it's already (and still) up and running in
4390 * "performant mode". Or, it might be 640x, which can't reset
4391 * due to concerns about shared bbwc between 6402/6404 pair.
4392 */
4393 if (rc == -ENOTSUPP)
4394 return rc; /* just try to do the kdump anyhow. */
4395 if (rc)
4396 return -ENODEV;
4397
4398 /* Now try to get the controller to respond to a no-op */
4399 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4400 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4401 if (hpsa_noop(pdev) == 0)
4402 break;
4403 else
4404 dev_warn(&pdev->dev, "no-op failed%s\n",
4405 (i < 11 ? "; re-trying" : ""));
4406 }
4407 return 0;
4408 }
4409
4410 static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4411 {
4412 h->cmd_pool_bits = kzalloc(
4413 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4414 sizeof(unsigned long), GFP_KERNEL);
4415 h->cmd_pool = pci_alloc_consistent(h->pdev,
4416 h->nr_cmds * sizeof(*h->cmd_pool),
4417 &(h->cmd_pool_dhandle));
4418 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4419 h->nr_cmds * sizeof(*h->errinfo_pool),
4420 &(h->errinfo_pool_dhandle));
4421 if ((h->cmd_pool_bits == NULL)
4422 || (h->cmd_pool == NULL)
4423 || (h->errinfo_pool == NULL)) {
4424 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4425 return -ENOMEM;
4426 }
4427 return 0;
4428 }
4429
4430 static void hpsa_free_cmd_pool(struct ctlr_info *h)
4431 {
4432 kfree(h->cmd_pool_bits);
4433 if (h->cmd_pool)
4434 pci_free_consistent(h->pdev,
4435 h->nr_cmds * sizeof(struct CommandList),
4436 h->cmd_pool, h->cmd_pool_dhandle);
4437 if (h->errinfo_pool)
4438 pci_free_consistent(h->pdev,
4439 h->nr_cmds * sizeof(struct ErrorInfo),
4440 h->errinfo_pool,
4441 h->errinfo_pool_dhandle);
4442 }
4443
4444 static int hpsa_request_irq(struct ctlr_info *h,
4445 irqreturn_t (*msixhandler)(int, void *),
4446 irqreturn_t (*intxhandler)(int, void *))
4447 {
4448 int rc, i;
4449
4450 /*
4451 * initialize h->q[x] = x so that interrupt handlers know which
4452 * queue to process.
4453 */
4454 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4455 h->q[i] = (u8) i;
4456
4457 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4458 /* If performant mode and MSI-X, use multiple reply queues */
4459 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4460 rc = request_irq(h->intr[i], msixhandler,
4461 0, h->devname,
4462 &h->q[i]);
4463 } else {
4464 /* Use single reply pool */
4465 if (h->msix_vector || h->msi_vector) {
4466 rc = request_irq(h->intr[h->intr_mode],
4467 msixhandler, 0, h->devname,
4468 &h->q[h->intr_mode]);
4469 } else {
4470 rc = request_irq(h->intr[h->intr_mode],
4471 intxhandler, IRQF_SHARED, h->devname,
4472 &h->q[h->intr_mode]);
4473 }
4474 }
4475 if (rc) {
4476 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4477 h->intr[h->intr_mode], h->devname);
4478 return -ENODEV;
4479 }
4480 return 0;
4481 }
4482
4483 static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
4484 {
4485 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4486 HPSA_RESET_TYPE_CONTROLLER)) {
4487 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4488 return -EIO;
4489 }
4490
4491 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4492 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4493 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4494 return -1;
4495 }
4496
4497 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4498 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4499 dev_warn(&h->pdev->dev, "Board failed to become ready "
4500 "after soft reset.\n");
4501 return -1;
4502 }
4503
4504 return 0;
4505 }
4506
4507 static void free_irqs(struct ctlr_info *h)
4508 {
4509 int i;
4510
4511 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4512 /* Single reply queue, only one irq to free */
4513 i = h->intr_mode;
4514 free_irq(h->intr[i], &h->q[i]);
4515 return;
4516 }
4517
4518 for (i = 0; i < MAX_REPLY_QUEUES; i++)
4519 free_irq(h->intr[i], &h->q[i]);
4520 }
4521
4522 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
4523 {
4524 free_irqs(h);
4525 #ifdef CONFIG_PCI_MSI
4526 if (h->msix_vector) {
4527 if (h->pdev->msix_enabled)
4528 pci_disable_msix(h->pdev);
4529 } else if (h->msi_vector) {
4530 if (h->pdev->msi_enabled)
4531 pci_disable_msi(h->pdev);
4532 }
4533 #endif /* CONFIG_PCI_MSI */
4534 }
4535
4536 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4537 {
4538 hpsa_free_irqs_and_disable_msix(h);
4539 hpsa_free_sg_chain_blocks(h);
4540 hpsa_free_cmd_pool(h);
4541 kfree(h->blockFetchTable);
4542 pci_free_consistent(h->pdev, h->reply_pool_size,
4543 h->reply_pool, h->reply_pool_dhandle);
4544 if (h->vaddr)
4545 iounmap(h->vaddr);
4546 if (h->transtable)
4547 iounmap(h->transtable);
4548 if (h->cfgtable)
4549 iounmap(h->cfgtable);
4550 pci_release_regions(h->pdev);
4551 kfree(h);
4552 }
4553
4554 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4555 {
4556 assert_spin_locked(&lockup_detector_lock);
4557 if (!hpsa_lockup_detector)
4558 return;
4559 if (h->lockup_detected)
4560 return; /* already stopped the lockup detector */
4561 list_del(&h->lockup_list);
4562 }
4563
4564 /* Called when controller lockup detected. */
4565 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4566 {
4567 struct CommandList *c = NULL;
4568
4569 assert_spin_locked(&h->lock);
4570 /* Mark all outstanding commands as failed and complete them. */
4571 while (!list_empty(list)) {
4572 c = list_entry(list->next, struct CommandList, list);
4573 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4574 finish_cmd(c);
4575 }
4576 }
4577
4578 static void controller_lockup_detected(struct ctlr_info *h)
4579 {
4580 unsigned long flags;
4581
4582 assert_spin_locked(&lockup_detector_lock);
4583 remove_ctlr_from_lockup_detector_list(h);
4584 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4585 spin_lock_irqsave(&h->lock, flags);
4586 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4587 spin_unlock_irqrestore(&h->lock, flags);
4588 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4589 h->lockup_detected);
4590 pci_disable_device(h->pdev);
4591 spin_lock_irqsave(&h->lock, flags);
4592 fail_all_cmds_on_list(h, &h->cmpQ);
4593 fail_all_cmds_on_list(h, &h->reqQ);
4594 spin_unlock_irqrestore(&h->lock, flags);
4595 }
4596
4597 static void detect_controller_lockup(struct ctlr_info *h)
4598 {
4599 u64 now;
4600 u32 heartbeat;
4601 unsigned long flags;
4602
4603 assert_spin_locked(&lockup_detector_lock);
4604 now = get_jiffies_64();
4605 /* If we've received an interrupt recently, we're ok. */
4606 if (time_after64(h->last_intr_timestamp +
4607 (h->heartbeat_sample_interval), now))
4608 return;
4609
4610 /*
4611 * If we've already checked the heartbeat recently, we're ok.
4612 * This could happen if someone sends us a signal. We
4613 * otherwise don't care about signals in this thread.
4614 */
4615 if (time_after64(h->last_heartbeat_timestamp +
4616 (h->heartbeat_sample_interval), now))
4617 return;
4618
4619 /* If heartbeat has not changed since we last looked, we're not ok. */
4620 spin_lock_irqsave(&h->lock, flags);
4621 heartbeat = readl(&h->cfgtable->HeartBeat);
4622 spin_unlock_irqrestore(&h->lock, flags);
4623 if (h->last_heartbeat == heartbeat) {
4624 controller_lockup_detected(h);
4625 return;
4626 }
4627
4628 /* We're ok. */
4629 h->last_heartbeat = heartbeat;
4630 h->last_heartbeat_timestamp = now;
4631 }
4632
4633 static int detect_controller_lockup_thread(void *notused)
4634 {
4635 struct ctlr_info *h;
4636 unsigned long flags;
4637
4638 while (1) {
4639 struct list_head *this, *tmp;
4640
4641 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4642 if (kthread_should_stop())
4643 break;
4644 spin_lock_irqsave(&lockup_detector_lock, flags);
4645 list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4646 h = list_entry(this, struct ctlr_info, lockup_list);
4647 detect_controller_lockup(h);
4648 }
4649 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4650 }
4651 return 0;
4652 }
4653
4654 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4655 {
4656 unsigned long flags;
4657
4658 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
4659 spin_lock_irqsave(&lockup_detector_lock, flags);
4660 list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4661 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4662 }
4663
4664 static void start_controller_lockup_detector(struct ctlr_info *h)
4665 {
4666 /* Start the lockup detector thread if not already started */
4667 if (!hpsa_lockup_detector) {
4668 spin_lock_init(&lockup_detector_lock);
4669 hpsa_lockup_detector =
4670 kthread_run(detect_controller_lockup_thread,
4671 NULL, HPSA);
4672 }
4673 if (!hpsa_lockup_detector) {
4674 dev_warn(&h->pdev->dev,
4675 "Could not start lockup detector thread\n");
4676 return;
4677 }
4678 add_ctlr_to_lockup_detector_list(h);
4679 }
4680
4681 static void stop_controller_lockup_detector(struct ctlr_info *h)
4682 {
4683 unsigned long flags;
4684
4685 spin_lock_irqsave(&lockup_detector_lock, flags);
4686 remove_ctlr_from_lockup_detector_list(h);
4687 /* If the list of ctlr's to monitor is empty, stop the thread */
4688 if (list_empty(&hpsa_ctlr_list)) {
4689 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4690 kthread_stop(hpsa_lockup_detector);
4691 spin_lock_irqsave(&lockup_detector_lock, flags);
4692 hpsa_lockup_detector = NULL;
4693 }
4694 spin_unlock_irqrestore(&lockup_detector_lock, flags);
4695 }
4696
4697 static int __devinit hpsa_init_one(struct pci_dev *pdev,
4698 const struct pci_device_id *ent)
4699 {
4700 int dac, rc;
4701 struct ctlr_info *h;
4702 int try_soft_reset = 0;
4703 unsigned long flags;
4704
4705 if (number_of_controllers == 0)
4706 printk(KERN_INFO DRIVER_NAME "\n");
4707
4708 rc = hpsa_init_reset_devices(pdev);
4709 if (rc) {
4710 if (rc != -ENOTSUPP)
4711 return rc;
4712 /* If the reset fails in a particular way (it has no way to do
4713 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4714 * a soft reset once we get the controller configured up to the
4715 * point that it can accept a command.
4716 */
4717 try_soft_reset = 1;
4718 rc = 0;
4719 }
4720
4721 reinit_after_soft_reset:
4722
4723 /* Command structures must be aligned on a 32-byte boundary because
4724 * the 5 lower bits of the address are used by the hardware. and by
4725 * the driver. See comments in hpsa.h for more info.
4726 */
4727 #define COMMANDLIST_ALIGNMENT 32
4728 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
4729 h = kzalloc(sizeof(*h), GFP_KERNEL);
4730 if (!h)
4731 return -ENOMEM;
4732
4733 h->pdev = pdev;
4734 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4735 INIT_LIST_HEAD(&h->cmpQ);
4736 INIT_LIST_HEAD(&h->reqQ);
4737 spin_lock_init(&h->lock);
4738 spin_lock_init(&h->scan_lock);
4739 rc = hpsa_pci_init(h);
4740 if (rc != 0)
4741 goto clean1;
4742
4743 sprintf(h->devname, HPSA "%d", number_of_controllers);
4744 h->ctlr = number_of_controllers;
4745 number_of_controllers++;
4746
4747 /* configure PCI DMA stuff */
4748 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4749 if (rc == 0) {
4750 dac = 1;
4751 } else {
4752 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4753 if (rc == 0) {
4754 dac = 0;
4755 } else {
4756 dev_err(&pdev->dev, "no suitable DMA available\n");
4757 goto clean1;
4758 }
4759 }
4760
4761 /* make sure the board interrupts are off */
4762 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4763
4764 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
4765 goto clean2;
4766 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4767 h->devname, pdev->device,
4768 h->intr[h->intr_mode], dac ? "" : " not");
4769 if (hpsa_allocate_cmd_pool(h))
4770 goto clean4;
4771 if (hpsa_allocate_sg_chain_blocks(h))
4772 goto clean4;
4773 init_waitqueue_head(&h->scan_wait_queue);
4774 h->scan_finished = 1; /* no scan currently in progress */
4775
4776 pci_set_drvdata(pdev, h);
4777 h->ndevices = 0;
4778 h->scsi_host = NULL;
4779 spin_lock_init(&h->devlock);
4780 hpsa_put_ctlr_into_performant_mode(h);
4781
4782 /* At this point, the controller is ready to take commands.
4783 * Now, if reset_devices and the hard reset didn't work, try
4784 * the soft reset and see if that works.
4785 */
4786 if (try_soft_reset) {
4787
4788 /* This is kind of gross. We may or may not get a completion
4789 * from the soft reset command, and if we do, then the value
4790 * from the fifo may or may not be valid. So, we wait 10 secs
4791 * after the reset throwing away any completions we get during
4792 * that time. Unregister the interrupt handler and register
4793 * fake ones to scoop up any residual completions.
4794 */
4795 spin_lock_irqsave(&h->lock, flags);
4796 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4797 spin_unlock_irqrestore(&h->lock, flags);
4798 free_irqs(h);
4799 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4800 hpsa_intx_discard_completions);
4801 if (rc) {
4802 dev_warn(&h->pdev->dev, "Failed to request_irq after "
4803 "soft reset.\n");
4804 goto clean4;
4805 }
4806
4807 rc = hpsa_kdump_soft_reset(h);
4808 if (rc)
4809 /* Neither hard nor soft reset worked, we're hosed. */
4810 goto clean4;
4811
4812 dev_info(&h->pdev->dev, "Board READY.\n");
4813 dev_info(&h->pdev->dev,
4814 "Waiting for stale completions to drain.\n");
4815 h->access.set_intr_mask(h, HPSA_INTR_ON);
4816 msleep(10000);
4817 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4818
4819 rc = controller_reset_failed(h->cfgtable);
4820 if (rc)
4821 dev_info(&h->pdev->dev,
4822 "Soft reset appears to have failed.\n");
4823
4824 /* since the controller's reset, we have to go back and re-init
4825 * everything. Easiest to just forget what we've done and do it
4826 * all over again.
4827 */
4828 hpsa_undo_allocations_after_kdump_soft_reset(h);
4829 try_soft_reset = 0;
4830 if (rc)
4831 /* don't go to clean4, we already unallocated */
4832 return -ENODEV;
4833
4834 goto reinit_after_soft_reset;
4835 }
4836
4837 /* Turn the interrupts on so we can service requests */
4838 h->access.set_intr_mask(h, HPSA_INTR_ON);
4839
4840 hpsa_hba_inquiry(h);
4841 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
4842 start_controller_lockup_detector(h);
4843 return 1;
4844
4845 clean4:
4846 hpsa_free_sg_chain_blocks(h);
4847 hpsa_free_cmd_pool(h);
4848 free_irqs(h);
4849 clean2:
4850 clean1:
4851 kfree(h);
4852 return rc;
4853 }
4854
4855 static void hpsa_flush_cache(struct ctlr_info *h)
4856 {
4857 char *flush_buf;
4858 struct CommandList *c;
4859
4860 flush_buf = kzalloc(4, GFP_KERNEL);
4861 if (!flush_buf)
4862 return;
4863
4864 c = cmd_special_alloc(h);
4865 if (!c) {
4866 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4867 goto out_of_memory;
4868 }
4869 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4870 RAID_CTLR_LUNID, TYPE_CMD);
4871 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4872 if (c->err_info->CommandStatus != 0)
4873 dev_warn(&h->pdev->dev,
4874 "error flushing cache on controller\n");
4875 cmd_special_free(h, c);
4876 out_of_memory:
4877 kfree(flush_buf);
4878 }
4879
4880 static void hpsa_shutdown(struct pci_dev *pdev)
4881 {
4882 struct ctlr_info *h;
4883
4884 h = pci_get_drvdata(pdev);
4885 /* Turn board interrupts off and send the flush cache command
4886 * sendcmd will turn off interrupt, and send the flush...
4887 * To write all data in the battery backed cache to disks
4888 */
4889 hpsa_flush_cache(h);
4890 h->access.set_intr_mask(h, HPSA_INTR_OFF);
4891 hpsa_free_irqs_and_disable_msix(h);
4892 }
4893
4894 static void __devexit hpsa_free_device_info(struct ctlr_info *h)
4895 {
4896 int i;
4897
4898 for (i = 0; i < h->ndevices; i++)
4899 kfree(h->dev[i]);
4900 }
4901
4902 static void __devexit hpsa_remove_one(struct pci_dev *pdev)
4903 {
4904 struct ctlr_info *h;
4905
4906 if (pci_get_drvdata(pdev) == NULL) {
4907 dev_err(&pdev->dev, "unable to remove device\n");
4908 return;
4909 }
4910 h = pci_get_drvdata(pdev);
4911 stop_controller_lockup_detector(h);
4912 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
4913 hpsa_shutdown(pdev);
4914 iounmap(h->vaddr);
4915 iounmap(h->transtable);
4916 iounmap(h->cfgtable);
4917 hpsa_free_device_info(h);
4918 hpsa_free_sg_chain_blocks(h);
4919 pci_free_consistent(h->pdev,
4920 h->nr_cmds * sizeof(struct CommandList),
4921 h->cmd_pool, h->cmd_pool_dhandle);
4922 pci_free_consistent(h->pdev,
4923 h->nr_cmds * sizeof(struct ErrorInfo),
4924 h->errinfo_pool, h->errinfo_pool_dhandle);
4925 pci_free_consistent(h->pdev, h->reply_pool_size,
4926 h->reply_pool, h->reply_pool_dhandle);
4927 kfree(h->cmd_pool_bits);
4928 kfree(h->blockFetchTable);
4929 kfree(h->hba_inquiry_data);
4930 pci_disable_device(pdev);
4931 pci_release_regions(pdev);
4932 pci_set_drvdata(pdev, NULL);
4933 kfree(h);
4934 }
4935
4936 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4937 __attribute__((unused)) pm_message_t state)
4938 {
4939 return -ENOSYS;
4940 }
4941
4942 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4943 {
4944 return -ENOSYS;
4945 }
4946
4947 static struct pci_driver hpsa_pci_driver = {
4948 .name = HPSA,
4949 .probe = hpsa_init_one,
4950 .remove = __devexit_p(hpsa_remove_one),
4951 .id_table = hpsa_pci_device_id, /* id_table */
4952 .shutdown = hpsa_shutdown,
4953 .suspend = hpsa_suspend,
4954 .resume = hpsa_resume,
4955 };
4956
4957 /* Fill in bucket_map[], given nsgs (the max number of
4958 * scatter gather elements supported) and bucket[],
4959 * which is an array of 8 integers. The bucket[] array
4960 * contains 8 different DMA transfer sizes (in 16
4961 * byte increments) which the controller uses to fetch
4962 * commands. This function fills in bucket_map[], which
4963 * maps a given number of scatter gather elements to one of
4964 * the 8 DMA transfer sizes. The point of it is to allow the
4965 * controller to only do as much DMA as needed to fetch the
4966 * command, with the DMA transfer size encoded in the lower
4967 * bits of the command address.
4968 */
4969 static void calc_bucket_map(int bucket[], int num_buckets,
4970 int nsgs, int *bucket_map)
4971 {
4972 int i, j, b, size;
4973
4974 /* even a command with 0 SGs requires 4 blocks */
4975 #define MINIMUM_TRANSFER_BLOCKS 4
4976 #define NUM_BUCKETS 8
4977 /* Note, bucket_map must have nsgs+1 entries. */
4978 for (i = 0; i <= nsgs; i++) {
4979 /* Compute size of a command with i SG entries */
4980 size = i + MINIMUM_TRANSFER_BLOCKS;
4981 b = num_buckets; /* Assume the biggest bucket */
4982 /* Find the bucket that is just big enough */
4983 for (j = 0; j < 8; j++) {
4984 if (bucket[j] >= size) {
4985 b = j;
4986 break;
4987 }
4988 }
4989 /* for a command with i SG entries, use bucket b. */
4990 bucket_map[i] = b;
4991 }
4992 }
4993
4994 static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
4995 u32 use_short_tags)
4996 {
4997 int i;
4998 unsigned long register_value;
4999
5000 /* This is a bit complicated. There are 8 registers on
5001 * the controller which we write to to tell it 8 different
5002 * sizes of commands which there may be. It's a way of
5003 * reducing the DMA done to fetch each command. Encoded into
5004 * each command's tag are 3 bits which communicate to the controller
5005 * which of the eight sizes that command fits within. The size of
5006 * each command depends on how many scatter gather entries there are.
5007 * Each SG entry requires 16 bytes. The eight registers are programmed
5008 * with the number of 16-byte blocks a command of that size requires.
5009 * The smallest command possible requires 5 such 16 byte blocks.
5010 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
5011 * blocks. Note, this only extends to the SG entries contained
5012 * within the command block, and does not extend to chained blocks
5013 * of SG elements. bft[] contains the eight values we write to
5014 * the registers. They are not evenly distributed, but have more
5015 * sizes for small commands, and fewer sizes for larger commands.
5016 */
5017 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5018 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
5019 /* 5 = 1 s/g entry or 4k
5020 * 6 = 2 s/g entry or 8k
5021 * 8 = 4 s/g entry or 16k
5022 * 10 = 6 s/g entry or 24k
5023 */
5024
5025 /* Controller spec: zero out this buffer. */
5026 memset(h->reply_pool, 0, h->reply_pool_size);
5027
5028 bft[7] = SG_ENTRIES_IN_CMD + 4;
5029 calc_bucket_map(bft, ARRAY_SIZE(bft),
5030 SG_ENTRIES_IN_CMD, h->blockFetchTable);
5031 for (i = 0; i < 8; i++)
5032 writel(bft[i], &h->transtable->BlockFetch[i]);
5033
5034 /* size of controller ring buffer */
5035 writel(h->max_commands, &h->transtable->RepQSize);
5036 writel(h->nreply_queues, &h->transtable->RepQCount);
5037 writel(0, &h->transtable->RepQCtrAddrLow32);
5038 writel(0, &h->transtable->RepQCtrAddrHigh32);
5039
5040 for (i = 0; i < h->nreply_queues; i++) {
5041 writel(0, &h->transtable->RepQAddr[i].upper);
5042 writel(h->reply_pool_dhandle +
5043 (h->max_commands * sizeof(u64) * i),
5044 &h->transtable->RepQAddr[i].lower);
5045 }
5046
5047 writel(CFGTBL_Trans_Performant | use_short_tags |
5048 CFGTBL_Trans_enable_directed_msix,
5049 &(h->cfgtable->HostWrite.TransportRequest));
5050 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5051 hpsa_wait_for_mode_change_ack(h);
5052 register_value = readl(&(h->cfgtable->TransportActive));
5053 if (!(register_value & CFGTBL_Trans_Performant)) {
5054 dev_warn(&h->pdev->dev, "unable to get board into"
5055 " performant mode\n");
5056 return;
5057 }
5058 /* Change the access methods to the performant access methods */
5059 h->access = SA5_performant_access;
5060 h->transMethod = CFGTBL_Trans_Performant;
5061 }
5062
5063 static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
5064 {
5065 u32 trans_support;
5066 int i;
5067
5068 if (hpsa_simple_mode)
5069 return;
5070
5071 trans_support = readl(&(h->cfgtable->TransportSupport));
5072 if (!(trans_support & PERFORMANT_MODE))
5073 return;
5074
5075 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
5076 hpsa_get_max_perf_mode_cmds(h);
5077 /* Performant mode ring buffer and supporting data structures */
5078 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
5079 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5080 &(h->reply_pool_dhandle));
5081
5082 for (i = 0; i < h->nreply_queues; i++) {
5083 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5084 h->reply_queue[i].size = h->max_commands;
5085 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
5086 h->reply_queue[i].current_entry = 0;
5087 }
5088
5089 /* Need a block fetch table for performant mode */
5090 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
5091 sizeof(u32)), GFP_KERNEL);
5092
5093 if ((h->reply_pool == NULL)
5094 || (h->blockFetchTable == NULL))
5095 goto clean_up;
5096
5097 hpsa_enter_performant_mode(h,
5098 trans_support & CFGTBL_Trans_use_short_tags);
5099
5100 return;
5101
5102 clean_up:
5103 if (h->reply_pool)
5104 pci_free_consistent(h->pdev, h->reply_pool_size,
5105 h->reply_pool, h->reply_pool_dhandle);
5106 kfree(h->blockFetchTable);
5107 }
5108
5109 /*
5110 * This is it. Register the PCI driver information for the cards we control
5111 * the OS will call our registered routines when it finds one of our cards.
5112 */
5113 static int __init hpsa_init(void)
5114 {
5115 return pci_register_driver(&hpsa_pci_driver);
5116 }
5117
5118 static void __exit hpsa_cleanup(void)
5119 {
5120 pci_unregister_driver(&hpsa_pci_driver);
5121 }
5122
5123 module_init(hpsa_init);
5124 module_exit(hpsa_cleanup);
Linux ARM platform port for MOXA ART SoC