2 * Copyright (c) 2001 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * There's basically three types of memory:
25 * - data used only by the HCD ... kmalloc is fine
26 * - async and periodic schedules, shared by HC and HCD ... these
27 * need to use dma_pool or dma_alloc_coherent
28 * - driver buffers, read/written by HC ... single shot DMA mapped
30 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
31 * No memory seen by this driver is pageable.
34 /*-------------------------------------------------------------------------*/
36 /* Allocate the key transfer structures from the previously allocated pool */
38 static inline void ehci_qtd_init(struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
,
41 memset (qtd
, 0, sizeof *qtd
);
43 qtd
->hw_token
= cpu_to_hc32(ehci
, QTD_STS_HALT
);
44 qtd
->hw_next
= EHCI_LIST_END(ehci
);
45 qtd
->hw_alt_next
= EHCI_LIST_END(ehci
);
46 INIT_LIST_HEAD (&qtd
->qtd_list
);
49 static struct ehci_qtd
*ehci_qtd_alloc (struct ehci_hcd
*ehci
, gfp_t flags
)
54 qtd
= dma_pool_alloc (ehci
->qtd_pool
, flags
, &dma
);
56 ehci_qtd_init(ehci
, qtd
, dma
);
61 static inline void ehci_qtd_free (struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
)
63 dma_pool_free (ehci
->qtd_pool
, qtd
, qtd
->qtd_dma
);
67 static void qh_destroy(struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
69 /* clean qtds first, and know this is not linked */
70 if (!list_empty (&qh
->qtd_list
) || qh
->qh_next
.ptr
) {
71 ehci_dbg (ehci
, "unused qh not empty!\n");
75 ehci_qtd_free (ehci
, qh
->dummy
);
76 dma_pool_free(ehci
->qh_pool
, qh
->hw
, qh
->qh_dma
);
80 static struct ehci_qh
*ehci_qh_alloc (struct ehci_hcd
*ehci
, gfp_t flags
)
85 qh
= kzalloc(sizeof *qh
, GFP_ATOMIC
);
88 qh
->hw
= (struct ehci_qh_hw
*)
89 dma_pool_alloc(ehci
->qh_pool
, flags
, &dma
);
92 memset(qh
->hw
, 0, sizeof *qh
->hw
);
94 // INIT_LIST_HEAD (&qh->qh_list);
95 INIT_LIST_HEAD (&qh
->qtd_list
);
97 /* dummy td enables safe urb queuing */
98 qh
->dummy
= ehci_qtd_alloc (ehci
, flags
);
99 if (qh
->dummy
== NULL
) {
100 ehci_dbg (ehci
, "no dummy td\n");
106 dma_pool_free(ehci
->qh_pool
, qh
->hw
, qh
->qh_dma
);
112 /*-------------------------------------------------------------------------*/
114 /* The queue heads and transfer descriptors are managed from pools tied
115 * to each of the "per device" structures.
116 * This is the initialisation and cleanup code.
119 static void ehci_mem_cleanup (struct ehci_hcd
*ehci
)
122 qh_destroy(ehci
, ehci
->async
);
126 qh_destroy(ehci
, ehci
->dummy
);
129 /* DMA consistent memory and pools */
131 dma_pool_destroy (ehci
->qtd_pool
);
132 ehci
->qtd_pool
= NULL
;
135 dma_pool_destroy (ehci
->qh_pool
);
136 ehci
->qh_pool
= NULL
;
140 dma_pool_destroy (ehci
->itd_pool
);
141 ehci
->itd_pool
= NULL
;
144 dma_pool_destroy (ehci
->sitd_pool
);
145 ehci
->sitd_pool
= NULL
;
148 dma_free_coherent (ehci_to_hcd(ehci
)->self
.controller
,
149 ehci
->periodic_size
* sizeof (u32
),
150 ehci
->periodic
, ehci
->periodic_dma
);
151 ehci
->periodic
= NULL
;
153 /* shadow periodic table */
154 kfree(ehci
->pshadow
);
155 ehci
->pshadow
= NULL
;
158 /* remember to add cleanup code (above) if you add anything here */
159 static int ehci_mem_init (struct ehci_hcd
*ehci
, gfp_t flags
)
163 /* QTDs for control/bulk/intr transfers */
164 ehci
->qtd_pool
= dma_pool_create ("ehci_qtd",
165 ehci_to_hcd(ehci
)->self
.controller
,
166 sizeof (struct ehci_qtd
),
167 32 /* byte alignment (for hw parts) */,
168 4096 /* can't cross 4K */);
169 if (!ehci
->qtd_pool
) {
173 /* QHs for control/bulk/intr transfers */
174 ehci
->qh_pool
= dma_pool_create ("ehci_qh",
175 ehci_to_hcd(ehci
)->self
.controller
,
176 sizeof(struct ehci_qh_hw
),
177 32 /* byte alignment (for hw parts) */,
178 4096 /* can't cross 4K */);
179 if (!ehci
->qh_pool
) {
182 ehci
->async
= ehci_qh_alloc (ehci
, flags
);
187 /* ITD for high speed ISO transfers */
188 ehci
->itd_pool
= dma_pool_create ("ehci_itd",
189 ehci_to_hcd(ehci
)->self
.controller
,
190 sizeof (struct ehci_itd
),
191 32 /* byte alignment (for hw parts) */,
192 4096 /* can't cross 4K */);
193 if (!ehci
->itd_pool
) {
197 /* SITD for full/low speed split ISO transfers */
198 ehci
->sitd_pool
= dma_pool_create ("ehci_sitd",
199 ehci_to_hcd(ehci
)->self
.controller
,
200 sizeof (struct ehci_sitd
),
201 32 /* byte alignment (for hw parts) */,
202 4096 /* can't cross 4K */);
203 if (!ehci
->sitd_pool
) {
207 /* Hardware periodic table */
208 ehci
->periodic
= (__le32
*)
209 dma_alloc_coherent (ehci_to_hcd(ehci
)->self
.controller
,
210 ehci
->periodic_size
* sizeof(__le32
),
211 &ehci
->periodic_dma
, 0);
212 if (ehci
->periodic
== NULL
) {
216 if (ehci
->use_dummy_qh
) {
217 struct ehci_qh_hw
*hw
;
218 ehci
->dummy
= ehci_qh_alloc(ehci
, flags
);
222 hw
= ehci
->dummy
->hw
;
223 hw
->hw_next
= EHCI_LIST_END(ehci
);
224 hw
->hw_qtd_next
= EHCI_LIST_END(ehci
);
225 hw
->hw_alt_next
= EHCI_LIST_END(ehci
);
226 hw
->hw_token
&= ~QTD_STS_ACTIVE
;
227 ehci
->dummy
->hw
= hw
;
229 for (i
= 0; i
< ehci
->periodic_size
; i
++)
230 ehci
->periodic
[i
] = ehci
->dummy
->qh_dma
;
232 for (i
= 0; i
< ehci
->periodic_size
; i
++)
233 ehci
->periodic
[i
] = EHCI_LIST_END(ehci
);
236 /* software shadow of hardware table */
237 ehci
->pshadow
= kcalloc(ehci
->periodic_size
, sizeof(void *), flags
);
238 if (ehci
->pshadow
!= NULL
)
242 ehci_dbg (ehci
, "couldn't init memory\n");
243 ehci_mem_cleanup (ehci
);