2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk
;
38 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
39 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
56 u32 mask
, u32 done
, int usec
)
61 result
= xhci_readl(xhci
, ptr
);
62 if (result
== ~(u32
)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd
*xhci
)
83 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
87 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
89 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd
*xhci
)
103 xhci_dbg(xhci
, "// Halt the HC\n");
106 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
107 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
109 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
110 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
112 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd
*xhci
)
125 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
127 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
136 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
137 if (ret
== -ETIMEDOUT
)
138 xhci_err(xhci
, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd
*xhci
)
159 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
160 if ((state
& STS_HALT
) == 0) {
161 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci
, "// Reset the HC\n");
166 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
167 command
|= CMD_RESET
;
168 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
170 ret
= handshake(xhci
, &xhci
->op_regs
->command
,
171 CMD_RESET
, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
181 STS_CNR
, 0, 10 * 1000 * 1000);
183 for (i
= 0; i
< 2; ++i
) {
184 xhci
->bus_state
[i
].port_c_suspend
= 0;
185 xhci
->bus_state
[i
].suspended_ports
= 0;
186 xhci
->bus_state
[i
].resuming_ports
= 0;
193 static int xhci_free_msi(struct xhci_hcd
*xhci
)
197 if (!xhci
->msix_entries
)
200 for (i
= 0; i
< xhci
->msix_count
; i
++)
201 if (xhci
->msix_entries
[i
].vector
)
202 free_irq(xhci
->msix_entries
[i
].vector
,
210 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
213 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
215 ret
= pci_enable_msi(pdev
);
217 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
221 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
222 0, "xhci_hcd", xhci_to_hcd(xhci
));
224 xhci_dbg(xhci
, "disable MSI interrupt\n");
225 pci_disable_msi(pdev
);
233 * free all IRQs request
235 static void xhci_free_irq(struct xhci_hcd
*xhci
)
237 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
240 /* return if using legacy interrupt */
241 if (xhci_to_hcd(xhci
)->irq
> 0)
244 ret
= xhci_free_msi(xhci
);
248 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
256 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
259 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
260 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
263 * calculate number of msi-x vectors supported.
264 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
265 * with max number of interrupters based on the xhci HCSPARAMS1.
266 * - num_online_cpus: maximum msi-x vectors per CPUs core.
267 * Add additional 1 vector to ensure always available interrupt.
269 xhci
->msix_count
= min(num_online_cpus() + 1,
270 HCS_MAX_INTRS(xhci
->hcs_params1
));
273 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
275 if (!xhci
->msix_entries
) {
276 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
280 for (i
= 0; i
< xhci
->msix_count
; i
++) {
281 xhci
->msix_entries
[i
].entry
= i
;
282 xhci
->msix_entries
[i
].vector
= 0;
285 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
287 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
291 for (i
= 0; i
< xhci
->msix_count
; i
++) {
292 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
293 (irq_handler_t
)xhci_msi_irq
,
294 0, "xhci_hcd", xhci_to_hcd(xhci
));
299 hcd
->msix_enabled
= 1;
303 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
305 pci_disable_msix(pdev
);
307 kfree(xhci
->msix_entries
);
308 xhci
->msix_entries
= NULL
;
312 /* Free any IRQs and disable MSI-X */
313 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
315 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
316 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
320 if (xhci
->msix_entries
) {
321 pci_disable_msix(pdev
);
322 kfree(xhci
->msix_entries
);
323 xhci
->msix_entries
= NULL
;
325 pci_disable_msi(pdev
);
328 hcd
->msix_enabled
= 0;
332 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
336 if (xhci
->msix_entries
) {
337 for (i
= 0; i
< xhci
->msix_count
; i
++)
338 synchronize_irq(xhci
->msix_entries
[i
].vector
);
342 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
344 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
345 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
349 * Some Fresco Logic host controllers advertise MSI, but fail to
350 * generate interrupts. Don't even try to enable MSI.
352 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
355 /* unregister the legacy interrupt */
357 free_irq(hcd
->irq
, hcd
);
360 ret
= xhci_setup_msix(xhci
);
362 /* fall back to msi*/
363 ret
= xhci_setup_msi(xhci
);
366 /* hcd->irq is 0, we have MSI */
370 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
374 /* fall back to legacy interrupt*/
375 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
376 hcd
->irq_descr
, hcd
);
378 xhci_err(xhci
, "request interrupt %d failed\n",
382 hcd
->irq
= pdev
->irq
;
388 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
393 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
397 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
403 static void compliance_mode_recovery(unsigned long arg
)
405 struct xhci_hcd
*xhci
;
410 xhci
= (struct xhci_hcd
*)arg
;
412 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
413 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
414 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
416 * Compliance Mode Detected. Letting USB Core
417 * handle the Warm Reset
419 xhci_dbg(xhci
, "Compliance Mode Detected->Port %d!\n",
421 xhci_dbg(xhci
, "Attempting Recovery routine!\n");
422 hcd
= xhci
->shared_hcd
;
424 if (hcd
->state
== HC_STATE_SUSPENDED
)
425 usb_hcd_resume_root_hub(hcd
);
427 usb_hcd_poll_rh_status(hcd
);
431 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
432 mod_timer(&xhci
->comp_mode_recovery_timer
,
433 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
437 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
438 * that causes ports behind that hardware to enter compliance mode sometimes.
439 * The quirk creates a timer that polls every 2 seconds the link state of
440 * each host controller's port and recovers it by issuing a Warm reset
441 * if Compliance mode is detected, otherwise the port will become "dead" (no
442 * device connections or disconnections will be detected anymore). Becasue no
443 * status event is generated when entering compliance mode (per xhci spec),
444 * this quirk is needed on systems that have the failing hardware installed.
446 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
448 xhci
->port_status_u0
= 0;
449 init_timer(&xhci
->comp_mode_recovery_timer
);
451 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
452 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
453 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
454 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
456 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
457 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
458 add_timer(&xhci
->comp_mode_recovery_timer
);
459 xhci_dbg(xhci
, "Compliance Mode Recovery Timer Initialized.\n");
463 * This function identifies the systems that have installed the SN65LVPE502CP
464 * USB3.0 re-driver and that need the Compliance Mode Quirk.
466 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
468 static bool compliance_mode_recovery_timer_quirk_check(void)
470 const char *dmi_product_name
, *dmi_sys_vendor
;
472 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
473 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
474 if (!dmi_product_name
|| !dmi_sys_vendor
)
477 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
480 if (strstr(dmi_product_name
, "Z420") ||
481 strstr(dmi_product_name
, "Z620") ||
482 strstr(dmi_product_name
, "Z820") ||
483 strstr(dmi_product_name
, "Z1"))
489 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
491 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
496 * Initialize memory for HCD and xHC (one-time init).
498 * Program the PAGESIZE register, initialize the device context array, create
499 * device contexts (?), set up a command ring segment (or two?), create event
500 * ring (one for now).
502 int xhci_init(struct usb_hcd
*hcd
)
504 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
507 xhci_dbg(xhci
, "xhci_init\n");
508 spin_lock_init(&xhci
->lock
);
509 if (xhci
->hci_version
== 0x95 && link_quirk
) {
510 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
511 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
513 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
515 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
516 xhci_dbg(xhci
, "Finished xhci_init\n");
518 /* Initializing Compliance Mode Recovery Data If Needed */
519 if (compliance_mode_recovery_timer_quirk_check()) {
520 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
521 compliance_mode_recovery_timer_init(xhci
);
527 /*-------------------------------------------------------------------------*/
530 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
531 static void xhci_event_ring_work(unsigned long arg
)
536 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
539 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
541 spin_lock_irqsave(&xhci
->lock
, flags
);
542 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
543 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
544 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
545 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
546 xhci_dbg(xhci
, "HW died, polling stopped.\n");
547 spin_unlock_irqrestore(&xhci
->lock
, flags
);
551 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
552 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
553 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
554 xhci
->error_bitmask
= 0;
555 xhci_dbg(xhci
, "Event ring:\n");
556 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
557 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
558 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
559 temp_64
&= ~ERST_PTR_MASK
;
560 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
561 xhci_dbg(xhci
, "Command ring:\n");
562 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
563 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
564 xhci_dbg_cmd_ptrs(xhci
);
565 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
568 for (j
= 0; j
< 31; ++j
) {
569 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
572 spin_unlock_irqrestore(&xhci
->lock
, flags
);
575 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
577 xhci_dbg(xhci
, "Quit polling the event ring.\n");
581 static int xhci_run_finished(struct xhci_hcd
*xhci
)
583 if (xhci_start(xhci
)) {
587 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
588 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
590 if (xhci
->quirks
& XHCI_NEC_HOST
)
591 xhci_ring_cmd_db(xhci
);
593 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
598 * Start the HC after it was halted.
600 * This function is called by the USB core when the HC driver is added.
601 * Its opposite is xhci_stop().
603 * xhci_init() must be called once before this function can be called.
604 * Reset the HC, enable device slot contexts, program DCBAAP, and
605 * set command ring pointer and event ring pointer.
607 * Setup MSI-X vectors and enable interrupts.
609 int xhci_run(struct usb_hcd
*hcd
)
614 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
616 /* Start the xHCI host controller running only after the USB 2.0 roothub
620 hcd
->uses_new_polling
= 1;
621 if (!usb_hcd_is_primary_hcd(hcd
))
622 return xhci_run_finished(xhci
);
624 xhci_dbg(xhci
, "xhci_run\n");
626 ret
= xhci_try_enable_msi(hcd
);
630 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
631 init_timer(&xhci
->event_ring_timer
);
632 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
633 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
634 /* Poll the event ring */
635 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
637 xhci_dbg(xhci
, "Setting event ring polling timer\n");
638 add_timer(&xhci
->event_ring_timer
);
641 xhci_dbg(xhci
, "Command ring memory map follows:\n");
642 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
643 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
644 xhci_dbg_cmd_ptrs(xhci
);
646 xhci_dbg(xhci
, "ERST memory map follows:\n");
647 xhci_dbg_erst(xhci
, &xhci
->erst
);
648 xhci_dbg(xhci
, "Event ring:\n");
649 xhci_debug_ring(xhci
, xhci
->event_ring
);
650 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
651 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
652 temp_64
&= ~ERST_PTR_MASK
;
653 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
655 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
656 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
657 temp
&= ~ER_IRQ_INTERVAL_MASK
;
659 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
661 /* Set the HCD state before we enable the irqs */
662 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
664 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
666 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
668 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
669 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
670 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
671 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
672 &xhci
->ir_set
->irq_pending
);
673 xhci_print_ir_set(xhci
, 0);
675 if (xhci
->quirks
& XHCI_NEC_HOST
)
676 xhci_queue_vendor_command(xhci
, 0, 0, 0,
677 TRB_TYPE(TRB_NEC_GET_FW
));
679 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
683 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
685 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
687 spin_lock_irq(&xhci
->lock
);
690 /* The shared_hcd is going to be deallocated shortly (the USB core only
691 * calls this function when allocation fails in usb_add_hcd(), or
692 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
694 xhci
->shared_hcd
= NULL
;
695 spin_unlock_irq(&xhci
->lock
);
701 * This function is called by the USB core when the HC driver is removed.
702 * Its opposite is xhci_run().
704 * Disable device contexts, disable IRQs, and quiesce the HC.
705 * Reset the HC, finish any completed transactions, and cleanup memory.
707 void xhci_stop(struct usb_hcd
*hcd
)
710 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
712 if (!usb_hcd_is_primary_hcd(hcd
)) {
713 xhci_only_stop_hcd(xhci
->shared_hcd
);
717 spin_lock_irq(&xhci
->lock
);
718 /* Make sure the xHC is halted for a USB3 roothub
719 * (xhci_stop() could be called as part of failed init).
723 spin_unlock_irq(&xhci
->lock
);
725 xhci_cleanup_msix(xhci
);
727 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
728 /* Tell the event ring poll function not to reschedule */
730 del_timer_sync(&xhci
->event_ring_timer
);
733 /* Deleting Compliance Mode Recovery Timer */
734 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
735 (!(xhci_all_ports_seen_u0(xhci
))))
736 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
738 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
741 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
742 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
743 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
744 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
745 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
746 &xhci
->ir_set
->irq_pending
);
747 xhci_print_ir_set(xhci
, 0);
749 xhci_dbg(xhci
, "cleaning up memory\n");
750 xhci_mem_cleanup(xhci
);
751 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
752 xhci_readl(xhci
, &xhci
->op_regs
->status
));
756 * Shutdown HC (not bus-specific)
758 * This is called when the machine is rebooting or halting. We assume that the
759 * machine will be powered off, and the HC's internal state will be reset.
760 * Don't bother to free memory.
762 * This will only ever be called with the main usb_hcd (the USB3 roothub).
764 void xhci_shutdown(struct usb_hcd
*hcd
)
766 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
768 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
769 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
771 spin_lock_irq(&xhci
->lock
);
773 spin_unlock_irq(&xhci
->lock
);
775 xhci_cleanup_msix(xhci
);
777 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
778 xhci_readl(xhci
, &xhci
->op_regs
->status
));
782 static void xhci_save_registers(struct xhci_hcd
*xhci
)
784 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
785 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
786 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
787 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
788 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
789 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
790 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
791 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
792 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
795 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
797 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
798 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
799 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
800 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
801 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
802 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
803 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
804 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
805 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
808 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
812 /* step 2: initialize command ring buffer */
813 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
814 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
815 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
816 xhci
->cmd_ring
->dequeue
) &
817 (u64
) ~CMD_RING_RSVD_BITS
) |
818 xhci
->cmd_ring
->cycle_state
;
819 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
820 (long unsigned long) val_64
);
821 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
825 * The whole command ring must be cleared to zero when we suspend the host.
827 * The host doesn't save the command ring pointer in the suspend well, so we
828 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
829 * aligned, because of the reserved bits in the command ring dequeue pointer
830 * register. Therefore, we can't just set the dequeue pointer back in the
831 * middle of the ring (TRBs are 16-byte aligned).
833 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
835 struct xhci_ring
*ring
;
836 struct xhci_segment
*seg
;
838 ring
= xhci
->cmd_ring
;
842 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
843 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
844 cpu_to_le32(~TRB_CYCLE
);
846 } while (seg
!= ring
->deq_seg
);
848 /* Reset the software enqueue and dequeue pointers */
849 ring
->deq_seg
= ring
->first_seg
;
850 ring
->dequeue
= ring
->first_seg
->trbs
;
851 ring
->enq_seg
= ring
->deq_seg
;
852 ring
->enqueue
= ring
->dequeue
;
854 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
856 * Ring is now zeroed, so the HW should look for change of ownership
857 * when the cycle bit is set to 1.
859 ring
->cycle_state
= 1;
862 * Reset the hardware dequeue pointer.
863 * Yes, this will need to be re-written after resume, but we're paranoid
864 * and want to make sure the hardware doesn't access bogus memory
865 * because, say, the BIOS or an SMI started the host without changing
866 * the command ring pointers.
868 xhci_set_cmd_ring_deq(xhci
);
872 * Stop HC (not bus-specific)
874 * This is called when the machine transition into S3/S4 mode.
877 int xhci_suspend(struct xhci_hcd
*xhci
)
880 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
883 spin_lock_irq(&xhci
->lock
);
884 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
885 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
886 /* step 1: stop endpoint */
887 /* skipped assuming that port suspend has done */
889 /* step 2: clear Run/Stop bit */
890 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
892 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
893 if (handshake(xhci
, &xhci
->op_regs
->status
,
894 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
)) {
895 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
896 spin_unlock_irq(&xhci
->lock
);
899 xhci_clear_command_ring(xhci
);
901 /* step 3: save registers */
902 xhci_save_registers(xhci
);
904 /* step 4: set CSS flag */
905 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
907 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
908 if (handshake(xhci
, &xhci
->op_regs
->status
, STS_SAVE
, 0, 10 * 1000)) {
909 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
910 spin_unlock_irq(&xhci
->lock
);
913 spin_unlock_irq(&xhci
->lock
);
916 * Deleting Compliance Mode Recovery Timer because the xHCI Host
917 * is about to be suspended.
919 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
920 (!(xhci_all_ports_seen_u0(xhci
)))) {
921 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
922 xhci_dbg(xhci
, "Compliance Mode Recovery Timer Deleted!\n");
925 /* step 5: remove core well power */
926 /* synchronize irq when using MSI-X */
927 xhci_msix_sync_irqs(xhci
);
933 * start xHC (not bus-specific)
935 * This is called when the machine transition from S3/S4 mode.
938 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
940 u32 command
, temp
= 0;
941 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
942 struct usb_hcd
*secondary_hcd
;
945 /* Wait a bit if either of the roothubs need to settle from the
946 * transition into bus suspend.
948 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
950 xhci
->bus_state
[1].next_statechange
))
953 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
954 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
956 spin_lock_irq(&xhci
->lock
);
957 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
961 /* step 1: restore register */
962 xhci_restore_registers(xhci
);
963 /* step 2: initialize command ring buffer */
964 xhci_set_cmd_ring_deq(xhci
);
965 /* step 3: restore state and start state*/
966 /* step 3: set CRS flag */
967 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
969 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
970 if (handshake(xhci
, &xhci
->op_regs
->status
,
971 STS_RESTORE
, 0, 10 * 1000)) {
972 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
973 spin_unlock_irq(&xhci
->lock
);
976 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
979 /* If restore operation fails, re-initialize the HC during resume */
980 if ((temp
& STS_SRE
) || hibernated
) {
981 /* Let the USB core know _both_ roothubs lost power. */
982 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
983 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
985 xhci_dbg(xhci
, "Stop HCD\n");
988 spin_unlock_irq(&xhci
->lock
);
989 xhci_cleanup_msix(xhci
);
991 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
992 /* Tell the event ring poll function not to reschedule */
994 del_timer_sync(&xhci
->event_ring_timer
);
997 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
998 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
999 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
1000 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
1001 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
1002 &xhci
->ir_set
->irq_pending
);
1003 xhci_print_ir_set(xhci
, 0);
1005 xhci_dbg(xhci
, "cleaning up memory\n");
1006 xhci_mem_cleanup(xhci
);
1007 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1008 xhci_readl(xhci
, &xhci
->op_regs
->status
));
1010 /* USB core calls the PCI reinit and start functions twice:
1011 * first with the primary HCD, and then with the secondary HCD.
1012 * If we don't do the same, the host will never be started.
1014 if (!usb_hcd_is_primary_hcd(hcd
))
1015 secondary_hcd
= hcd
;
1017 secondary_hcd
= xhci
->shared_hcd
;
1019 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1020 retval
= xhci_init(hcd
->primary_hcd
);
1023 xhci_dbg(xhci
, "Start the primary HCD\n");
1024 retval
= xhci_run(hcd
->primary_hcd
);
1026 xhci_dbg(xhci
, "Start the secondary HCD\n");
1027 retval
= xhci_run(secondary_hcd
);
1029 hcd
->state
= HC_STATE_SUSPENDED
;
1030 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1034 /* step 4: set Run/Stop bit */
1035 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1037 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1038 handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1041 /* step 5: walk topology and initialize portsc,
1042 * portpmsc and portli
1044 /* this is done in bus_resume */
1046 /* step 6: restart each of the previously
1047 * Running endpoints by ringing their doorbells
1050 spin_unlock_irq(&xhci
->lock
);
1054 usb_hcd_resume_root_hub(hcd
);
1055 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1059 * If system is subject to the Quirk, Compliance Mode Timer needs to
1060 * be re-initialized Always after a system resume. Ports are subject
1061 * to suffer the Compliance Mode issue again. It doesn't matter if
1062 * ports have entered previously to U0 before system's suspension.
1064 if (xhci
->quirks
& XHCI_COMP_MODE_QUIRK
)
1065 compliance_mode_recovery_timer_init(xhci
);
1069 #endif /* CONFIG_PM */
1071 /*-------------------------------------------------------------------------*/
1074 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1075 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1076 * value to right shift 1 for the bitmask.
1078 * Index = (epnum * 2) + direction - 1,
1079 * where direction = 0 for OUT, 1 for IN.
1080 * For control endpoints, the IN index is used (OUT index is unused), so
1081 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1083 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1086 if (usb_endpoint_xfer_control(desc
))
1087 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1089 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1090 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1094 /* Find the flag for this endpoint (for use in the control context). Use the
1095 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1098 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1100 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1103 /* Find the flag for this endpoint (for use in the control context). Use the
1104 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1107 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1109 return 1 << (ep_index
+ 1);
1112 /* Compute the last valid endpoint context index. Basically, this is the
1113 * endpoint index plus one. For slot contexts with more than valid endpoint,
1114 * we find the most significant bit set in the added contexts flags.
1115 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1116 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1118 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1120 return fls(added_ctxs
) - 1;
1123 /* Returns 1 if the arguments are OK;
1124 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1126 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1127 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1129 struct xhci_hcd
*xhci
;
1130 struct xhci_virt_device
*virt_dev
;
1132 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1133 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1137 if (!udev
->parent
) {
1138 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1143 xhci
= hcd_to_xhci(hcd
);
1144 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1147 if (check_virt_dev
) {
1148 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1149 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1154 virt_dev
= xhci
->devs
[udev
->slot_id
];
1155 if (virt_dev
->udev
!= udev
) {
1156 printk(KERN_DEBUG
"xHCI %s called with udev and "
1157 "virt_dev does not match\n", func
);
1165 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1166 struct usb_device
*udev
, struct xhci_command
*command
,
1167 bool ctx_change
, bool must_succeed
);
1170 * Full speed devices may have a max packet size greater than 8 bytes, but the
1171 * USB core doesn't know that until it reads the first 8 bytes of the
1172 * descriptor. If the usb_device's max packet size changes after that point,
1173 * we need to issue an evaluate context command and wait on it.
1175 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1176 unsigned int ep_index
, struct urb
*urb
)
1178 struct xhci_container_ctx
*in_ctx
;
1179 struct xhci_container_ctx
*out_ctx
;
1180 struct xhci_input_control_ctx
*ctrl_ctx
;
1181 struct xhci_ep_ctx
*ep_ctx
;
1182 int max_packet_size
;
1183 int hw_max_packet_size
;
1186 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1187 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1188 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1189 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1190 if (hw_max_packet_size
!= max_packet_size
) {
1191 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1192 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1194 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1195 hw_max_packet_size
);
1196 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1198 /* Set up the modified control endpoint 0 */
1199 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1200 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1201 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1202 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1203 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1204 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1206 /* Set up the input context flags for the command */
1207 /* FIXME: This won't work if a non-default control endpoint
1208 * changes max packet sizes.
1210 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1211 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1212 ctrl_ctx
->drop_flags
= 0;
1214 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1215 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1216 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1217 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1219 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1222 /* Clean up the input context for later use by bandwidth
1225 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1231 * non-error returns are a promise to giveback() the urb later
1232 * we drop ownership so next owner (or urb unlink) can get it
1234 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1236 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1237 struct xhci_td
*buffer
;
1238 unsigned long flags
;
1240 unsigned int slot_id
, ep_index
;
1241 struct urb_priv
*urb_priv
;
1244 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1245 true, true, __func__
) <= 0)
1248 slot_id
= urb
->dev
->slot_id
;
1249 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1251 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1252 if (!in_interrupt())
1253 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1258 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1259 size
= urb
->number_of_packets
;
1263 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1264 size
* sizeof(struct xhci_td
*), mem_flags
);
1268 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1274 for (i
= 0; i
< size
; i
++) {
1275 urb_priv
->td
[i
] = buffer
;
1279 urb_priv
->length
= size
;
1280 urb_priv
->td_cnt
= 0;
1281 urb
->hcpriv
= urb_priv
;
1283 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1284 /* Check to see if the max packet size for the default control
1285 * endpoint changed during FS device enumeration
1287 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1288 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1291 xhci_urb_free_priv(xhci
, urb_priv
);
1297 /* We have a spinlock and interrupts disabled, so we must pass
1298 * atomic context to this function, which may allocate memory.
1300 spin_lock_irqsave(&xhci
->lock
, flags
);
1301 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1303 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1307 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1308 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1309 spin_lock_irqsave(&xhci
->lock
, flags
);
1310 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1312 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1313 EP_GETTING_STREAMS
) {
1314 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1315 "is transitioning to using streams.\n");
1317 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1318 EP_GETTING_NO_STREAMS
) {
1319 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1320 "is transitioning to "
1321 "not having streams.\n");
1324 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1329 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1330 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1331 spin_lock_irqsave(&xhci
->lock
, flags
);
1332 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1334 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1338 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1340 spin_lock_irqsave(&xhci
->lock
, flags
);
1341 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1343 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1347 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1352 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1353 "non-responsive xHCI host.\n",
1354 urb
->ep
->desc
.bEndpointAddress
, urb
);
1357 xhci_urb_free_priv(xhci
, urb_priv
);
1359 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1363 /* Get the right ring for the given URB.
1364 * If the endpoint supports streams, boundary check the URB's stream ID.
1365 * If the endpoint doesn't support streams, return the singular endpoint ring.
1367 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1370 unsigned int slot_id
;
1371 unsigned int ep_index
;
1372 unsigned int stream_id
;
1373 struct xhci_virt_ep
*ep
;
1375 slot_id
= urb
->dev
->slot_id
;
1376 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1377 stream_id
= urb
->stream_id
;
1378 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1379 /* Common case: no streams */
1380 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1383 if (stream_id
== 0) {
1385 "WARN: Slot ID %u, ep index %u has streams, "
1386 "but URB has no stream ID.\n",
1391 if (stream_id
< ep
->stream_info
->num_streams
)
1392 return ep
->stream_info
->stream_rings
[stream_id
];
1395 "WARN: Slot ID %u, ep index %u has "
1396 "stream IDs 1 to %u allocated, "
1397 "but stream ID %u is requested.\n",
1399 ep
->stream_info
->num_streams
- 1,
1405 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1406 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1407 * should pick up where it left off in the TD, unless a Set Transfer Ring
1408 * Dequeue Pointer is issued.
1410 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1411 * the ring. Since the ring is a contiguous structure, they can't be physically
1412 * removed. Instead, there are two options:
1414 * 1) If the HC is in the middle of processing the URB to be canceled, we
1415 * simply move the ring's dequeue pointer past those TRBs using the Set
1416 * Transfer Ring Dequeue Pointer command. This will be the common case,
1417 * when drivers timeout on the last submitted URB and attempt to cancel.
1419 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1420 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1421 * HC will need to invalidate the any TRBs it has cached after the stop
1422 * endpoint command, as noted in the xHCI 0.95 errata.
1424 * 3) The TD may have completed by the time the Stop Endpoint Command
1425 * completes, so software needs to handle that case too.
1427 * This function should protect against the TD enqueueing code ringing the
1428 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1429 * It also needs to account for multiple cancellations on happening at the same
1430 * time for the same endpoint.
1432 * Note that this function can be called in any context, or so says
1433 * usb_hcd_unlink_urb()
1435 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1437 unsigned long flags
;
1440 struct xhci_hcd
*xhci
;
1441 struct urb_priv
*urb_priv
;
1443 unsigned int ep_index
;
1444 struct xhci_ring
*ep_ring
;
1445 struct xhci_virt_ep
*ep
;
1447 xhci
= hcd_to_xhci(hcd
);
1448 spin_lock_irqsave(&xhci
->lock
, flags
);
1449 /* Make sure the URB hasn't completed or been unlinked already */
1450 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1451 if (ret
|| !urb
->hcpriv
)
1453 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1454 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1455 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1456 urb_priv
= urb
->hcpriv
;
1457 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1458 td
= urb_priv
->td
[i
];
1459 if (!list_empty(&td
->td_list
))
1460 list_del_init(&td
->td_list
);
1461 if (!list_empty(&td
->cancelled_td_list
))
1462 list_del_init(&td
->cancelled_td_list
);
1465 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1466 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1467 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1468 xhci_urb_free_priv(xhci
, urb_priv
);
1471 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1472 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1473 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1474 "non-responsive xHCI host.\n",
1475 urb
->ep
->desc
.bEndpointAddress
, urb
);
1476 /* Let the stop endpoint command watchdog timer (which set this
1477 * state) finish cleaning up the endpoint TD lists. We must
1478 * have caught it in the middle of dropping a lock and giving
1484 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1485 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1486 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1492 urb_priv
= urb
->hcpriv
;
1493 i
= urb_priv
->td_cnt
;
1494 if (i
< urb_priv
->length
)
1495 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1496 "starting at offset 0x%llx\n",
1497 urb
, urb
->dev
->devpath
,
1498 urb
->ep
->desc
.bEndpointAddress
,
1499 (unsigned long long) xhci_trb_virt_to_dma(
1500 urb_priv
->td
[i
]->start_seg
,
1501 urb_priv
->td
[i
]->first_trb
));
1503 for (; i
< urb_priv
->length
; i
++) {
1504 td
= urb_priv
->td
[i
];
1505 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1508 /* Queue a stop endpoint command, but only if this is
1509 * the first cancellation to be handled.
1511 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1512 ep
->ep_state
|= EP_HALT_PENDING
;
1513 ep
->stop_cmds_pending
++;
1514 ep
->stop_cmd_timer
.expires
= jiffies
+
1515 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1516 add_timer(&ep
->stop_cmd_timer
);
1517 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1518 xhci_ring_cmd_db(xhci
);
1521 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1525 /* Drop an endpoint from a new bandwidth configuration for this device.
1526 * Only one call to this function is allowed per endpoint before
1527 * check_bandwidth() or reset_bandwidth() must be called.
1528 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1529 * add the endpoint to the schedule with possibly new parameters denoted by a
1530 * different endpoint descriptor in usb_host_endpoint.
1531 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1534 * The USB core will not allow URBs to be queued to an endpoint that is being
1535 * disabled, so there's no need for mutual exclusion to protect
1536 * the xhci->devs[slot_id] structure.
1538 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1539 struct usb_host_endpoint
*ep
)
1541 struct xhci_hcd
*xhci
;
1542 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1543 struct xhci_input_control_ctx
*ctrl_ctx
;
1544 struct xhci_slot_ctx
*slot_ctx
;
1545 unsigned int last_ctx
;
1546 unsigned int ep_index
;
1547 struct xhci_ep_ctx
*ep_ctx
;
1549 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1552 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1555 xhci
= hcd_to_xhci(hcd
);
1556 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1559 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1560 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1561 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1562 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1563 __func__
, drop_flag
);
1567 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1568 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1569 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1570 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1571 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1572 /* If the HC already knows the endpoint is disabled,
1573 * or the HCD has noted it is disabled, ignore this request
1575 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1576 cpu_to_le32(EP_STATE_DISABLED
)) ||
1577 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1578 xhci_get_endpoint_flag(&ep
->desc
)) {
1579 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1584 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1585 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1587 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1588 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1590 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1591 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1592 /* Update the last valid endpoint context, if we deleted the last one */
1593 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1594 LAST_CTX(last_ctx
)) {
1595 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1596 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1598 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1600 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1602 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1603 (unsigned int) ep
->desc
.bEndpointAddress
,
1605 (unsigned int) new_drop_flags
,
1606 (unsigned int) new_add_flags
,
1607 (unsigned int) new_slot_info
);
1611 /* Add an endpoint to a new possible bandwidth configuration for this device.
1612 * Only one call to this function is allowed per endpoint before
1613 * check_bandwidth() or reset_bandwidth() must be called.
1614 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1615 * add the endpoint to the schedule with possibly new parameters denoted by a
1616 * different endpoint descriptor in usb_host_endpoint.
1617 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1620 * The USB core will not allow URBs to be queued to an endpoint until the
1621 * configuration or alt setting is installed in the device, so there's no need
1622 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1624 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1625 struct usb_host_endpoint
*ep
)
1627 struct xhci_hcd
*xhci
;
1628 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1629 unsigned int ep_index
;
1630 struct xhci_ep_ctx
*ep_ctx
;
1631 struct xhci_slot_ctx
*slot_ctx
;
1632 struct xhci_input_control_ctx
*ctrl_ctx
;
1634 unsigned int last_ctx
;
1635 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1636 struct xhci_virt_device
*virt_dev
;
1639 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1641 /* So we won't queue a reset ep command for a root hub */
1645 xhci
= hcd_to_xhci(hcd
);
1646 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1649 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1650 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1651 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1652 /* FIXME when we have to issue an evaluate endpoint command to
1653 * deal with ep0 max packet size changing once we get the
1656 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1657 __func__
, added_ctxs
);
1661 virt_dev
= xhci
->devs
[udev
->slot_id
];
1662 in_ctx
= virt_dev
->in_ctx
;
1663 out_ctx
= virt_dev
->out_ctx
;
1664 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1665 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1666 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1668 /* If this endpoint is already in use, and the upper layers are trying
1669 * to add it again without dropping it, reject the addition.
1671 if (virt_dev
->eps
[ep_index
].ring
&&
1672 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1673 xhci_get_endpoint_flag(&ep
->desc
))) {
1674 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1675 "without dropping it.\n",
1676 (unsigned int) ep
->desc
.bEndpointAddress
);
1680 /* If the HCD has already noted the endpoint is enabled,
1681 * ignore this request.
1683 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1684 xhci_get_endpoint_flag(&ep
->desc
)) {
1685 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1691 * Configuration and alternate setting changes must be done in
1692 * process context, not interrupt context (or so documenation
1693 * for usb_set_interface() and usb_set_configuration() claim).
1695 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1696 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1697 __func__
, ep
->desc
.bEndpointAddress
);
1701 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1702 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1704 /* If xhci_endpoint_disable() was called for this endpoint, but the
1705 * xHC hasn't been notified yet through the check_bandwidth() call,
1706 * this re-adds a new state for the endpoint from the new endpoint
1707 * descriptors. We must drop and re-add this endpoint, so we leave the
1710 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1712 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1713 /* Update the last valid endpoint context, if we just added one past */
1714 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1715 LAST_CTX(last_ctx
)) {
1716 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1717 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1719 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1721 /* Store the usb_device pointer for later use */
1724 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1725 (unsigned int) ep
->desc
.bEndpointAddress
,
1727 (unsigned int) new_drop_flags
,
1728 (unsigned int) new_add_flags
,
1729 (unsigned int) new_slot_info
);
1733 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1735 struct xhci_input_control_ctx
*ctrl_ctx
;
1736 struct xhci_ep_ctx
*ep_ctx
;
1737 struct xhci_slot_ctx
*slot_ctx
;
1740 /* When a device's add flag and drop flag are zero, any subsequent
1741 * configure endpoint command will leave that endpoint's state
1742 * untouched. Make sure we don't leave any old state in the input
1743 * endpoint contexts.
1745 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1746 ctrl_ctx
->drop_flags
= 0;
1747 ctrl_ctx
->add_flags
= 0;
1748 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1749 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1750 /* Endpoint 0 is always valid */
1751 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1752 for (i
= 1; i
< 31; ++i
) {
1753 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1754 ep_ctx
->ep_info
= 0;
1755 ep_ctx
->ep_info2
= 0;
1757 ep_ctx
->tx_info
= 0;
1761 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1762 struct usb_device
*udev
, u32
*cmd_status
)
1766 switch (*cmd_status
) {
1768 dev_warn(&udev
->dev
, "Not enough host controller resources "
1769 "for new device state.\n");
1771 /* FIXME: can we allocate more resources for the HC? */
1774 case COMP_2ND_BW_ERR
:
1775 dev_warn(&udev
->dev
, "Not enough bandwidth "
1776 "for new device state.\n");
1778 /* FIXME: can we go back to the old state? */
1781 /* the HCD set up something wrong */
1782 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1784 "and endpoint is not disabled.\n");
1788 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1789 "configure command.\n");
1793 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1797 xhci_err(xhci
, "ERROR: unexpected command completion "
1798 "code 0x%x.\n", *cmd_status
);
1805 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1806 struct usb_device
*udev
, u32
*cmd_status
)
1809 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1811 switch (*cmd_status
) {
1813 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1814 "context command.\n");
1818 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1819 "evaluate context command.\n");
1820 case COMP_CTX_STATE
:
1821 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1822 "evaluate context command.\n");
1823 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1827 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1828 "context command.\n");
1832 /* Max Exit Latency too large error */
1833 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1837 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
1841 xhci_err(xhci
, "ERROR: unexpected command completion "
1842 "code 0x%x.\n", *cmd_status
);
1849 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1850 struct xhci_container_ctx
*in_ctx
)
1852 struct xhci_input_control_ctx
*ctrl_ctx
;
1853 u32 valid_add_flags
;
1854 u32 valid_drop_flags
;
1856 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1857 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1858 * (bit 1). The default control endpoint is added during the Address
1859 * Device command and is never removed until the slot is disabled.
1861 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1862 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1864 /* Use hweight32 to count the number of ones in the add flags, or
1865 * number of endpoints added. Don't count endpoints that are changed
1866 * (both added and dropped).
1868 return hweight32(valid_add_flags
) -
1869 hweight32(valid_add_flags
& valid_drop_flags
);
1872 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1873 struct xhci_container_ctx
*in_ctx
)
1875 struct xhci_input_control_ctx
*ctrl_ctx
;
1876 u32 valid_add_flags
;
1877 u32 valid_drop_flags
;
1879 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1880 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1881 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1883 return hweight32(valid_drop_flags
) -
1884 hweight32(valid_add_flags
& valid_drop_flags
);
1888 * We need to reserve the new number of endpoints before the configure endpoint
1889 * command completes. We can't subtract the dropped endpoints from the number
1890 * of active endpoints until the command completes because we can oversubscribe
1891 * the host in this case:
1893 * - the first configure endpoint command drops more endpoints than it adds
1894 * - a second configure endpoint command that adds more endpoints is queued
1895 * - the first configure endpoint command fails, so the config is unchanged
1896 * - the second command may succeed, even though there isn't enough resources
1898 * Must be called with xhci->lock held.
1900 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1901 struct xhci_container_ctx
*in_ctx
)
1905 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1906 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1907 xhci_dbg(xhci
, "Not enough ep ctxs: "
1908 "%u active, need to add %u, limit is %u.\n",
1909 xhci
->num_active_eps
, added_eps
,
1910 xhci
->limit_active_eps
);
1913 xhci
->num_active_eps
+= added_eps
;
1914 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
1915 xhci
->num_active_eps
);
1920 * The configure endpoint was failed by the xHC for some other reason, so we
1921 * need to revert the resources that failed configuration would have used.
1923 * Must be called with xhci->lock held.
1925 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1926 struct xhci_container_ctx
*in_ctx
)
1930 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1931 xhci
->num_active_eps
-= num_failed_eps
;
1932 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
1934 xhci
->num_active_eps
);
1938 * Now that the command has completed, clean up the active endpoint count by
1939 * subtracting out the endpoints that were dropped (but not changed).
1941 * Must be called with xhci->lock held.
1943 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1944 struct xhci_container_ctx
*in_ctx
)
1946 u32 num_dropped_eps
;
1948 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
1949 xhci
->num_active_eps
-= num_dropped_eps
;
1950 if (num_dropped_eps
)
1951 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
1953 xhci
->num_active_eps
);
1956 unsigned int xhci_get_block_size(struct usb_device
*udev
)
1958 switch (udev
->speed
) {
1960 case USB_SPEED_FULL
:
1962 case USB_SPEED_HIGH
:
1964 case USB_SPEED_SUPER
:
1966 case USB_SPEED_UNKNOWN
:
1967 case USB_SPEED_WIRELESS
:
1969 /* Should never happen */
1974 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
1976 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
1978 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
1983 /* If we are changing a LS/FS device under a HS hub,
1984 * make sure (if we are activating a new TT) that the HS bus has enough
1985 * bandwidth for this new TT.
1987 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
1988 struct xhci_virt_device
*virt_dev
,
1991 struct xhci_interval_bw_table
*bw_table
;
1992 struct xhci_tt_bw_info
*tt_info
;
1994 /* Find the bandwidth table for the root port this TT is attached to. */
1995 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
1996 tt_info
= virt_dev
->tt_info
;
1997 /* If this TT already had active endpoints, the bandwidth for this TT
1998 * has already been added. Removing all periodic endpoints (and thus
1999 * making the TT enactive) will only decrease the bandwidth used.
2003 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2004 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2008 /* Not sure why we would have no new active endpoints...
2010 * Maybe because of an Evaluate Context change for a hub update or a
2011 * control endpoint 0 max packet size change?
2012 * FIXME: skip the bandwidth calculation in that case.
2017 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2018 struct xhci_virt_device
*virt_dev
)
2020 unsigned int bw_reserved
;
2022 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2023 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2026 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2027 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2034 * This algorithm is a very conservative estimate of the worst-case scheduling
2035 * scenario for any one interval. The hardware dynamically schedules the
2036 * packets, so we can't tell which microframe could be the limiting factor in
2037 * the bandwidth scheduling. This only takes into account periodic endpoints.
2039 * Obviously, we can't solve an NP complete problem to find the minimum worst
2040 * case scenario. Instead, we come up with an estimate that is no less than
2041 * the worst case bandwidth used for any one microframe, but may be an
2044 * We walk the requirements for each endpoint by interval, starting with the
2045 * smallest interval, and place packets in the schedule where there is only one
2046 * possible way to schedule packets for that interval. In order to simplify
2047 * this algorithm, we record the largest max packet size for each interval, and
2048 * assume all packets will be that size.
2050 * For interval 0, we obviously must schedule all packets for each interval.
2051 * The bandwidth for interval 0 is just the amount of data to be transmitted
2052 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2053 * the number of packets).
2055 * For interval 1, we have two possible microframes to schedule those packets
2056 * in. For this algorithm, if we can schedule the same number of packets for
2057 * each possible scheduling opportunity (each microframe), we will do so. The
2058 * remaining number of packets will be saved to be transmitted in the gaps in
2059 * the next interval's scheduling sequence.
2061 * As we move those remaining packets to be scheduled with interval 2 packets,
2062 * we have to double the number of remaining packets to transmit. This is
2063 * because the intervals are actually powers of 2, and we would be transmitting
2064 * the previous interval's packets twice in this interval. We also have to be
2065 * sure that when we look at the largest max packet size for this interval, we
2066 * also look at the largest max packet size for the remaining packets and take
2067 * the greater of the two.
2069 * The algorithm continues to evenly distribute packets in each scheduling
2070 * opportunity, and push the remaining packets out, until we get to the last
2071 * interval. Then those packets and their associated overhead are just added
2072 * to the bandwidth used.
2074 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2075 struct xhci_virt_device
*virt_dev
,
2078 unsigned int bw_reserved
;
2079 unsigned int max_bandwidth
;
2080 unsigned int bw_used
;
2081 unsigned int block_size
;
2082 struct xhci_interval_bw_table
*bw_table
;
2083 unsigned int packet_size
= 0;
2084 unsigned int overhead
= 0;
2085 unsigned int packets_transmitted
= 0;
2086 unsigned int packets_remaining
= 0;
2089 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2090 return xhci_check_ss_bw(xhci
, virt_dev
);
2092 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2093 max_bandwidth
= HS_BW_LIMIT
;
2094 /* Convert percent of bus BW reserved to blocks reserved */
2095 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2097 max_bandwidth
= FS_BW_LIMIT
;
2098 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2101 bw_table
= virt_dev
->bw_table
;
2102 /* We need to translate the max packet size and max ESIT payloads into
2103 * the units the hardware uses.
2105 block_size
= xhci_get_block_size(virt_dev
->udev
);
2107 /* If we are manipulating a LS/FS device under a HS hub, double check
2108 * that the HS bus has enough bandwidth if we are activing a new TT.
2110 if (virt_dev
->tt_info
) {
2111 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2112 virt_dev
->real_port
);
2113 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2114 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2115 "newly activated TT.\n");
2118 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
2119 virt_dev
->tt_info
->slot_id
,
2120 virt_dev
->tt_info
->ttport
);
2122 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2123 virt_dev
->real_port
);
2126 /* Add in how much bandwidth will be used for interval zero, or the
2127 * rounded max ESIT payload + number of packets * largest overhead.
2129 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2130 bw_table
->interval_bw
[0].num_packets
*
2131 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2133 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2134 unsigned int bw_added
;
2135 unsigned int largest_mps
;
2136 unsigned int interval_overhead
;
2139 * How many packets could we transmit in this interval?
2140 * If packets didn't fit in the previous interval, we will need
2141 * to transmit that many packets twice within this interval.
2143 packets_remaining
= 2 * packets_remaining
+
2144 bw_table
->interval_bw
[i
].num_packets
;
2146 /* Find the largest max packet size of this or the previous
2149 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2152 struct xhci_virt_ep
*virt_ep
;
2153 struct list_head
*ep_entry
;
2155 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2156 virt_ep
= list_entry(ep_entry
,
2157 struct xhci_virt_ep
, bw_endpoint_list
);
2158 /* Convert to blocks, rounding up */
2159 largest_mps
= DIV_ROUND_UP(
2160 virt_ep
->bw_info
.max_packet_size
,
2163 if (largest_mps
> packet_size
)
2164 packet_size
= largest_mps
;
2166 /* Use the larger overhead of this or the previous interval. */
2167 interval_overhead
= xhci_get_largest_overhead(
2168 &bw_table
->interval_bw
[i
]);
2169 if (interval_overhead
> overhead
)
2170 overhead
= interval_overhead
;
2172 /* How many packets can we evenly distribute across
2173 * (1 << (i + 1)) possible scheduling opportunities?
2175 packets_transmitted
= packets_remaining
>> (i
+ 1);
2177 /* Add in the bandwidth used for those scheduled packets */
2178 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2180 /* How many packets do we have remaining to transmit? */
2181 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2183 /* What largest max packet size should those packets have? */
2184 /* If we've transmitted all packets, don't carry over the
2185 * largest packet size.
2187 if (packets_remaining
== 0) {
2190 } else if (packets_transmitted
> 0) {
2191 /* Otherwise if we do have remaining packets, and we've
2192 * scheduled some packets in this interval, take the
2193 * largest max packet size from endpoints with this
2196 packet_size
= largest_mps
;
2197 overhead
= interval_overhead
;
2199 /* Otherwise carry over packet_size and overhead from the last
2200 * time we had a remainder.
2202 bw_used
+= bw_added
;
2203 if (bw_used
> max_bandwidth
) {
2204 xhci_warn(xhci
, "Not enough bandwidth. "
2205 "Proposed: %u, Max: %u\n",
2206 bw_used
, max_bandwidth
);
2211 * Ok, we know we have some packets left over after even-handedly
2212 * scheduling interval 15. We don't know which microframes they will
2213 * fit into, so we over-schedule and say they will be scheduled every
2216 if (packets_remaining
> 0)
2217 bw_used
+= overhead
+ packet_size
;
2219 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2220 unsigned int port_index
= virt_dev
->real_port
- 1;
2222 /* OK, we're manipulating a HS device attached to a
2223 * root port bandwidth domain. Include the number of active TTs
2224 * in the bandwidth used.
2226 bw_used
+= TT_HS_OVERHEAD
*
2227 xhci
->rh_bw
[port_index
].num_active_tts
;
2230 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2231 "Available: %u " "percent\n",
2232 bw_used
, max_bandwidth
, bw_reserved
,
2233 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2236 bw_used
+= bw_reserved
;
2237 if (bw_used
> max_bandwidth
) {
2238 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2239 bw_used
, max_bandwidth
);
2243 bw_table
->bw_used
= bw_used
;
2247 static bool xhci_is_async_ep(unsigned int ep_type
)
2249 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2250 ep_type
!= ISOC_IN_EP
&&
2251 ep_type
!= INT_IN_EP
);
2254 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2256 return (ep_type
== ISOC_IN_EP
|| ep_type
!= INT_IN_EP
);
2259 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2261 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2263 if (ep_bw
->ep_interval
== 0)
2264 return SS_OVERHEAD_BURST
+
2265 (ep_bw
->mult
* ep_bw
->num_packets
*
2266 (SS_OVERHEAD
+ mps
));
2267 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2268 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2269 1 << ep_bw
->ep_interval
);
2273 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2274 struct xhci_bw_info
*ep_bw
,
2275 struct xhci_interval_bw_table
*bw_table
,
2276 struct usb_device
*udev
,
2277 struct xhci_virt_ep
*virt_ep
,
2278 struct xhci_tt_bw_info
*tt_info
)
2280 struct xhci_interval_bw
*interval_bw
;
2281 int normalized_interval
;
2283 if (xhci_is_async_ep(ep_bw
->type
))
2286 if (udev
->speed
== USB_SPEED_SUPER
) {
2287 if (xhci_is_sync_in_ep(ep_bw
->type
))
2288 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2289 xhci_get_ss_bw_consumed(ep_bw
);
2291 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2292 xhci_get_ss_bw_consumed(ep_bw
);
2296 /* SuperSpeed endpoints never get added to intervals in the table, so
2297 * this check is only valid for HS/FS/LS devices.
2299 if (list_empty(&virt_ep
->bw_endpoint_list
))
2301 /* For LS/FS devices, we need to translate the interval expressed in
2302 * microframes to frames.
2304 if (udev
->speed
== USB_SPEED_HIGH
)
2305 normalized_interval
= ep_bw
->ep_interval
;
2307 normalized_interval
= ep_bw
->ep_interval
- 3;
2309 if (normalized_interval
== 0)
2310 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2311 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2312 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2313 switch (udev
->speed
) {
2315 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2317 case USB_SPEED_FULL
:
2318 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2320 case USB_SPEED_HIGH
:
2321 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2323 case USB_SPEED_SUPER
:
2324 case USB_SPEED_UNKNOWN
:
2325 case USB_SPEED_WIRELESS
:
2326 /* Should never happen because only LS/FS/HS endpoints will get
2327 * added to the endpoint list.
2332 tt_info
->active_eps
-= 1;
2333 list_del_init(&virt_ep
->bw_endpoint_list
);
2336 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2337 struct xhci_bw_info
*ep_bw
,
2338 struct xhci_interval_bw_table
*bw_table
,
2339 struct usb_device
*udev
,
2340 struct xhci_virt_ep
*virt_ep
,
2341 struct xhci_tt_bw_info
*tt_info
)
2343 struct xhci_interval_bw
*interval_bw
;
2344 struct xhci_virt_ep
*smaller_ep
;
2345 int normalized_interval
;
2347 if (xhci_is_async_ep(ep_bw
->type
))
2350 if (udev
->speed
== USB_SPEED_SUPER
) {
2351 if (xhci_is_sync_in_ep(ep_bw
->type
))
2352 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2353 xhci_get_ss_bw_consumed(ep_bw
);
2355 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2356 xhci_get_ss_bw_consumed(ep_bw
);
2360 /* For LS/FS devices, we need to translate the interval expressed in
2361 * microframes to frames.
2363 if (udev
->speed
== USB_SPEED_HIGH
)
2364 normalized_interval
= ep_bw
->ep_interval
;
2366 normalized_interval
= ep_bw
->ep_interval
- 3;
2368 if (normalized_interval
== 0)
2369 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2370 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2371 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2372 switch (udev
->speed
) {
2374 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2376 case USB_SPEED_FULL
:
2377 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2379 case USB_SPEED_HIGH
:
2380 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2382 case USB_SPEED_SUPER
:
2383 case USB_SPEED_UNKNOWN
:
2384 case USB_SPEED_WIRELESS
:
2385 /* Should never happen because only LS/FS/HS endpoints will get
2386 * added to the endpoint list.
2392 tt_info
->active_eps
+= 1;
2393 /* Insert the endpoint into the list, largest max packet size first. */
2394 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2396 if (ep_bw
->max_packet_size
>=
2397 smaller_ep
->bw_info
.max_packet_size
) {
2398 /* Add the new ep before the smaller endpoint */
2399 list_add_tail(&virt_ep
->bw_endpoint_list
,
2400 &smaller_ep
->bw_endpoint_list
);
2404 /* Add the new endpoint at the end of the list. */
2405 list_add_tail(&virt_ep
->bw_endpoint_list
,
2406 &interval_bw
->endpoints
);
2409 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2410 struct xhci_virt_device
*virt_dev
,
2413 struct xhci_root_port_bw_info
*rh_bw_info
;
2414 if (!virt_dev
->tt_info
)
2417 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2418 if (old_active_eps
== 0 &&
2419 virt_dev
->tt_info
->active_eps
!= 0) {
2420 rh_bw_info
->num_active_tts
+= 1;
2421 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2422 } else if (old_active_eps
!= 0 &&
2423 virt_dev
->tt_info
->active_eps
== 0) {
2424 rh_bw_info
->num_active_tts
-= 1;
2425 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2429 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2430 struct xhci_virt_device
*virt_dev
,
2431 struct xhci_container_ctx
*in_ctx
)
2433 struct xhci_bw_info ep_bw_info
[31];
2435 struct xhci_input_control_ctx
*ctrl_ctx
;
2436 int old_active_eps
= 0;
2438 if (virt_dev
->tt_info
)
2439 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2441 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2443 for (i
= 0; i
< 31; i
++) {
2444 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2447 /* Make a copy of the BW info in case we need to revert this */
2448 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2449 sizeof(ep_bw_info
[i
]));
2450 /* Drop the endpoint from the interval table if the endpoint is
2451 * being dropped or changed.
2453 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2454 xhci_drop_ep_from_interval_table(xhci
,
2455 &virt_dev
->eps
[i
].bw_info
,
2461 /* Overwrite the information stored in the endpoints' bw_info */
2462 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2463 for (i
= 0; i
< 31; i
++) {
2464 /* Add any changed or added endpoints to the interval table */
2465 if (EP_IS_ADDED(ctrl_ctx
, i
))
2466 xhci_add_ep_to_interval_table(xhci
,
2467 &virt_dev
->eps
[i
].bw_info
,
2474 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2475 /* Ok, this fits in the bandwidth we have.
2476 * Update the number of active TTs.
2478 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2482 /* We don't have enough bandwidth for this, revert the stored info. */
2483 for (i
= 0; i
< 31; i
++) {
2484 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2487 /* Drop the new copies of any added or changed endpoints from
2488 * the interval table.
2490 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2491 xhci_drop_ep_from_interval_table(xhci
,
2492 &virt_dev
->eps
[i
].bw_info
,
2498 /* Revert the endpoint back to its old information */
2499 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2500 sizeof(ep_bw_info
[i
]));
2501 /* Add any changed or dropped endpoints back into the table */
2502 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2503 xhci_add_ep_to_interval_table(xhci
,
2504 &virt_dev
->eps
[i
].bw_info
,
2514 /* Issue a configure endpoint command or evaluate context command
2515 * and wait for it to finish.
2517 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2518 struct usb_device
*udev
,
2519 struct xhci_command
*command
,
2520 bool ctx_change
, bool must_succeed
)
2524 unsigned long flags
;
2525 struct xhci_container_ctx
*in_ctx
;
2526 struct completion
*cmd_completion
;
2528 struct xhci_virt_device
*virt_dev
;
2529 union xhci_trb
*cmd_trb
;
2531 spin_lock_irqsave(&xhci
->lock
, flags
);
2532 virt_dev
= xhci
->devs
[udev
->slot_id
];
2535 in_ctx
= command
->in_ctx
;
2537 in_ctx
= virt_dev
->in_ctx
;
2539 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2540 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2541 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2542 xhci_warn(xhci
, "Not enough host resources, "
2543 "active endpoint contexts = %u\n",
2544 xhci
->num_active_eps
);
2547 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2548 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2549 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2550 xhci_free_host_resources(xhci
, in_ctx
);
2551 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2552 xhci_warn(xhci
, "Not enough bandwidth\n");
2557 cmd_completion
= command
->completion
;
2558 cmd_status
= &command
->status
;
2559 command
->command_trb
= xhci
->cmd_ring
->enqueue
;
2561 /* Enqueue pointer can be left pointing to the link TRB,
2562 * we must handle that
2564 if (TRB_TYPE_LINK_LE32(command
->command_trb
->link
.control
))
2565 command
->command_trb
=
2566 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
2568 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2570 cmd_completion
= &virt_dev
->cmd_completion
;
2571 cmd_status
= &virt_dev
->cmd_status
;
2573 init_completion(cmd_completion
);
2575 cmd_trb
= xhci
->cmd_ring
->dequeue
;
2577 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2578 udev
->slot_id
, must_succeed
);
2580 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2581 udev
->slot_id
, must_succeed
);
2584 list_del(&command
->cmd_list
);
2585 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2586 xhci_free_host_resources(xhci
, in_ctx
);
2587 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2588 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2591 xhci_ring_cmd_db(xhci
);
2592 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2594 /* Wait for the configure endpoint command to complete */
2595 timeleft
= wait_for_completion_interruptible_timeout(
2597 XHCI_CMD_DEFAULT_TIMEOUT
);
2598 if (timeleft
<= 0) {
2599 xhci_warn(xhci
, "%s while waiting for %s command\n",
2600 timeleft
== 0 ? "Timeout" : "Signal",
2602 "configure endpoint" :
2603 "evaluate context");
2604 /* cancel the configure endpoint command */
2605 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2612 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2614 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2616 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2617 spin_lock_irqsave(&xhci
->lock
, flags
);
2618 /* If the command failed, remove the reserved resources.
2619 * Otherwise, clean up the estimate to include dropped eps.
2622 xhci_free_host_resources(xhci
, in_ctx
);
2624 xhci_finish_resource_reservation(xhci
, in_ctx
);
2625 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2630 /* Called after one or more calls to xhci_add_endpoint() or
2631 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2632 * to call xhci_reset_bandwidth().
2634 * Since we are in the middle of changing either configuration or
2635 * installing a new alt setting, the USB core won't allow URBs to be
2636 * enqueued for any endpoint on the old config or interface. Nothing
2637 * else should be touching the xhci->devs[slot_id] structure, so we
2638 * don't need to take the xhci->lock for manipulating that.
2640 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2644 struct xhci_hcd
*xhci
;
2645 struct xhci_virt_device
*virt_dev
;
2646 struct xhci_input_control_ctx
*ctrl_ctx
;
2647 struct xhci_slot_ctx
*slot_ctx
;
2649 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2652 xhci
= hcd_to_xhci(hcd
);
2653 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2656 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2657 virt_dev
= xhci
->devs
[udev
->slot_id
];
2659 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2660 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2661 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2662 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2663 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2665 /* Don't issue the command if there's no endpoints to update. */
2666 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2667 ctrl_ctx
->drop_flags
== 0)
2670 xhci_dbg(xhci
, "New Input Control Context:\n");
2671 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2672 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2673 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2675 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2678 /* Callee should call reset_bandwidth() */
2682 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2683 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2684 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2686 /* Free any rings that were dropped, but not changed. */
2687 for (i
= 1; i
< 31; ++i
) {
2688 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2689 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2690 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2692 xhci_zero_in_ctx(xhci
, virt_dev
);
2694 * Install any rings for completely new endpoints or changed endpoints,
2695 * and free or cache any old rings from changed endpoints.
2697 for (i
= 1; i
< 31; ++i
) {
2698 if (!virt_dev
->eps
[i
].new_ring
)
2700 /* Only cache or free the old ring if it exists.
2701 * It may not if this is the first add of an endpoint.
2703 if (virt_dev
->eps
[i
].ring
) {
2704 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2706 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2707 virt_dev
->eps
[i
].new_ring
= NULL
;
2713 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2715 struct xhci_hcd
*xhci
;
2716 struct xhci_virt_device
*virt_dev
;
2719 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2722 xhci
= hcd_to_xhci(hcd
);
2724 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2725 virt_dev
= xhci
->devs
[udev
->slot_id
];
2726 /* Free any rings allocated for added endpoints */
2727 for (i
= 0; i
< 31; ++i
) {
2728 if (virt_dev
->eps
[i
].new_ring
) {
2729 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2730 virt_dev
->eps
[i
].new_ring
= NULL
;
2733 xhci_zero_in_ctx(xhci
, virt_dev
);
2736 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2737 struct xhci_container_ctx
*in_ctx
,
2738 struct xhci_container_ctx
*out_ctx
,
2739 u32 add_flags
, u32 drop_flags
)
2741 struct xhci_input_control_ctx
*ctrl_ctx
;
2742 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2743 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2744 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2745 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2746 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2748 xhci_dbg(xhci
, "Input Context:\n");
2749 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2752 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2753 unsigned int slot_id
, unsigned int ep_index
,
2754 struct xhci_dequeue_state
*deq_state
)
2756 struct xhci_container_ctx
*in_ctx
;
2757 struct xhci_ep_ctx
*ep_ctx
;
2761 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2762 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2763 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2764 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2765 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2766 deq_state
->new_deq_ptr
);
2768 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2769 "reset ep command\n");
2770 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2771 deq_state
->new_deq_seg
,
2772 deq_state
->new_deq_ptr
);
2775 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2777 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2778 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2779 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2782 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2783 struct usb_device
*udev
, unsigned int ep_index
)
2785 struct xhci_dequeue_state deq_state
;
2786 struct xhci_virt_ep
*ep
;
2788 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2789 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2790 /* We need to move the HW's dequeue pointer past this TD,
2791 * or it will attempt to resend it on the next doorbell ring.
2793 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2794 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2797 /* HW with the reset endpoint quirk will use the saved dequeue state to
2798 * issue a configure endpoint command later.
2800 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2801 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2802 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2803 ep_index
, ep
->stopped_stream
, &deq_state
);
2805 /* Better hope no one uses the input context between now and the
2806 * reset endpoint completion!
2807 * XXX: No idea how this hardware will react when stream rings
2810 xhci_dbg(xhci
, "Setting up input context for "
2811 "configure endpoint command\n");
2812 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2813 ep_index
, &deq_state
);
2817 /* Deal with stalled endpoints. The core should have sent the control message
2818 * to clear the halt condition. However, we need to make the xHCI hardware
2819 * reset its sequence number, since a device will expect a sequence number of
2820 * zero after the halt condition is cleared.
2821 * Context: in_interrupt
2823 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2824 struct usb_host_endpoint
*ep
)
2826 struct xhci_hcd
*xhci
;
2827 struct usb_device
*udev
;
2828 unsigned int ep_index
;
2829 unsigned long flags
;
2831 struct xhci_virt_ep
*virt_ep
;
2833 xhci
= hcd_to_xhci(hcd
);
2834 udev
= (struct usb_device
*) ep
->hcpriv
;
2835 /* Called with a root hub endpoint (or an endpoint that wasn't added
2836 * with xhci_add_endpoint()
2840 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2841 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2842 if (!virt_ep
->stopped_td
) {
2843 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
2844 ep
->desc
.bEndpointAddress
);
2847 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2848 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
2852 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
2853 spin_lock_irqsave(&xhci
->lock
, flags
);
2854 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2856 * Can't change the ring dequeue pointer until it's transitioned to the
2857 * stopped state, which is only upon a successful reset endpoint
2858 * command. Better hope that last command worked!
2861 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2862 kfree(virt_ep
->stopped_td
);
2863 xhci_ring_cmd_db(xhci
);
2865 virt_ep
->stopped_td
= NULL
;
2866 virt_ep
->stopped_trb
= NULL
;
2867 virt_ep
->stopped_stream
= 0;
2868 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2871 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2874 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2875 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2876 unsigned int slot_id
)
2879 unsigned int ep_index
;
2880 unsigned int ep_state
;
2884 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2887 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2888 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2889 " descriptor for ep 0x%x does not support streams\n",
2890 ep
->desc
.bEndpointAddress
);
2894 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2895 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2896 if (ep_state
& EP_HAS_STREAMS
||
2897 ep_state
& EP_GETTING_STREAMS
) {
2898 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2899 "already has streams set up.\n",
2900 ep
->desc
.bEndpointAddress
);
2901 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2902 "dynamic stream context array reallocation.\n");
2905 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2906 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2907 "endpoint 0x%x; URBs are pending.\n",
2908 ep
->desc
.bEndpointAddress
);
2914 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2915 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2917 unsigned int max_streams
;
2919 /* The stream context array size must be a power of two */
2920 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2922 * Find out how many primary stream array entries the host controller
2923 * supports. Later we may use secondary stream arrays (similar to 2nd
2924 * level page entries), but that's an optional feature for xHCI host
2925 * controllers. xHCs must support at least 4 stream IDs.
2927 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2928 if (*num_stream_ctxs
> max_streams
) {
2929 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2931 *num_stream_ctxs
= max_streams
;
2932 *num_streams
= max_streams
;
2936 /* Returns an error code if one of the endpoint already has streams.
2937 * This does not change any data structures, it only checks and gathers
2940 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2941 struct usb_device
*udev
,
2942 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2943 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2945 unsigned int max_streams
;
2946 unsigned int endpoint_flag
;
2950 for (i
= 0; i
< num_eps
; i
++) {
2951 ret
= xhci_check_streams_endpoint(xhci
, udev
,
2952 eps
[i
], udev
->slot_id
);
2956 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
2957 if (max_streams
< (*num_streams
- 1)) {
2958 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
2959 eps
[i
]->desc
.bEndpointAddress
,
2961 *num_streams
= max_streams
+1;
2964 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
2965 if (*changed_ep_bitmask
& endpoint_flag
)
2967 *changed_ep_bitmask
|= endpoint_flag
;
2972 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
2973 struct usb_device
*udev
,
2974 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
2976 u32 changed_ep_bitmask
= 0;
2977 unsigned int slot_id
;
2978 unsigned int ep_index
;
2979 unsigned int ep_state
;
2982 slot_id
= udev
->slot_id
;
2983 if (!xhci
->devs
[slot_id
])
2986 for (i
= 0; i
< num_eps
; i
++) {
2987 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2988 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2989 /* Are streams already being freed for the endpoint? */
2990 if (ep_state
& EP_GETTING_NO_STREAMS
) {
2991 xhci_warn(xhci
, "WARN Can't disable streams for "
2993 "streams are being disabled already.",
2994 eps
[i
]->desc
.bEndpointAddress
);
2997 /* Are there actually any streams to free? */
2998 if (!(ep_state
& EP_HAS_STREAMS
) &&
2999 !(ep_state
& EP_GETTING_STREAMS
)) {
3000 xhci_warn(xhci
, "WARN Can't disable streams for "
3002 "streams are already disabled!",
3003 eps
[i
]->desc
.bEndpointAddress
);
3004 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3005 "with non-streams endpoint\n");
3008 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3010 return changed_ep_bitmask
;
3014 * The USB device drivers use this function (though the HCD interface in USB
3015 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3016 * coordinate mass storage command queueing across multiple endpoints (basically
3017 * a stream ID == a task ID).
3019 * Setting up streams involves allocating the same size stream context array
3020 * for each endpoint and issuing a configure endpoint command for all endpoints.
3022 * Don't allow the call to succeed if one endpoint only supports one stream
3023 * (which means it doesn't support streams at all).
3025 * Drivers may get less stream IDs than they asked for, if the host controller
3026 * hardware or endpoints claim they can't support the number of requested
3029 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3030 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3031 unsigned int num_streams
, gfp_t mem_flags
)
3034 struct xhci_hcd
*xhci
;
3035 struct xhci_virt_device
*vdev
;
3036 struct xhci_command
*config_cmd
;
3037 unsigned int ep_index
;
3038 unsigned int num_stream_ctxs
;
3039 unsigned long flags
;
3040 u32 changed_ep_bitmask
= 0;
3045 /* Add one to the number of streams requested to account for
3046 * stream 0 that is reserved for xHCI usage.
3049 xhci
= hcd_to_xhci(hcd
);
3050 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3053 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3055 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3059 /* Check to make sure all endpoints are not already configured for
3060 * streams. While we're at it, find the maximum number of streams that
3061 * all the endpoints will support and check for duplicate endpoints.
3063 spin_lock_irqsave(&xhci
->lock
, flags
);
3064 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3065 num_eps
, &num_streams
, &changed_ep_bitmask
);
3067 xhci_free_command(xhci
, config_cmd
);
3068 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3071 if (num_streams
<= 1) {
3072 xhci_warn(xhci
, "WARN: endpoints can't handle "
3073 "more than one stream.\n");
3074 xhci_free_command(xhci
, config_cmd
);
3075 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3078 vdev
= xhci
->devs
[udev
->slot_id
];
3079 /* Mark each endpoint as being in transition, so
3080 * xhci_urb_enqueue() will reject all URBs.
3082 for (i
= 0; i
< num_eps
; i
++) {
3083 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3084 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3086 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3088 /* Setup internal data structures and allocate HW data structures for
3089 * streams (but don't install the HW structures in the input context
3090 * until we're sure all memory allocation succeeded).
3092 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3093 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3094 num_stream_ctxs
, num_streams
);
3096 for (i
= 0; i
< num_eps
; i
++) {
3097 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3098 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3100 num_streams
, mem_flags
);
3101 if (!vdev
->eps
[ep_index
].stream_info
)
3103 /* Set maxPstreams in endpoint context and update deq ptr to
3104 * point to stream context array. FIXME
3108 /* Set up the input context for a configure endpoint command. */
3109 for (i
= 0; i
< num_eps
; i
++) {
3110 struct xhci_ep_ctx
*ep_ctx
;
3112 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3113 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3115 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3116 vdev
->out_ctx
, ep_index
);
3117 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3118 vdev
->eps
[ep_index
].stream_info
);
3120 /* Tell the HW to drop its old copy of the endpoint context info
3121 * and add the updated copy from the input context.
3123 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3124 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3126 /* Issue and wait for the configure endpoint command */
3127 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3130 /* xHC rejected the configure endpoint command for some reason, so we
3131 * leave the old ring intact and free our internal streams data
3137 spin_lock_irqsave(&xhci
->lock
, flags
);
3138 for (i
= 0; i
< num_eps
; i
++) {
3139 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3140 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3141 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3142 udev
->slot_id
, ep_index
);
3143 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3145 xhci_free_command(xhci
, config_cmd
);
3146 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3148 /* Subtract 1 for stream 0, which drivers can't use */
3149 return num_streams
- 1;
3152 /* If it didn't work, free the streams! */
3153 for (i
= 0; i
< num_eps
; i
++) {
3154 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3155 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3156 vdev
->eps
[ep_index
].stream_info
= NULL
;
3157 /* FIXME Unset maxPstreams in endpoint context and
3158 * update deq ptr to point to normal string ring.
3160 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3161 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3162 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3164 xhci_free_command(xhci
, config_cmd
);
3168 /* Transition the endpoint from using streams to being a "normal" endpoint
3171 * Modify the endpoint context state, submit a configure endpoint command,
3172 * and free all endpoint rings for streams if that completes successfully.
3174 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3175 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3179 struct xhci_hcd
*xhci
;
3180 struct xhci_virt_device
*vdev
;
3181 struct xhci_command
*command
;
3182 unsigned int ep_index
;
3183 unsigned long flags
;
3184 u32 changed_ep_bitmask
;
3186 xhci
= hcd_to_xhci(hcd
);
3187 vdev
= xhci
->devs
[udev
->slot_id
];
3189 /* Set up a configure endpoint command to remove the streams rings */
3190 spin_lock_irqsave(&xhci
->lock
, flags
);
3191 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3192 udev
, eps
, num_eps
);
3193 if (changed_ep_bitmask
== 0) {
3194 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3198 /* Use the xhci_command structure from the first endpoint. We may have
3199 * allocated too many, but the driver may call xhci_free_streams() for
3200 * each endpoint it grouped into one call to xhci_alloc_streams().
3202 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3203 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3204 for (i
= 0; i
< num_eps
; i
++) {
3205 struct xhci_ep_ctx
*ep_ctx
;
3207 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3208 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3209 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3210 EP_GETTING_NO_STREAMS
;
3212 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3213 vdev
->out_ctx
, ep_index
);
3214 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3215 &vdev
->eps
[ep_index
]);
3217 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3218 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3219 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3221 /* Issue and wait for the configure endpoint command,
3222 * which must succeed.
3224 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3227 /* xHC rejected the configure endpoint command for some reason, so we
3228 * leave the streams rings intact.
3233 spin_lock_irqsave(&xhci
->lock
, flags
);
3234 for (i
= 0; i
< num_eps
; i
++) {
3235 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3236 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3237 vdev
->eps
[ep_index
].stream_info
= NULL
;
3238 /* FIXME Unset maxPstreams in endpoint context and
3239 * update deq ptr to point to normal string ring.
3241 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3242 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3244 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3250 * Deletes endpoint resources for endpoints that were active before a Reset
3251 * Device command, or a Disable Slot command. The Reset Device command leaves
3252 * the control endpoint intact, whereas the Disable Slot command deletes it.
3254 * Must be called with xhci->lock held.
3256 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3257 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3260 unsigned int num_dropped_eps
= 0;
3261 unsigned int drop_flags
= 0;
3263 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3264 if (virt_dev
->eps
[i
].ring
) {
3265 drop_flags
|= 1 << i
;
3269 xhci
->num_active_eps
-= num_dropped_eps
;
3270 if (num_dropped_eps
)
3271 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3273 num_dropped_eps
, drop_flags
,
3274 xhci
->num_active_eps
);
3278 * This submits a Reset Device Command, which will set the device state to 0,
3279 * set the device address to 0, and disable all the endpoints except the default
3280 * control endpoint. The USB core should come back and call
3281 * xhci_address_device(), and then re-set up the configuration. If this is
3282 * called because of a usb_reset_and_verify_device(), then the old alternate
3283 * settings will be re-installed through the normal bandwidth allocation
3286 * Wait for the Reset Device command to finish. Remove all structures
3287 * associated with the endpoints that were disabled. Clear the input device
3288 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3290 * If the virt_dev to be reset does not exist or does not match the udev,
3291 * it means the device is lost, possibly due to the xHC restore error and
3292 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3293 * re-allocate the device.
3295 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3298 unsigned long flags
;
3299 struct xhci_hcd
*xhci
;
3300 unsigned int slot_id
;
3301 struct xhci_virt_device
*virt_dev
;
3302 struct xhci_command
*reset_device_cmd
;
3304 int last_freed_endpoint
;
3305 struct xhci_slot_ctx
*slot_ctx
;
3306 int old_active_eps
= 0;
3308 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3311 xhci
= hcd_to_xhci(hcd
);
3312 slot_id
= udev
->slot_id
;
3313 virt_dev
= xhci
->devs
[slot_id
];
3315 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3316 "not exist. Re-allocate the device\n", slot_id
);
3317 ret
= xhci_alloc_dev(hcd
, udev
);
3324 if (virt_dev
->udev
!= udev
) {
3325 /* If the virt_dev and the udev does not match, this virt_dev
3326 * may belong to another udev.
3327 * Re-allocate the device.
3329 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3330 "not match the udev. Re-allocate the device\n",
3332 ret
= xhci_alloc_dev(hcd
, udev
);
3339 /* If device is not setup, there is no point in resetting it */
3340 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3341 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3342 SLOT_STATE_DISABLED
)
3345 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3346 /* Allocate the command structure that holds the struct completion.
3347 * Assume we're in process context, since the normal device reset
3348 * process has to wait for the device anyway. Storage devices are
3349 * reset as part of error handling, so use GFP_NOIO instead of
3352 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3353 if (!reset_device_cmd
) {
3354 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3358 /* Attempt to submit the Reset Device command to the command ring */
3359 spin_lock_irqsave(&xhci
->lock
, flags
);
3360 reset_device_cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
3362 /* Enqueue pointer can be left pointing to the link TRB,
3363 * we must handle that
3365 if (TRB_TYPE_LINK_LE32(reset_device_cmd
->command_trb
->link
.control
))
3366 reset_device_cmd
->command_trb
=
3367 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
3369 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3370 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3372 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3373 list_del(&reset_device_cmd
->cmd_list
);
3374 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3375 goto command_cleanup
;
3377 xhci_ring_cmd_db(xhci
);
3378 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3380 /* Wait for the Reset Device command to finish */
3381 timeleft
= wait_for_completion_interruptible_timeout(
3382 reset_device_cmd
->completion
,
3383 USB_CTRL_SET_TIMEOUT
);
3384 if (timeleft
<= 0) {
3385 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3386 timeleft
== 0 ? "Timeout" : "Signal");
3387 spin_lock_irqsave(&xhci
->lock
, flags
);
3388 /* The timeout might have raced with the event ring handler, so
3389 * only delete from the list if the item isn't poisoned.
3391 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3392 list_del(&reset_device_cmd
->cmd_list
);
3393 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3395 goto command_cleanup
;
3398 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3399 * unless we tried to reset a slot ID that wasn't enabled,
3400 * or the device wasn't in the addressed or configured state.
3402 ret
= reset_device_cmd
->status
;
3404 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3405 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3406 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3408 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3409 xhci_info(xhci
, "Not freeing device rings.\n");
3410 /* Don't treat this as an error. May change my mind later. */
3412 goto command_cleanup
;
3414 xhci_dbg(xhci
, "Successful reset device command.\n");
3417 if (xhci_is_vendor_info_code(xhci
, ret
))
3419 xhci_warn(xhci
, "Unknown completion code %u for "
3420 "reset device command.\n", ret
);
3422 goto command_cleanup
;
3425 /* Free up host controller endpoint resources */
3426 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3427 spin_lock_irqsave(&xhci
->lock
, flags
);
3428 /* Don't delete the default control endpoint resources */
3429 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3430 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3433 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3434 last_freed_endpoint
= 1;
3435 for (i
= 1; i
< 31; ++i
) {
3436 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3438 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3439 xhci_free_stream_info(xhci
, ep
->stream_info
);
3440 ep
->stream_info
= NULL
;
3441 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3445 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3446 last_freed_endpoint
= i
;
3448 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3449 xhci_drop_ep_from_interval_table(xhci
,
3450 &virt_dev
->eps
[i
].bw_info
,
3455 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3457 /* If necessary, update the number of active TTs on this root port */
3458 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3460 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3461 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3465 xhci_free_command(xhci
, reset_device_cmd
);
3470 * At this point, the struct usb_device is about to go away, the device has
3471 * disconnected, and all traffic has been stopped and the endpoints have been
3472 * disabled. Free any HC data structures associated with that device.
3474 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3476 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3477 struct xhci_virt_device
*virt_dev
;
3478 unsigned long flags
;
3482 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3483 /* If the host is halted due to driver unload, we still need to free the
3486 if (ret
<= 0 && ret
!= -ENODEV
)
3489 virt_dev
= xhci
->devs
[udev
->slot_id
];
3491 /* Stop any wayward timer functions (which may grab the lock) */
3492 for (i
= 0; i
< 31; ++i
) {
3493 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3494 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3497 if (udev
->usb2_hw_lpm_enabled
) {
3498 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3499 udev
->usb2_hw_lpm_enabled
= 0;
3502 spin_lock_irqsave(&xhci
->lock
, flags
);
3503 /* Don't disable the slot if the host controller is dead. */
3504 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3505 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3506 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3507 xhci_free_virt_device(xhci
, udev
->slot_id
);
3508 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3512 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3513 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3514 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3517 xhci_ring_cmd_db(xhci
);
3518 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3520 * Event command completion handler will free any data structures
3521 * associated with the slot. XXX Can free sleep?
3526 * Checks if we have enough host controller resources for the default control
3529 * Must be called with xhci->lock held.
3531 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3533 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3534 xhci_dbg(xhci
, "Not enough ep ctxs: "
3535 "%u active, need to add 1, limit is %u.\n",
3536 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3539 xhci
->num_active_eps
+= 1;
3540 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3541 xhci
->num_active_eps
);
3547 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3548 * timed out, or allocating memory failed. Returns 1 on success.
3550 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3552 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3553 unsigned long flags
;
3556 union xhci_trb
*cmd_trb
;
3558 spin_lock_irqsave(&xhci
->lock
, flags
);
3559 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3560 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3562 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3563 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3566 xhci_ring_cmd_db(xhci
);
3567 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3569 /* XXX: how much time for xHC slot assignment? */
3570 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3571 XHCI_CMD_DEFAULT_TIMEOUT
);
3572 if (timeleft
<= 0) {
3573 xhci_warn(xhci
, "%s while waiting for a slot\n",
3574 timeleft
== 0 ? "Timeout" : "Signal");
3575 /* cancel the enable slot request */
3576 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3579 if (!xhci
->slot_id
) {
3580 xhci_err(xhci
, "Error while assigning device slot ID\n");
3584 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3585 spin_lock_irqsave(&xhci
->lock
, flags
);
3586 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3588 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3589 xhci_warn(xhci
, "Not enough host resources, "
3590 "active endpoint contexts = %u\n",
3591 xhci
->num_active_eps
);
3594 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3596 /* Use GFP_NOIO, since this function can be called from
3597 * xhci_discover_or_reset_device(), which may be called as part of
3598 * mass storage driver error handling.
3600 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3601 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3604 udev
->slot_id
= xhci
->slot_id
;
3605 /* Is this a LS or FS device under a HS hub? */
3606 /* Hub or peripherial? */
3610 /* Disable slot, if we can do it without mem alloc */
3611 spin_lock_irqsave(&xhci
->lock
, flags
);
3612 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3613 xhci_ring_cmd_db(xhci
);
3614 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3619 * Issue an Address Device command (which will issue a SetAddress request to
3621 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3622 * we should only issue and wait on one address command at the same time.
3624 * We add one to the device address issued by the hardware because the USB core
3625 * uses address 1 for the root hubs (even though they're not really devices).
3627 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3629 unsigned long flags
;
3631 struct xhci_virt_device
*virt_dev
;
3633 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3634 struct xhci_slot_ctx
*slot_ctx
;
3635 struct xhci_input_control_ctx
*ctrl_ctx
;
3637 union xhci_trb
*cmd_trb
;
3639 if (!udev
->slot_id
) {
3640 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3644 virt_dev
= xhci
->devs
[udev
->slot_id
];
3646 if (WARN_ON(!virt_dev
)) {
3648 * In plug/unplug torture test with an NEC controller,
3649 * a zero-dereference was observed once due to virt_dev = 0.
3650 * Print useful debug rather than crash if it is observed again!
3652 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3657 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3659 * If this is the first Set Address since device plug-in or
3660 * virt_device realloaction after a resume with an xHCI power loss,
3661 * then set up the slot context.
3663 if (!slot_ctx
->dev_info
)
3664 xhci_setup_addressable_virt_dev(xhci
, udev
);
3665 /* Otherwise, update the control endpoint ring enqueue pointer. */
3667 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3668 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3669 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3670 ctrl_ctx
->drop_flags
= 0;
3672 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3673 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3675 spin_lock_irqsave(&xhci
->lock
, flags
);
3676 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3677 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3680 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3681 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3684 xhci_ring_cmd_db(xhci
);
3685 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3687 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3688 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3689 XHCI_CMD_DEFAULT_TIMEOUT
);
3690 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3691 * the SetAddress() "recovery interval" required by USB and aborting the
3692 * command on a timeout.
3694 if (timeleft
<= 0) {
3695 xhci_warn(xhci
, "%s while waiting for address device command\n",
3696 timeleft
== 0 ? "Timeout" : "Signal");
3697 /* cancel the address device command */
3698 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3704 switch (virt_dev
->cmd_status
) {
3705 case COMP_CTX_STATE
:
3707 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3712 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3716 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3717 "device command.\n");
3721 xhci_dbg(xhci
, "Successful Address Device command\n");
3724 xhci_err(xhci
, "ERROR: unexpected command completion "
3725 "code 0x%x.\n", virt_dev
->cmd_status
);
3726 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3727 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3734 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3735 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3736 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3738 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3739 (unsigned long long)
3740 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3741 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3742 (unsigned long long)virt_dev
->out_ctx
->dma
);
3743 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3744 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3745 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3746 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3748 * USB core uses address 1 for the roothubs, so we add one to the
3749 * address given back to us by the HC.
3751 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3752 /* Use kernel assigned address for devices; store xHC assigned
3753 * address locally. */
3754 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3756 /* Zero the input context control for later use */
3757 ctrl_ctx
->add_flags
= 0;
3758 ctrl_ctx
->drop_flags
= 0;
3760 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3765 #ifdef CONFIG_USB_SUSPEND
3767 /* BESL to HIRD Encoding array for USB2 LPM */
3768 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3769 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3771 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3772 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3773 struct usb_device
*udev
)
3775 int u2del
, besl
, besl_host
;
3776 int besl_device
= 0;
3779 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3780 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3782 if (field
& USB_BESL_SUPPORT
) {
3783 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3784 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3787 /* Use baseline BESL value as default */
3788 if (field
& USB_BESL_BASELINE_VALID
)
3789 besl_device
= USB_GET_BESL_BASELINE(field
);
3790 else if (field
& USB_BESL_DEEP_VALID
)
3791 besl_device
= USB_GET_BESL_DEEP(field
);
3796 besl_host
= (u2del
- 51) / 75 + 1;
3799 besl
= besl_host
+ besl_device
;
3806 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
3807 struct usb_device
*udev
)
3809 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3810 struct dev_info
*dev_info
;
3811 __le32 __iomem
**port_array
;
3812 __le32 __iomem
*addr
, *pm_addr
;
3814 unsigned int port_num
;
3815 unsigned long flags
;
3819 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
3823 /* we only support lpm for non-hub device connected to root hub yet */
3824 if (!udev
->parent
|| udev
->parent
->parent
||
3825 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3828 spin_lock_irqsave(&xhci
->lock
, flags
);
3830 /* Look for devices in lpm_failed_devs list */
3831 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
3832 le16_to_cpu(udev
->descriptor
.idProduct
);
3833 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
3834 if (dev_info
->dev_id
== dev_id
) {
3840 port_array
= xhci
->usb2_ports
;
3841 port_num
= udev
->portnum
- 1;
3843 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
3844 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
3850 * Test USB 2.0 software LPM.
3851 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3852 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3853 * in the June 2011 errata release.
3855 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
3857 * Set L1 Device Slot and HIRD/BESL.
3858 * Check device's USB 2.0 extension descriptor to determine whether
3859 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3861 pm_addr
= port_array
[port_num
] + 1;
3862 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3863 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
3864 xhci_writel(xhci
, temp
, pm_addr
);
3866 /* Set port link state to U2(L1) */
3867 addr
= port_array
[port_num
];
3868 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
3871 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3873 spin_lock_irqsave(&xhci
->lock
, flags
);
3875 /* Check L1 Status */
3876 ret
= handshake(xhci
, pm_addr
, PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
3877 if (ret
!= -ETIMEDOUT
) {
3878 /* enter L1 successfully */
3879 temp
= xhci_readl(xhci
, addr
);
3880 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
3884 temp
= xhci_readl(xhci
, pm_addr
);
3885 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
3886 port_num
, temp
& PORT_L1S_MASK
);
3890 /* Resume the port */
3891 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
3893 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3895 spin_lock_irqsave(&xhci
->lock
, flags
);
3898 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
3900 /* Check PORTSC to make sure the device is in the right state */
3902 temp
= xhci_readl(xhci
, addr
);
3903 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
3904 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
3905 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
3906 xhci_dbg(xhci
, "port L1 resume fail\n");
3912 /* Insert dev to lpm_failed_devs list */
3913 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
3915 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
3920 dev_info
->dev_id
= dev_id
;
3921 INIT_LIST_HEAD(&dev_info
->list
);
3922 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
3924 xhci_ring_device(xhci
, udev
->slot_id
);
3928 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3932 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
3933 struct usb_device
*udev
, int enable
)
3935 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3936 __le32 __iomem
**port_array
;
3937 __le32 __iomem
*pm_addr
;
3939 unsigned int port_num
;
3940 unsigned long flags
;
3943 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
3947 if (!udev
->parent
|| udev
->parent
->parent
||
3948 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3951 if (udev
->usb2_hw_lpm_capable
!= 1)
3954 spin_lock_irqsave(&xhci
->lock
, flags
);
3956 port_array
= xhci
->usb2_ports
;
3957 port_num
= udev
->portnum
- 1;
3958 pm_addr
= port_array
[port_num
] + 1;
3959 temp
= xhci_readl(xhci
, pm_addr
);
3961 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
3962 enable
? "enable" : "disable", port_num
);
3964 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3967 temp
&= ~PORT_HIRD_MASK
;
3968 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
3969 xhci_writel(xhci
, temp
, pm_addr
);
3970 temp
= xhci_readl(xhci
, pm_addr
);
3972 xhci_writel(xhci
, temp
, pm_addr
);
3974 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
3975 xhci_writel(xhci
, temp
, pm_addr
);
3978 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3982 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3984 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3987 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
3989 xhci_dbg(xhci
, "software LPM test succeed\n");
3990 if (xhci
->hw_lpm_support
== 1) {
3991 udev
->usb2_hw_lpm_capable
= 1;
3992 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
3994 udev
->usb2_hw_lpm_enabled
= 1;
4003 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4004 struct usb_device
*udev
, int enable
)
4009 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4014 #endif /* CONFIG_USB_SUSPEND */
4016 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4019 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4020 static unsigned long long xhci_service_interval_to_ns(
4021 struct usb_endpoint_descriptor
*desc
)
4023 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4026 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4027 enum usb3_link_state state
)
4029 unsigned long long sel
;
4030 unsigned long long pel
;
4031 unsigned int max_sel_pel
;
4036 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4037 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4038 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4039 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4043 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4044 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4045 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4049 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4051 return USB3_LPM_DISABLED
;
4054 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4055 return USB3_LPM_DEVICE_INITIATED
;
4057 if (sel
> max_sel_pel
)
4058 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4059 "due to long SEL %llu ms\n",
4062 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4063 "due to long PEL %llu\n ms",
4065 return USB3_LPM_DISABLED
;
4068 /* Returns the hub-encoded U1 timeout value.
4069 * The U1 timeout should be the maximum of the following values:
4070 * - For control endpoints, U1 system exit latency (SEL) * 3
4071 * - For bulk endpoints, U1 SEL * 5
4072 * - For interrupt endpoints:
4073 * - Notification EPs, U1 SEL * 3
4074 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4075 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4077 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4078 struct usb_endpoint_descriptor
*desc
)
4080 unsigned long long timeout_ns
;
4084 ep_type
= usb_endpoint_type(desc
);
4086 case USB_ENDPOINT_XFER_CONTROL
:
4087 timeout_ns
= udev
->u1_params
.sel
* 3;
4089 case USB_ENDPOINT_XFER_BULK
:
4090 timeout_ns
= udev
->u1_params
.sel
* 5;
4092 case USB_ENDPOINT_XFER_INT
:
4093 intr_type
= usb_endpoint_interrupt_type(desc
);
4094 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4095 timeout_ns
= udev
->u1_params
.sel
* 3;
4098 /* Otherwise the calculation is the same as isoc eps */
4099 case USB_ENDPOINT_XFER_ISOC
:
4100 timeout_ns
= xhci_service_interval_to_ns(desc
);
4101 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4102 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4103 timeout_ns
= udev
->u1_params
.sel
* 2;
4109 /* The U1 timeout is encoded in 1us intervals. */
4110 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4111 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4112 if (timeout_ns
== USB3_LPM_DISABLED
)
4115 /* If the necessary timeout value is bigger than what we can set in the
4116 * USB 3.0 hub, we have to disable hub-initiated U1.
4118 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4120 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4121 "due to long timeout %llu ms\n", timeout_ns
);
4122 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4125 /* Returns the hub-encoded U2 timeout value.
4126 * The U2 timeout should be the maximum of:
4127 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4128 * - largest bInterval of any active periodic endpoint (to avoid going
4129 * into lower power link states between intervals).
4130 * - the U2 Exit Latency of the device
4132 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4133 struct usb_endpoint_descriptor
*desc
)
4135 unsigned long long timeout_ns
;
4136 unsigned long long u2_del_ns
;
4138 timeout_ns
= 10 * 1000 * 1000;
4140 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4141 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4142 timeout_ns
= xhci_service_interval_to_ns(desc
);
4144 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4145 if (u2_del_ns
> timeout_ns
)
4146 timeout_ns
= u2_del_ns
;
4148 /* The U2 timeout is encoded in 256us intervals */
4149 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4150 /* If the necessary timeout value is bigger than what we can set in the
4151 * USB 3.0 hub, we have to disable hub-initiated U2.
4153 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4155 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4156 "due to long timeout %llu ms\n", timeout_ns
);
4157 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4160 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4161 struct usb_device
*udev
,
4162 struct usb_endpoint_descriptor
*desc
,
4163 enum usb3_link_state state
,
4166 if (state
== USB3_LPM_U1
) {
4167 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4168 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4170 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4171 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4174 return USB3_LPM_DISABLED
;
4177 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4178 struct usb_device
*udev
,
4179 struct usb_endpoint_descriptor
*desc
,
4180 enum usb3_link_state state
,
4185 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4186 desc
, state
, timeout
);
4188 /* If we found we can't enable hub-initiated LPM, or
4189 * the U1 or U2 exit latency was too high to allow
4190 * device-initiated LPM as well, just stop searching.
4192 if (alt_timeout
== USB3_LPM_DISABLED
||
4193 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4194 *timeout
= alt_timeout
;
4197 if (alt_timeout
> *timeout
)
4198 *timeout
= alt_timeout
;
4202 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4203 struct usb_device
*udev
,
4204 struct usb_host_interface
*alt
,
4205 enum usb3_link_state state
,
4210 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4211 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4212 &alt
->endpoint
[j
].desc
, state
, timeout
))
4219 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4220 enum usb3_link_state state
)
4222 struct usb_device
*parent
;
4223 unsigned int num_hubs
;
4225 if (state
== USB3_LPM_U2
)
4228 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4229 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4230 parent
= parent
->parent
)
4236 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4237 " below second-tier hub.\n");
4238 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4239 "to decrease power consumption.\n");
4243 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4244 struct usb_device
*udev
,
4245 enum usb3_link_state state
)
4247 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4248 return xhci_check_intel_tier_policy(udev
, state
);
4252 /* Returns the U1 or U2 timeout that should be enabled.
4253 * If the tier check or timeout setting functions return with a non-zero exit
4254 * code, that means the timeout value has been finalized and we shouldn't look
4255 * at any more endpoints.
4257 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4258 struct usb_device
*udev
, enum usb3_link_state state
)
4260 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4261 struct usb_host_config
*config
;
4264 u16 timeout
= USB3_LPM_DISABLED
;
4266 if (state
== USB3_LPM_U1
)
4268 else if (state
== USB3_LPM_U2
)
4271 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4276 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4279 /* Gather some information about the currently installed configuration
4280 * and alternate interface settings.
4282 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4286 config
= udev
->actconfig
;
4290 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4291 struct usb_driver
*driver
;
4292 struct usb_interface
*intf
= config
->interface
[i
];
4297 /* Check if any currently bound drivers want hub-initiated LPM
4300 if (intf
->dev
.driver
) {
4301 driver
= to_usb_driver(intf
->dev
.driver
);
4302 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4303 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4304 "at request of driver %s\n",
4305 state_name
, driver
->name
);
4306 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4310 /* Not sure how this could happen... */
4311 if (!intf
->cur_altsetting
)
4314 if (xhci_update_timeout_for_interface(xhci
, udev
,
4315 intf
->cur_altsetting
,
4323 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4324 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4326 static int xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
4327 struct usb_device
*udev
, u16 max_exit_latency
)
4329 struct xhci_virt_device
*virt_dev
;
4330 struct xhci_command
*command
;
4331 struct xhci_input_control_ctx
*ctrl_ctx
;
4332 struct xhci_slot_ctx
*slot_ctx
;
4333 unsigned long flags
;
4336 spin_lock_irqsave(&xhci
->lock
, flags
);
4337 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
4338 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4342 /* Attempt to issue an Evaluate Context command to change the MEL. */
4343 virt_dev
= xhci
->devs
[udev
->slot_id
];
4344 command
= xhci
->lpm_command
;
4345 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
4346 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4348 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
4349 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4350 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
4351 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
4352 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
4354 xhci_dbg(xhci
, "Set up evaluate context for LPM MEL change.\n");
4355 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
4356 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
4358 /* Issue and wait for the evaluate context command. */
4359 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
4361 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
4362 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
4365 spin_lock_irqsave(&xhci
->lock
, flags
);
4366 virt_dev
->current_mel
= max_exit_latency
;
4367 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4372 static int calculate_max_exit_latency(struct usb_device
*udev
,
4373 enum usb3_link_state state_changed
,
4374 u16 hub_encoded_timeout
)
4376 unsigned long long u1_mel_us
= 0;
4377 unsigned long long u2_mel_us
= 0;
4378 unsigned long long mel_us
= 0;
4384 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4385 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4386 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4387 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4389 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4390 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4391 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4392 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4394 /* If U1 was already enabled and we're not disabling it,
4395 * or we're going to enable U1, account for the U1 max exit latency.
4397 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4399 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4400 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4402 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4404 if (u1_mel_us
> u2_mel_us
)
4408 /* xHCI host controller max exit latency field is only 16 bits wide. */
4409 if (mel_us
> MAX_EXIT
) {
4410 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4411 "is too big.\n", mel_us
);
4417 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4418 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4419 struct usb_device
*udev
, enum usb3_link_state state
)
4421 struct xhci_hcd
*xhci
;
4422 u16 hub_encoded_timeout
;
4426 xhci
= hcd_to_xhci(hcd
);
4427 /* The LPM timeout values are pretty host-controller specific, so don't
4428 * enable hub-initiated timeouts unless the vendor has provided
4429 * information about their timeout algorithm.
4431 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4432 !xhci
->devs
[udev
->slot_id
])
4433 return USB3_LPM_DISABLED
;
4435 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4436 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4438 /* Max Exit Latency is too big, disable LPM. */
4439 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4443 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4446 return hub_encoded_timeout
;
4449 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4450 struct usb_device
*udev
, enum usb3_link_state state
)
4452 struct xhci_hcd
*xhci
;
4456 xhci
= hcd_to_xhci(hcd
);
4457 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4458 !xhci
->devs
[udev
->slot_id
])
4461 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4462 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4467 #else /* CONFIG_PM */
4469 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4470 struct usb_device
*udev
, enum usb3_link_state state
)
4472 return USB3_LPM_DISABLED
;
4475 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4476 struct usb_device
*udev
, enum usb3_link_state state
)
4480 #endif /* CONFIG_PM */
4482 /*-------------------------------------------------------------------------*/
4484 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4485 * internal data structures for the device.
4487 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4488 struct usb_tt
*tt
, gfp_t mem_flags
)
4490 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4491 struct xhci_virt_device
*vdev
;
4492 struct xhci_command
*config_cmd
;
4493 struct xhci_input_control_ctx
*ctrl_ctx
;
4494 struct xhci_slot_ctx
*slot_ctx
;
4495 unsigned long flags
;
4496 unsigned think_time
;
4499 /* Ignore root hubs */
4503 vdev
= xhci
->devs
[hdev
->slot_id
];
4505 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4508 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4510 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4514 spin_lock_irqsave(&xhci
->lock
, flags
);
4515 if (hdev
->speed
== USB_SPEED_HIGH
&&
4516 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4517 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4518 xhci_free_command(xhci
, config_cmd
);
4519 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4523 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4524 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4525 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4526 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4527 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4529 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4530 if (xhci
->hci_version
> 0x95) {
4531 xhci_dbg(xhci
, "xHCI version %x needs hub "
4532 "TT think time and number of ports\n",
4533 (unsigned int) xhci
->hci_version
);
4534 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4535 /* Set TT think time - convert from ns to FS bit times.
4536 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4537 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4539 * xHCI 1.0: this field shall be 0 if the device is not a
4542 think_time
= tt
->think_time
;
4543 if (think_time
!= 0)
4544 think_time
= (think_time
/ 666) - 1;
4545 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4546 slot_ctx
->tt_info
|=
4547 cpu_to_le32(TT_THINK_TIME(think_time
));
4549 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4550 "TT think time or number of ports\n",
4551 (unsigned int) xhci
->hci_version
);
4553 slot_ctx
->dev_state
= 0;
4554 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4556 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4557 (xhci
->hci_version
> 0x95) ?
4558 "configure endpoint" : "evaluate context");
4559 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4560 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4562 /* Issue and wait for the configure endpoint or
4563 * evaluate context command.
4565 if (xhci
->hci_version
> 0x95)
4566 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4569 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4572 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4573 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4575 xhci_free_command(xhci
, config_cmd
);
4579 int xhci_get_frame(struct usb_hcd
*hcd
)
4581 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4582 /* EHCI mods by the periodic size. Why? */
4583 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4586 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4588 struct xhci_hcd
*xhci
;
4589 struct device
*dev
= hcd
->self
.controller
;
4593 /* Accept arbitrarily long scatter-gather lists */
4594 hcd
->self
.sg_tablesize
= ~0;
4595 /* XHCI controllers don't stop the ep queue on short packets :| */
4596 hcd
->self
.no_stop_on_short
= 1;
4598 if (usb_hcd_is_primary_hcd(hcd
)) {
4599 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4602 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4603 xhci
->main_hcd
= hcd
;
4604 /* Mark the first roothub as being USB 2.0.
4605 * The xHCI driver will register the USB 3.0 roothub.
4607 hcd
->speed
= HCD_USB2
;
4608 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4610 * USB 2.0 roothub under xHCI has an integrated TT,
4611 * (rate matching hub) as opposed to having an OHCI/UHCI
4612 * companion controller.
4616 /* xHCI private pointer was set in xhci_pci_probe for the second
4617 * registered roothub.
4619 xhci
= hcd_to_xhci(hcd
);
4620 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4621 if (HCC_64BIT_ADDR(temp
)) {
4622 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4623 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4625 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4630 xhci
->cap_regs
= hcd
->regs
;
4631 xhci
->op_regs
= hcd
->regs
+
4632 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4633 xhci
->run_regs
= hcd
->regs
+
4634 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4635 /* Cache read-only capability registers */
4636 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4637 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4638 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4639 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4640 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4641 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4642 xhci_print_registers(xhci
);
4644 get_quirks(dev
, xhci
);
4646 /* Make sure the HC is halted. */
4647 retval
= xhci_halt(xhci
);
4651 xhci_dbg(xhci
, "Resetting HCD\n");
4652 /* Reset the internal HC memory state and registers. */
4653 retval
= xhci_reset(xhci
);
4656 xhci_dbg(xhci
, "Reset complete\n");
4658 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4659 if (HCC_64BIT_ADDR(temp
)) {
4660 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4661 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4663 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4666 xhci_dbg(xhci
, "Calling HCD init\n");
4667 /* Initialize HCD and host controller data structures. */
4668 retval
= xhci_init(hcd
);
4671 xhci_dbg(xhci
, "Called HCD init\n");
4678 MODULE_DESCRIPTION(DRIVER_DESC
);
4679 MODULE_AUTHOR(DRIVER_AUTHOR
);
4680 MODULE_LICENSE("GPL");
4682 static int __init
xhci_hcd_init(void)
4686 retval
= xhci_register_pci();
4688 printk(KERN_DEBUG
"Problem registering PCI driver.");
4691 retval
= xhci_register_plat();
4693 printk(KERN_DEBUG
"Problem registering platform driver.");
4697 * Check the compiler generated sizes of structures that must be laid
4698 * out in specific ways for hardware access.
4700 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4701 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4702 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4703 /* xhci_device_control has eight fields, and also
4704 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4706 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4707 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4708 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4709 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4710 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4711 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4712 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4715 xhci_unregister_pci();
4718 module_init(xhci_hcd_init
);
4720 static void __exit
xhci_hcd_cleanup(void)
4722 xhci_unregister_pci();
4723 xhci_unregister_plat();
4725 module_exit(xhci_hcd_cleanup
);