2 * Sony CXD2820R demodulator driver
4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #include "cxd2820r_priv.h"
24 int cxd2820r_set_frontend_t2(struct dvb_frontend
*fe
,
25 struct dvb_frontend_parameters
*params
)
27 struct cxd2820r_priv
*priv
= fe
->demodulator_priv
;
28 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
33 u8 bw_params1
[][5] = {
34 { 0x1c, 0xb3, 0x33, 0x33, 0x33 }, /* 5 MHz */
35 { 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
36 { 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
37 { 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
39 struct reg_val_mask tab
[] = {
40 { 0x00080, 0x02, 0xff },
41 { 0x00081, 0x20, 0xff },
42 { 0x00085, 0x07, 0xff },
43 { 0x00088, 0x01, 0xff },
44 { 0x02069, 0x01, 0xff },
46 { 0x0207f, 0x2a, 0xff },
47 { 0x02082, 0x0a, 0xff },
48 { 0x02083, 0x0a, 0xff },
49 { 0x020cb, priv
->cfg
.if_agc_polarity
<< 6, 0x40 },
50 { 0x02070, priv
->cfg
.ts_mode
, 0xff },
51 { 0x020b5, priv
->cfg
.spec_inv
<< 4, 0x10 },
52 { 0x02567, 0x07, 0x0f },
53 { 0x02569, 0x03, 0x03 },
54 { 0x02595, 0x1a, 0xff },
55 { 0x02596, 0x50, 0xff },
56 { 0x02a8c, 0x00, 0xff },
57 { 0x02a8d, 0x34, 0xff },
58 { 0x02a45, 0x06, 0x07 },
59 { 0x03f10, 0x0d, 0xff },
60 { 0x03f11, 0x02, 0xff },
61 { 0x03f12, 0x01, 0xff },
62 { 0x03f23, 0x2c, 0xff },
63 { 0x03f51, 0x13, 0xff },
64 { 0x03f52, 0x01, 0xff },
65 { 0x03f53, 0x00, 0xff },
66 { 0x027e6, 0x14, 0xff },
67 { 0x02786, 0x02, 0x07 },
68 { 0x02787, 0x40, 0xe0 },
69 { 0x027ef, 0x10, 0x18 },
72 dbg("%s: RF=%d BW=%d", __func__
, c
->frequency
, c
->bandwidth_hz
);
75 ret
= cxd2820r_gpio(fe
);
80 if (fe
->ops
.tuner_ops
.set_params
)
81 fe
->ops
.tuner_ops
.set_params(fe
, params
);
83 if (priv
->delivery_system
!= SYS_DVBT2
) {
84 for (i
= 0; i
< ARRAY_SIZE(tab
); i
++) {
85 ret
= cxd2820r_wr_reg_mask(priv
, tab
[i
].reg
,
86 tab
[i
].val
, tab
[i
].mask
);
92 priv
->delivery_system
= SYS_DVBT2
;
94 switch (c
->bandwidth_hz
) {
96 if_khz
= priv
->cfg
.if_dvbt2_5
;
101 if_khz
= priv
->cfg
.if_dvbt2_6
;
106 if_khz
= priv
->cfg
.if_dvbt2_7
;
111 if_khz
= priv
->cfg
.if_dvbt2_8
;
121 if_ctl
= cxd2820r_div_u64_round_closest(num
, 41000);
122 buf
[0] = ((if_ctl
>> 16) & 0xff);
123 buf
[1] = ((if_ctl
>> 8) & 0xff);
124 buf
[2] = ((if_ctl
>> 0) & 0xff);
126 ret
= cxd2820r_wr_regs(priv
, 0x020b6, buf
, 3);
130 ret
= cxd2820r_wr_regs(priv
, 0x0209f, bw_params1
[i
], 5);
134 ret
= cxd2820r_wr_reg_mask(priv
, 0x020d7, bw_param
<< 6, 0xc0);
138 ret
= cxd2820r_wr_reg(priv
, 0x000ff, 0x08);
142 ret
= cxd2820r_wr_reg(priv
, 0x000fe, 0x01);
148 dbg("%s: failed:%d", __func__
, ret
);
153 int cxd2820r_get_frontend_t2(struct dvb_frontend
*fe
,
154 struct dvb_frontend_parameters
*p
)
156 struct cxd2820r_priv
*priv
= fe
->demodulator_priv
;
157 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
161 ret
= cxd2820r_rd_regs(priv
, 0x0205c, buf
, 2);
165 switch ((buf
[0] >> 0) & 0x07) {
167 c
->transmission_mode
= TRANSMISSION_MODE_2K
;
170 c
->transmission_mode
= TRANSMISSION_MODE_8K
;
173 c
->transmission_mode
= TRANSMISSION_MODE_4K
;
176 c
->transmission_mode
= TRANSMISSION_MODE_1K
;
179 c
->transmission_mode
= TRANSMISSION_MODE_16K
;
182 c
->transmission_mode
= TRANSMISSION_MODE_32K
;
186 switch ((buf
[1] >> 4) & 0x07) {
188 c
->guard_interval
= GUARD_INTERVAL_1_32
;
191 c
->guard_interval
= GUARD_INTERVAL_1_16
;
194 c
->guard_interval
= GUARD_INTERVAL_1_8
;
197 c
->guard_interval
= GUARD_INTERVAL_1_4
;
200 c
->guard_interval
= GUARD_INTERVAL_1_128
;
203 c
->guard_interval
= GUARD_INTERVAL_19_128
;
206 c
->guard_interval
= GUARD_INTERVAL_19_256
;
210 ret
= cxd2820r_rd_regs(priv
, 0x0225b, buf
, 2);
214 switch ((buf
[0] >> 0) & 0x07) {
216 c
->fec_inner
= FEC_1_2
;
219 c
->fec_inner
= FEC_3_5
;
222 c
->fec_inner
= FEC_2_3
;
225 c
->fec_inner
= FEC_3_4
;
228 c
->fec_inner
= FEC_4_5
;
231 c
->fec_inner
= FEC_5_6
;
235 switch ((buf
[1] >> 0) & 0x07) {
237 c
->modulation
= QPSK
;
240 c
->modulation
= QAM_16
;
243 c
->modulation
= QAM_64
;
246 c
->modulation
= QAM_256
;
250 ret
= cxd2820r_rd_reg(priv
, 0x020b5, &buf
[0]);
254 switch ((buf
[0] >> 4) & 0x01) {
256 c
->inversion
= INVERSION_OFF
;
259 c
->inversion
= INVERSION_ON
;
265 dbg("%s: failed:%d", __func__
, ret
);
269 int cxd2820r_read_status_t2(struct dvb_frontend
*fe
, fe_status_t
*status
)
271 struct cxd2820r_priv
*priv
= fe
->demodulator_priv
;
276 ret
= cxd2820r_rd_reg(priv
, 0x02010 , &buf
[0]);
280 if ((buf
[0] & 0x07) == 6) {
281 if (((buf
[0] >> 5) & 0x01) == 1) {
282 *status
|= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
283 FE_HAS_VITERBI
| FE_HAS_SYNC
| FE_HAS_LOCK
;
285 *status
|= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
286 FE_HAS_VITERBI
| FE_HAS_SYNC
;
290 dbg("%s: lock=%02x", __func__
, buf
[0]);
294 dbg("%s: failed:%d", __func__
, ret
);
298 int cxd2820r_read_ber_t2(struct dvb_frontend
*fe
, u32
*ber
)
300 struct cxd2820r_priv
*priv
= fe
->demodulator_priv
;
303 unsigned int errbits
;
305 /* FIXME: correct calculation */
307 ret
= cxd2820r_rd_regs(priv
, 0x02039, buf
, sizeof(buf
));
311 if ((buf
[0] >> 4) & 0x01) {
312 errbits
= (buf
[0] & 0x0f) << 24 | buf
[1] << 16 |
313 buf
[2] << 8 | buf
[3];
316 *ber
= errbits
* 64 / 16588800;
321 dbg("%s: failed:%d", __func__
, ret
);
325 int cxd2820r_read_signal_strength_t2(struct dvb_frontend
*fe
,
328 struct cxd2820r_priv
*priv
= fe
->demodulator_priv
;
333 ret
= cxd2820r_rd_regs(priv
, 0x02026, buf
, sizeof(buf
));
337 tmp
= (buf
[0] & 0x0f) << 8 | buf
[1];
340 /* scale value to 0x0000-0xffff from 0x0000-0x0fff */
341 *strength
= tmp
* 0xffff / 0x0fff;
345 dbg("%s: failed:%d", __func__
, ret
);
349 int cxd2820r_read_snr_t2(struct dvb_frontend
*fe
, u16
*snr
)
351 struct cxd2820r_priv
*priv
= fe
->demodulator_priv
;
355 /* report SNR in dB * 10 */
357 ret
= cxd2820r_rd_regs(priv
, 0x02028, buf
, sizeof(buf
));
361 tmp
= (buf
[0] & 0x0f) << 8 | buf
[1];
362 #define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
364 *snr
= (intlog10(tmp
) - CXD2820R_LOG10_8_24
) / ((1 << 24)
369 dbg("%s: dBx10=%d val=%04x", __func__
, *snr
, tmp
);
373 dbg("%s: failed:%d", __func__
, ret
);
377 int cxd2820r_read_ucblocks_t2(struct dvb_frontend
*fe
, u32
*ucblocks
)
380 /* no way to read ? */
384 int cxd2820r_sleep_t2(struct dvb_frontend
*fe
)
386 struct cxd2820r_priv
*priv
= fe
->demodulator_priv
;
388 struct reg_val_mask tab
[] = {
389 { 0x000ff, 0x1f, 0xff },
390 { 0x00085, 0x00, 0xff },
391 { 0x00088, 0x01, 0xff },
392 { 0x02069, 0x00, 0xff },
393 { 0x00081, 0x00, 0xff },
394 { 0x00080, 0x00, 0xff },
399 for (i
= 0; i
< ARRAY_SIZE(tab
); i
++) {
400 ret
= cxd2820r_wr_reg_mask(priv
, tab
[i
].reg
, tab
[i
].val
,
406 priv
->delivery_system
= SYS_UNDEFINED
;
410 dbg("%s: failed:%d", __func__
, ret
);
414 int cxd2820r_get_tune_settings_t2(struct dvb_frontend
*fe
,
415 struct dvb_frontend_tune_settings
*s
)
417 s
->min_delay_ms
= 1500;
418 s
->step_size
= fe
->ops
.info
.frequency_stepsize
* 2;
419 s
->max_drift
= (fe
->ops
.info
.frequency_stepsize
* 2) + 1;