x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
[linux-btrfs-devel.git] / drivers / gpu / drm / drm_cache.c
blob0e3bd5b54b78c57ba7fcf3df524aedaa32bf366e
1 /**************************************************************************
3 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
4 * All Rights Reserved.
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28 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
31 #include "drmP.h"
33 #if defined(CONFIG_X86)
34 static void
35 drm_clflush_page(struct page *page)
37 uint8_t *page_virtual;
38 unsigned int i;
40 if (unlikely(page == NULL))
41 return;
43 page_virtual = kmap_atomic(page, KM_USER0);
44 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
45 clflush(page_virtual + i);
46 kunmap_atomic(page_virtual, KM_USER0);
49 static void drm_cache_flush_clflush(struct page *pages[],
50 unsigned long num_pages)
52 unsigned long i;
54 mb();
55 for (i = 0; i < num_pages; i++)
56 drm_clflush_page(*pages++);
57 mb();
60 static void
61 drm_clflush_ipi_handler(void *null)
63 wbinvd();
65 #endif
67 void
68 drm_clflush_pages(struct page *pages[], unsigned long num_pages)
71 #if defined(CONFIG_X86)
72 if (cpu_has_clflush) {
73 drm_cache_flush_clflush(pages, num_pages);
74 return;
77 if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
78 printk(KERN_ERR "Timed out waiting for cache flush.\n");
80 #elif defined(__powerpc__)
81 unsigned long i;
82 for (i = 0; i < num_pages; i++) {
83 struct page *page = pages[i];
84 void *page_virtual;
86 if (unlikely(page == NULL))
87 continue;
89 page_virtual = kmap_atomic(page, KM_USER0);
90 flush_dcache_range((unsigned long)page_virtual,
91 (unsigned long)page_virtual + PAGE_SIZE);
92 kunmap_atomic(page_virtual, KM_USER0);
94 #else
95 printk(KERN_ERR "Architecture has no drm_cache.c support\n");
96 WARN_ON_ONCE(1);
97 #endif
99 EXPORT_SYMBOL(drm_clflush_pages);