2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
29 #include "drm_crtc_helper.h"
30 #include "nouveau_drv.h"
31 #include "nouveau_hw.h"
32 #include "nouveau_fb.h"
33 #include "nouveau_fbcon.h"
34 #include "nouveau_pm.h"
35 #include "nv50_display.h"
37 #include "drm_pciids.h"
39 MODULE_PARM_DESC(agpmode
, "AGP mode (0 to disable AGP)");
40 int nouveau_agpmode
= -1;
41 module_param_named(agpmode
, nouveau_agpmode
, int, 0400);
43 MODULE_PARM_DESC(modeset
, "Enable kernel modesetting");
44 static int nouveau_modeset
= -1; /* kms */
45 module_param_named(modeset
, nouveau_modeset
, int, 0400);
47 MODULE_PARM_DESC(vbios
, "Override default VBIOS location");
49 module_param_named(vbios
, nouveau_vbios
, charp
, 0400);
51 MODULE_PARM_DESC(vram_pushbuf
, "Force DMA push buffers to be in VRAM");
52 int nouveau_vram_pushbuf
;
53 module_param_named(vram_pushbuf
, nouveau_vram_pushbuf
, int, 0400);
55 MODULE_PARM_DESC(vram_notify
, "Force DMA notifiers to be in VRAM");
56 int nouveau_vram_notify
= 0;
57 module_param_named(vram_notify
, nouveau_vram_notify
, int, 0400);
59 MODULE_PARM_DESC(duallink
, "Allow dual-link TMDS (>=GeForce 8)");
60 int nouveau_duallink
= 1;
61 module_param_named(duallink
, nouveau_duallink
, int, 0400);
63 MODULE_PARM_DESC(uscript_lvds
, "LVDS output script table ID (>=GeForce 8)");
64 int nouveau_uscript_lvds
= -1;
65 module_param_named(uscript_lvds
, nouveau_uscript_lvds
, int, 0400);
67 MODULE_PARM_DESC(uscript_tmds
, "TMDS output script table ID (>=GeForce 8)");
68 int nouveau_uscript_tmds
= -1;
69 module_param_named(uscript_tmds
, nouveau_uscript_tmds
, int, 0400);
71 MODULE_PARM_DESC(ignorelid
, "Ignore ACPI lid status");
72 int nouveau_ignorelid
= 0;
73 module_param_named(ignorelid
, nouveau_ignorelid
, int, 0400);
75 MODULE_PARM_DESC(noaccel
, "Disable all acceleration");
76 int nouveau_noaccel
= -1;
77 module_param_named(noaccel
, nouveau_noaccel
, int, 0400);
79 MODULE_PARM_DESC(nofbaccel
, "Disable fbcon acceleration");
80 int nouveau_nofbaccel
= 0;
81 module_param_named(nofbaccel
, nouveau_nofbaccel
, int, 0400);
83 MODULE_PARM_DESC(force_post
, "Force POST");
84 int nouveau_force_post
= 0;
85 module_param_named(force_post
, nouveau_force_post
, int, 0400);
87 MODULE_PARM_DESC(override_conntype
, "Ignore DCB connector type");
88 int nouveau_override_conntype
= 0;
89 module_param_named(override_conntype
, nouveau_override_conntype
, int, 0400);
91 MODULE_PARM_DESC(tv_disable
, "Disable TV-out detection\n");
92 int nouveau_tv_disable
= 0;
93 module_param_named(tv_disable
, nouveau_tv_disable
, int, 0400);
95 MODULE_PARM_DESC(tv_norm
, "Default TV norm.\n"
96 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
97 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
99 "\t\t*NOTE* Ignored for cards with external TV encoders.");
100 char *nouveau_tv_norm
;
101 module_param_named(tv_norm
, nouveau_tv_norm
, charp
, 0400);
103 MODULE_PARM_DESC(reg_debug
, "Register access debug bitmask:\n"
104 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
105 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
106 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
107 int nouveau_reg_debug
;
108 module_param_named(reg_debug
, nouveau_reg_debug
, int, 0600);
110 MODULE_PARM_DESC(perflvl
, "Performance level (default: boot)\n");
111 char *nouveau_perflvl
;
112 module_param_named(perflvl
, nouveau_perflvl
, charp
, 0400);
114 MODULE_PARM_DESC(perflvl_wr
, "Allow perflvl changes (warning: dangerous!)\n");
115 int nouveau_perflvl_wr
;
116 module_param_named(perflvl_wr
, nouveau_perflvl_wr
, int, 0400);
118 MODULE_PARM_DESC(msi
, "Enable MSI (default: off)\n");
120 module_param_named(msi
, nouveau_msi
, int, 0400);
122 MODULE_PARM_DESC(ctxfw
, "Use external HUB/GPC ucode (fermi)\n");
124 module_param_named(ctxfw
, nouveau_ctxfw
, int, 0400);
126 int nouveau_fbpercrtc
;
128 module_param_named(fbpercrtc
, nouveau_fbpercrtc
, int, 0400);
131 static struct pci_device_id pciidlist
[] = {
133 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_ANY_ID
),
134 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
135 .class_mask
= 0xff << 16,
138 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS
, PCI_ANY_ID
),
139 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
140 .class_mask
= 0xff << 16,
145 MODULE_DEVICE_TABLE(pci
, pciidlist
);
147 static struct drm_driver driver
;
150 nouveau_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
152 return drm_get_pci_dev(pdev
, ent
, &driver
);
156 nouveau_pci_remove(struct pci_dev
*pdev
)
158 struct drm_device
*dev
= pci_get_drvdata(pdev
);
164 nouveau_pci_suspend(struct pci_dev
*pdev
, pm_message_t pm_state
)
166 struct drm_device
*dev
= pci_get_drvdata(pdev
);
167 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
168 struct nouveau_instmem_engine
*pinstmem
= &dev_priv
->engine
.instmem
;
169 struct nouveau_fifo_engine
*pfifo
= &dev_priv
->engine
.fifo
;
170 struct nouveau_channel
*chan
;
171 struct drm_crtc
*crtc
;
174 if (pm_state
.event
== PM_EVENT_PRETHAW
)
177 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
180 NV_INFO(dev
, "Disabling fbcon acceleration...\n");
181 nouveau_fbcon_save_disable_accel(dev
);
183 NV_INFO(dev
, "Unpinning framebuffer(s)...\n");
184 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
185 struct nouveau_framebuffer
*nouveau_fb
;
187 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
188 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
191 nouveau_bo_unpin(nouveau_fb
->nvbo
);
194 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
195 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
197 nouveau_bo_unmap(nv_crtc
->cursor
.nvbo
);
198 nouveau_bo_unpin(nv_crtc
->cursor
.nvbo
);
201 NV_INFO(dev
, "Evicting buffers...\n");
202 ttm_bo_evict_mm(&dev_priv
->ttm
.bdev
, TTM_PL_VRAM
);
204 NV_INFO(dev
, "Idling channels...\n");
205 for (i
= 0; i
< pfifo
->channels
; i
++) {
206 chan
= dev_priv
->channels
.ptr
[i
];
208 if (chan
&& chan
->pushbuf_bo
)
209 nouveau_channel_idle(chan
);
212 pfifo
->reassign(dev
, false);
214 pfifo
->unload_context(dev
);
216 for (e
= NVOBJ_ENGINE_NR
- 1; e
>= 0; e
--) {
217 if (!dev_priv
->eng
[e
])
220 ret
= dev_priv
->eng
[e
]->fini(dev
, e
, true);
222 NV_ERROR(dev
, "... engine %d failed: %d\n", i
, ret
);
227 ret
= pinstmem
->suspend(dev
);
229 NV_ERROR(dev
, "... failed: %d\n", ret
);
233 NV_INFO(dev
, "Suspending GPU objects...\n");
234 ret
= nouveau_gpuobj_suspend(dev
);
236 NV_ERROR(dev
, "... failed: %d\n", ret
);
237 pinstmem
->resume(dev
);
241 NV_INFO(dev
, "And we're gone!\n");
242 pci_save_state(pdev
);
243 if (pm_state
.event
== PM_EVENT_SUSPEND
) {
244 pci_disable_device(pdev
);
245 pci_set_power_state(pdev
, PCI_D3hot
);
249 nouveau_fbcon_set_suspend(dev
, 1);
251 nouveau_fbcon_restore_accel(dev
);
255 NV_INFO(dev
, "Re-enabling acceleration..\n");
256 for (e
= e
+ 1; e
< NVOBJ_ENGINE_NR
; e
++) {
257 if (dev_priv
->eng
[e
])
258 dev_priv
->eng
[e
]->init(dev
, e
);
261 pfifo
->reassign(dev
, true);
266 nouveau_pci_resume(struct pci_dev
*pdev
)
268 struct drm_device
*dev
= pci_get_drvdata(pdev
);
269 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
270 struct nouveau_engine
*engine
= &dev_priv
->engine
;
271 struct drm_crtc
*crtc
;
274 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
277 nouveau_fbcon_save_disable_accel(dev
);
279 NV_INFO(dev
, "We're back, enabling device...\n");
280 pci_set_power_state(pdev
, PCI_D0
);
281 pci_restore_state(pdev
);
282 if (pci_enable_device(pdev
))
284 pci_set_master(dev
->pdev
);
286 /* Make sure the AGP controller is in a consistent state */
287 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
)
288 nouveau_mem_reset_agp(dev
);
290 /* Make the CRTCs accessible */
291 engine
->display
.early_init(dev
);
293 NV_INFO(dev
, "POSTing device...\n");
294 ret
= nouveau_run_vbios_init(dev
);
298 nouveau_pm_resume(dev
);
300 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
) {
301 ret
= nouveau_mem_init_agp(dev
);
303 NV_ERROR(dev
, "error reinitialising AGP: %d\n", ret
);
308 NV_INFO(dev
, "Restoring GPU objects...\n");
309 nouveau_gpuobj_resume(dev
);
311 NV_INFO(dev
, "Reinitialising engines...\n");
312 engine
->instmem
.resume(dev
);
313 engine
->mc
.init(dev
);
314 engine
->timer
.init(dev
);
315 engine
->fb
.init(dev
);
316 for (i
= 0; i
< NVOBJ_ENGINE_NR
; i
++) {
317 if (dev_priv
->eng
[i
])
318 dev_priv
->eng
[i
]->init(dev
, i
);
320 engine
->fifo
.init(dev
);
322 nouveau_irq_postinstall(dev
);
324 /* Re-write SKIPS, they'll have been lost over the suspend */
325 if (nouveau_vram_pushbuf
) {
326 struct nouveau_channel
*chan
;
329 for (i
= 0; i
< dev_priv
->engine
.fifo
.channels
; i
++) {
330 chan
= dev_priv
->channels
.ptr
[i
];
331 if (!chan
|| !chan
->pushbuf_bo
)
334 for (j
= 0; j
< NOUVEAU_DMA_SKIPS
; j
++)
335 nouveau_bo_wr32(chan
->pushbuf_bo
, i
, 0);
339 NV_INFO(dev
, "Restoring mode...\n");
340 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
341 struct nouveau_framebuffer
*nouveau_fb
;
343 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
344 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
347 nouveau_bo_pin(nouveau_fb
->nvbo
, TTM_PL_FLAG_VRAM
);
350 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
351 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
353 ret
= nouveau_bo_pin(nv_crtc
->cursor
.nvbo
, TTM_PL_FLAG_VRAM
);
355 ret
= nouveau_bo_map(nv_crtc
->cursor
.nvbo
);
357 NV_ERROR(dev
, "Could not pin/map cursor.\n");
360 engine
->display
.init(dev
);
362 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
363 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
364 u32 offset
= nv_crtc
->cursor
.nvbo
->bo
.offset
;
366 nv_crtc
->cursor
.set_offset(nv_crtc
, offset
);
367 nv_crtc
->cursor
.set_pos(nv_crtc
, nv_crtc
->cursor_saved_x
,
368 nv_crtc
->cursor_saved_y
);
371 /* Force CLUT to get re-loaded during modeset */
372 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
373 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
375 nv_crtc
->lut
.depth
= 0;
379 nouveau_fbcon_set_suspend(dev
, 0);
382 nouveau_fbcon_zfill_all(dev
);
384 drm_helper_resume_force_mode(dev
);
386 nouveau_fbcon_restore_accel(dev
);
390 static struct drm_driver driver
= {
392 DRIVER_USE_AGP
| DRIVER_PCI_DMA
| DRIVER_SG
|
393 DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
| DRIVER_GEM
|
395 .load
= nouveau_load
,
396 .firstopen
= nouveau_firstopen
,
397 .lastclose
= nouveau_lastclose
,
398 .unload
= nouveau_unload
,
399 .open
= nouveau_open
,
400 .preclose
= nouveau_preclose
,
401 .postclose
= nouveau_postclose
,
402 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
403 .debugfs_init
= nouveau_debugfs_init
,
404 .debugfs_cleanup
= nouveau_debugfs_takedown
,
406 .irq_preinstall
= nouveau_irq_preinstall
,
407 .irq_postinstall
= nouveau_irq_postinstall
,
408 .irq_uninstall
= nouveau_irq_uninstall
,
409 .irq_handler
= nouveau_irq_handler
,
410 .get_vblank_counter
= drm_vblank_count
,
411 .enable_vblank
= nouveau_vblank_enable
,
412 .disable_vblank
= nouveau_vblank_disable
,
413 .reclaim_buffers
= drm_core_reclaim_buffers
,
414 .ioctls
= nouveau_ioctls
,
416 .owner
= THIS_MODULE
,
418 .release
= drm_release
,
419 .unlocked_ioctl
= drm_ioctl
,
420 .mmap
= nouveau_ttm_mmap
,
422 .fasync
= drm_fasync
,
424 #if defined(CONFIG_COMPAT)
425 .compat_ioctl
= nouveau_compat_ioctl
,
427 .llseek
= noop_llseek
,
430 .gem_init_object
= nouveau_gem_object_new
,
431 .gem_free_object
= nouveau_gem_object_del
,
432 .gem_open_object
= nouveau_gem_object_open
,
433 .gem_close_object
= nouveau_gem_object_close
,
438 .date
= GIT_REVISION
,
442 .major
= DRIVER_MAJOR
,
443 .minor
= DRIVER_MINOR
,
444 .patchlevel
= DRIVER_PATCHLEVEL
,
447 static struct pci_driver nouveau_pci_driver
= {
449 .id_table
= pciidlist
,
450 .probe
= nouveau_pci_probe
,
451 .remove
= nouveau_pci_remove
,
452 .suspend
= nouveau_pci_suspend
,
453 .resume
= nouveau_pci_resume
456 static int __init
nouveau_init(void)
458 driver
.num_ioctls
= nouveau_max_ioctl
;
460 if (nouveau_modeset
== -1) {
461 #ifdef CONFIG_VGA_CONSOLE
462 if (vgacon_text_force())
469 if (!nouveau_modeset
)
472 nouveau_register_dsm_handler();
473 return drm_pci_init(&driver
, &nouveau_pci_driver
);
476 static void __exit
nouveau_exit(void)
478 if (!nouveau_modeset
)
481 drm_pci_exit(&driver
, &nouveau_pci_driver
);
482 nouveau_unregister_dsm_handler();
485 module_init(nouveau_init
);
486 module_exit(nouveau_exit
);
488 MODULE_AUTHOR(DRIVER_AUTHOR
);
489 MODULE_DESCRIPTION(DRIVER_DESC
);
490 MODULE_LICENSE("GPL and additional rights");