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x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
[linux-btrfs-devel.git] / drivers / staging / speakup / speakup_decpc.c
blobde25527decf6186d8664aace3d5eec2f99e7670c
1 /*
2 * This is the DECtalk PC speakup driver
3 *
4 * Some constants from DEC's DOS driver:
5 * Copyright (c) by Digital Equipment Corp.
6 *
7 * 386BSD DECtalk PC driver:
8 * Copyright (c) 1996 Brian Buhrow <buhrow@lothlorien.nfbcal.org>
9 *
10 * Linux DECtalk PC driver:
11 * Copyright (c) 1997 Nicolas Pitre <nico@cam.org>
12 *
13 * speakup DECtalk PC Internal driver:
14 * Copyright (c) 2003 David Borowski <david575@golden.net>
15 *
16 * All rights reserved.
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32 #include <linux/jiffies.h>
33 #include <linux/sched.h>
34 #include <linux/timer.h>
35 #include <linux/kthread.h>
36
37 #include "spk_priv.h"
38 #include "speakup.h"
39
40 #define MODULE_init 0x0dec /* module in boot code */
41 #define MODULE_self_test 0x8800 /* module in self-test */
42 #define MODULE_reset 0xffff /* reinit the whole module */
43
44 #define MODE_mask 0xf000 /* mode bits in high nibble */
45 #define MODE_null 0x0000
46 #define MODE_test 0x2000 /* in testing mode */
47 #define MODE_status 0x8000
48 #define STAT_int 0x0001 /* running in interrupt mode */
49 #define STAT_tr_char 0x0002 /* character data to transmit */
50 #define STAT_rr_char 0x0004 /* ready to receive char data */
51 #define STAT_cmd_ready 0x0008 /* ready to accept commands */
52 #define STAT_dma_ready 0x0010 /* dma command ready */
53 #define STAT_digitized 0x0020 /* spc in digitized mode */
54 #define STAT_new_index 0x0040 /* new last index ready */
55 #define STAT_new_status 0x0080 /* new status posted */
56 #define STAT_dma_state 0x0100 /* dma state toggle */
57 #define STAT_index_valid 0x0200 /* indexs are valid */
58 #define STAT_flushing 0x0400 /* flush in progress */
59 #define STAT_self_test 0x0800 /* module in self test */
60 #define MODE_ready 0xc000 /* module ready for next phase */
61 #define READY_boot 0x0000
62 #define READY_kernel 0x0001
63 #define MODE_error 0xf000
64
65 #define CMD_mask 0xf000 /* mask for command nibble */
66 #define CMD_null 0x0000 /* post status */
67 #define CMD_control 0x1000 /* hard control command */
68 #define CTRL_mask 0x0F00 /* mask off control nibble */
69 #define CTRL_data 0x00FF /* madk to get data byte */
70 #define CTRL_null 0x0000 /* null control */
71 #define CTRL_vol_up 0x0100 /* increase volume */
72 #define CTRL_vol_down 0x0200 /* decrease volume */
73 #define CTRL_vol_set 0x0300 /* set volume */
74 #define CTRL_pause 0x0400 /* pause spc */
75 #define CTRL_resume 0x0500 /* resume spc clock */
76 #define CTRL_resume_spc 0x0001 /* resume spc soft pause */
77 #define CTRL_flush 0x0600 /* flush all buffers */
78 #define CTRL_int_enable 0x0700 /* enable status change ints */
79 #define CTRL_buff_free 0x0800 /* buffer remain count */
80 #define CTRL_buff_used 0x0900 /* buffer in use */
81 #define CTRL_speech 0x0a00 /* immediate speech change */
82 #define CTRL_SP_voice 0x0001 /* voice change */
83 #define CTRL_SP_rate 0x0002 /* rate change */
84 #define CTRL_SP_comma 0x0003 /* comma pause change */
85 #define CTRL_SP_period 0x0004 /* period pause change */
86 #define CTRL_SP_rate_delta 0x0005 /* delta rate change */
87 #define CTRL_SP_get_param 0x0006 /* return the desired parameter */
88 #define CTRL_last_index 0x0b00 /* get last index spoken */
89 #define CTRL_io_priority 0x0c00 /* change i/o priority */
90 #define CTRL_free_mem 0x0d00 /* get free paragraphs on module */
91 #define CTRL_get_lang 0x0e00 /* return bit mask of loaded
92 * languages */
93 #define CMD_test 0x2000 /* self-test request */
94 #define TEST_mask 0x0F00 /* isolate test field */
95 #define TEST_null 0x0000 /* no test requested */
96 #define TEST_isa_int 0x0100 /* assert isa irq */
97 #define TEST_echo 0x0200 /* make data in == data out */
98 #define TEST_seg 0x0300 /* set peek/poke segment */
99 #define TEST_off 0x0400 /* set peek/poke offset */
100 #define TEST_peek 0x0500 /* data out == *peek */
101 #define TEST_poke 0x0600 /* *peek == data in */
102 #define TEST_sub_code 0x00FF /* user defined test sub codes */
103 #define CMD_id 0x3000 /* return software id */
104 #define ID_null 0x0000 /* null id */
105 #define ID_kernel 0x0100 /* kernel code executing */
106 #define ID_boot 0x0200 /* boot code executing */
107 #define CMD_dma 0x4000 /* force a dma start */
108 #define CMD_reset 0x5000 /* reset module status */
109 #define CMD_sync 0x6000 /* kernel sync command */
110 #define CMD_char_in 0x7000 /* single character send */
111 #define CMD_char_out 0x8000 /* single character get */
112 #define CHAR_count_1 0x0100 /* one char in cmd_low */
113 #define CHAR_count_2 0x0200 /* the second in data_low */
114 #define CHAR_count_3 0x0300 /* the third in data_high */
115 #define CMD_spc_mode 0x9000 /* change spc mode */
116 #define CMD_spc_to_text 0x0100 /* set to text mode */
117 #define CMD_spc_to_digit 0x0200 /* set to digital mode */
118 #define CMD_spc_rate 0x0400 /* change spc data rate */
119 #define CMD_error 0xf000 /* severe error */
120
121 enum { PRIMARY_DIC = 0, USER_DIC, COMMAND_DIC, ABBREV_DIC };
122
123 #define DMA_single_in 0x01
124 #define DMA_single_out 0x02
125 #define DMA_buff_in 0x03
126 #define DMA_buff_out 0x04
127 #define DMA_control 0x05
128 #define DT_MEM_ALLOC 0x03
129 #define DT_SET_DIC 0x04
130 #define DT_START_TASK 0x05
131 #define DT_LOAD_MEM 0x06
132 #define DT_READ_MEM 0x07
133 #define DT_DIGITAL_IN 0x08
134 #define DMA_sync 0x06
135 #define DMA_sync_char 0x07
136
137 #define DRV_VERSION "2.12"
138 #define PROCSPEECH 0x0b
139 #define SYNTH_IO_EXTENT 8
140
141 static int synth_probe(struct spk_synth *synth);
142 static void dtpc_release(void);
143 static const char *synth_immediate(struct spk_synth *synth, const char *buf);
144 static void do_catch_up(struct spk_synth *synth);
145 static void synth_flush(struct spk_synth *synth);
146
147 static int synth_portlist[] = { 0x340, 0x350, 0x240, 0x250, 0 };
148 static int in_escape, is_flushing;
149 static int dt_stat, dma_state;
150
151 static struct var_t vars[] = {
152 { CAPS_START, .u.s = {"[:dv ap 200]" } },
153 { CAPS_STOP, .u.s = {"[:dv ap 100]" } },
154 { RATE, .u.n = {"[:ra %d]", 9, 0, 18, 150, 25, NULL } },
155 { PITCH, .u.n = {"[:dv ap %d]", 80, 0, 100, 20, 0, NULL } },
156 { VOL, .u.n = {"[:vo se %d]", 5, 0, 9, 5, 10, NULL } },
157 { PUNCT, .u.n = {"[:pu %c]", 0, 0, 2, 0, 0, "nsa" } },
158 { VOICE, .u.n = {"[:n%c]", 0, 0, 9, 0, 0, "phfdburwkv" } },
159 { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
160 V_LAST_VAR
161 };
162
163 /*
164 * These attributes will appear in /sys/accessibility/speakup/decpc.
165 */
166 static struct kobj_attribute caps_start_attribute =
167 __ATTR(caps_start, USER_RW, spk_var_show, spk_var_store);
168 static struct kobj_attribute caps_stop_attribute =
169 __ATTR(caps_stop, USER_RW, spk_var_show, spk_var_store);
170 static struct kobj_attribute pitch_attribute =
171 __ATTR(pitch, USER_RW, spk_var_show, spk_var_store);
172 static struct kobj_attribute punct_attribute =
173 __ATTR(punct, USER_RW, spk_var_show, spk_var_store);
174 static struct kobj_attribute rate_attribute =
175 __ATTR(rate, USER_RW, spk_var_show, spk_var_store);
176 static struct kobj_attribute voice_attribute =
177 __ATTR(voice, USER_RW, spk_var_show, spk_var_store);
178 static struct kobj_attribute vol_attribute =
179 __ATTR(vol, USER_RW, spk_var_show, spk_var_store);
180
181 static struct kobj_attribute delay_time_attribute =
182 __ATTR(delay_time, ROOT_W, spk_var_show, spk_var_store);
183 static struct kobj_attribute direct_attribute =
184 __ATTR(direct, USER_RW, spk_var_show, spk_var_store);
185 static struct kobj_attribute full_time_attribute =
186 __ATTR(full_time, ROOT_W, spk_var_show, spk_var_store);
187 static struct kobj_attribute jiffy_delta_attribute =
188 __ATTR(jiffy_delta, ROOT_W, spk_var_show, spk_var_store);
189 static struct kobj_attribute trigger_time_attribute =
190 __ATTR(trigger_time, ROOT_W, spk_var_show, spk_var_store);
191
192 /*
193 * Create a group of attributes so that we can create and destroy them all
194 * at once.
195 */
196 static struct attribute *synth_attrs[] = {
197 &caps_start_attribute.attr,
198 &caps_stop_attribute.attr,
199 &pitch_attribute.attr,
200 &punct_attribute.attr,
201 &rate_attribute.attr,
202 &voice_attribute.attr,
203 &vol_attribute.attr,
204 &delay_time_attribute.attr,
205 &direct_attribute.attr,
206 &full_time_attribute.attr,
207 &jiffy_delta_attribute.attr,
208 &trigger_time_attribute.attr,
209 NULL, /* need to NULL terminate the list of attributes */
210 };
211
212 static struct spk_synth synth_dec_pc = {
213 .name = "decpc",
214 .version = DRV_VERSION,
215 .long_name = "Dectalk PC",
216 .init = "[:pe -380]",
217 .procspeech = PROCSPEECH,
218 .delay = 500,
219 .trigger = 50,
220 .jiffies = 50,
221 .full = 1000,
222 .flags = SF_DEC,
223 .startup = SYNTH_START,
224 .checkval = SYNTH_CHECK,
225 .vars = vars,
226 .probe = synth_probe,
227 .release = dtpc_release,
228 .synth_immediate = synth_immediate,
229 .catch_up = do_catch_up,
230 .flush = synth_flush,
231 .is_alive = spk_synth_is_alive_nop,
232 .synth_adjust = NULL,
233 .read_buff_add = NULL,
234 .get_index = NULL,
235 .indexing = {
236 .command = NULL,
237 .lowindex = 0,
238 .highindex = 0,
239 .currindex = 0,
240 },
241 .attributes = {
242 .attrs = synth_attrs,
243 .name = "decpc",
244 },
245 };
246
247 static int dt_getstatus(void)
248 {
249 dt_stat = inb_p(speakup_info.port_tts) |
250 (inb_p(speakup_info.port_tts + 1) << 8);
251 return dt_stat;
252 }
253
254 static void dt_sendcmd(u_int cmd)
255 {
256 outb_p(cmd & 0xFF, speakup_info.port_tts);
257 outb_p((cmd >> 8) & 0xFF, speakup_info.port_tts+1);
258 }
259
260 static int dt_waitbit(int bit)
261 {
262 int timeout = 100;
263 while (--timeout > 0) {
264 if ((dt_getstatus() & bit) == bit)
265 return 1;
266 udelay(50);
267 }
268 return 0;
269 }
270
271 static int dt_wait_dma(void)
272 {
273 int timeout = 100, state = dma_state;
274 if (!dt_waitbit(STAT_dma_ready))
275 return 0;
276 while (--timeout > 0) {
277 if ((dt_getstatus()&STAT_dma_state) == state)
278 return 1;
279 udelay(50);
280 }
281 dma_state = dt_getstatus() & STAT_dma_state;
282 return 1;
283 }
284
285 static int dt_ctrl(u_int cmd)
286 {
287 int timeout = 10;
288 if (!dt_waitbit(STAT_cmd_ready))
289 return -1;
290 outb_p(0, speakup_info.port_tts+2);
291 outb_p(0, speakup_info.port_tts+3);
292 dt_getstatus();
293 dt_sendcmd(CMD_control|cmd);
294 outb_p(0, speakup_info.port_tts+6);
295 while (dt_getstatus() & STAT_cmd_ready) {
296 udelay(20);
297 if (--timeout == 0)
298 break;
299 }
300 dt_sendcmd(CMD_null);
301 return 0;
302 }
303
304 static void synth_flush(struct spk_synth *synth)
305 {
306 int timeout = 10;
307 if (is_flushing)
308 return;
309 is_flushing = 4;
310 in_escape = 0;
311 while (dt_ctrl(CTRL_flush)) {
312 if (--timeout == 0)
313 break;
314 udelay(50);
315 }
316 for (timeout = 0; timeout < 10; timeout++) {
317 if (dt_waitbit(STAT_dma_ready))
318 break;
319 udelay(50);
320 }
321 outb_p(DMA_sync, speakup_info.port_tts+4);
322 outb_p(0, speakup_info.port_tts+4);
323 udelay(100);
324 for (timeout = 0; timeout < 10; timeout++) {
325 if (!(dt_getstatus() & STAT_flushing))
326 break;
327 udelay(50);
328 }
329 dma_state = dt_getstatus() & STAT_dma_state;
330 dma_state ^= STAT_dma_state;
331 is_flushing = 0;
332 }
333
334 static int dt_sendchar(char ch)
335 {
336 if (!dt_wait_dma())
337 return -1;
338 if (!(dt_stat & STAT_rr_char))
339 return -2;
340 outb_p(DMA_single_in, speakup_info.port_tts+4);
341 outb_p(ch, speakup_info.port_tts+4);
342 dma_state ^= STAT_dma_state;
343 return 0;
344 }
345
346 static int testkernel(void)
347 {
348 int status = 0;
349 if (dt_getstatus() == 0xffff) {
350 status = -1;
351 goto oops;
352 }
353 dt_sendcmd(CMD_sync);
354 if (!dt_waitbit(STAT_cmd_ready))
355 status = -2;
356 else if (dt_stat&0x8000)
357 return 0;
358 else if (dt_stat == 0x0dec)
359 pr_warn("dec_pc at 0x%x, software not loaded\n",
360 speakup_info.port_tts);
361 status = -3;
362 oops: synth_release_region(speakup_info.port_tts, SYNTH_IO_EXTENT);
363 speakup_info.port_tts = 0;
364 return status;
365 }
366
367 static void do_catch_up(struct spk_synth *synth)
368 {
369 u_char ch;
370 static u_char last;
371 unsigned long flags;
372 unsigned long jiff_max;
373 struct var_t *jiffy_delta;
374 struct var_t *delay_time;
375 int jiffy_delta_val;
376 int delay_time_val;
377
378 jiffy_delta = get_var(JIFFY);
379 delay_time = get_var(DELAY);
380 spk_lock(flags);
381 jiffy_delta_val = jiffy_delta->u.n.value;
382 spk_unlock(flags);
383 jiff_max = jiffies + jiffy_delta_val;
384
385 while (!kthread_should_stop()) {
386 spk_lock(flags);
387 if (speakup_info.flushing) {
388 speakup_info.flushing = 0;
389 spk_unlock(flags);
390 synth->flush(synth);
391 continue;
392 }
393 if (synth_buffer_empty()) {
394 spk_unlock(flags);
395 break;
396 }
397 ch = synth_buffer_peek();
398 set_current_state(TASK_INTERRUPTIBLE);
399 delay_time_val = delay_time->u.n.value;
400 spk_unlock(flags);
401 if (ch == '\n')
402 ch = 0x0D;
403 if (dt_sendchar(ch)) {
404 schedule_timeout(msecs_to_jiffies(delay_time_val));
405 continue;
406 }
407 set_current_state(TASK_RUNNING);
408 spk_lock(flags);
409 synth_buffer_getc();
410 spk_unlock(flags);
411 if (ch == '[')
412 in_escape = 1;
413 else if (ch == ']')
414 in_escape = 0;
415 else if (ch <= SPACE) {
416 if (!in_escape && strchr(",.!?;:", last))
417 dt_sendchar(PROCSPEECH);
418 if (jiffies >= jiff_max) {
419 if (!in_escape)
420 dt_sendchar(PROCSPEECH);
421 spk_lock(flags);
422 jiffy_delta_val = jiffy_delta->u.n.value;
423 delay_time_val = delay_time->u.n.value;
424 spk_unlock(flags);
425 schedule_timeout(msecs_to_jiffies
426 (delay_time_val));
427 jiff_max = jiffies + jiffy_delta_val;
428 }
429 }
430 last = ch;
431 ch = 0;
432 }
433 if (!in_escape)
434 dt_sendchar(PROCSPEECH);
435 }
436
437 static const char *synth_immediate(struct spk_synth *synth, const char *buf)
438 {
439 u_char ch;
440 while ((ch = *buf)) {
441 if (ch == '\n')
442 ch = PROCSPEECH;
443 if (dt_sendchar(ch))
444 return buf;
445 buf++;
446 }
447 return 0;
448 }
449
450 static int synth_probe(struct spk_synth *synth)
451 {
452 int i = 0, failed = 0;
453 pr_info("Probing for %s.\n", synth->long_name);
454 for (i = 0; synth_portlist[i]; i++) {
455 if (synth_request_region(synth_portlist[i], SYNTH_IO_EXTENT)) {
456 pr_warn("request_region: failed with 0x%x, %d\n",
457 synth_portlist[i], SYNTH_IO_EXTENT);
458 continue;
459 }
460 speakup_info.port_tts = synth_portlist[i];
461 failed = testkernel();
462 if (failed == 0)
463 break;
464 }
465 if (failed) {
466 pr_info("%s: not found\n", synth->long_name);
467 return -ENODEV;
468 }
469 pr_info("%s: %03x-%03x, Driver Version %s,\n", synth->long_name,
470 speakup_info.port_tts, speakup_info.port_tts + 7,
471 synth->version);
472 synth->alive = 1;
473 return 0;
474 }
475
476 static void dtpc_release(void)
477 {
478 if (speakup_info.port_tts)
479 synth_release_region(speakup_info.port_tts, SYNTH_IO_EXTENT);
480 speakup_info.port_tts = 0;
481 }
482
483 module_param_named(start, synth_dec_pc.startup, short, S_IRUGO);
484
485 MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
486
487 static int __init decpc_init(void)
488 {
489 return synth_add(&synth_dec_pc);
490 }
491
492 static void __exit decpc_exit(void)
493 {
494 synth_remove(&synth_dec_pc);
495 }
496
497 module_init(decpc_init);
498 module_exit(decpc_exit);
499 MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
500 MODULE_AUTHOR("David Borowski");
501 MODULE_DESCRIPTION("Speakup support for DECtalk PC synthesizers");
502 MODULE_LICENSE("GPL");
503 MODULE_VERSION(DRV_VERSION);
504
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