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x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE
[linux-btrfs-devel.git] / drivers / usb / gadget / s3c2410_udc.c
blob8d31848aab091534ae998e588f7803c88ea121c9
1 /*
2 * linux/drivers/usb/gadget/s3c2410_udc.c
3 *
4 * Samsung S3C24xx series on-chip full speed USB device controllers
5 *
6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 */
24
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/timer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/platform_device.h>
37 #include <linux/clk.h>
38 #include <linux/gpio.h>
39 #include <linux/prefetch.h>
40
41 #include <linux/debugfs.h>
42 #include <linux/seq_file.h>
43
44 #include <linux/usb.h>
45 #include <linux/usb/gadget.h>
46
47 #include <asm/byteorder.h>
48 #include <asm/io.h>
49 #include <asm/irq.h>
50 #include <asm/system.h>
51 #include <asm/unaligned.h>
52 #include <mach/irqs.h>
53
54 #include <mach/hardware.h>
55
56 #include <plat/regs-udc.h>
57 #include <plat/udc.h>
58
59
60 #include "s3c2410_udc.h"
61
62 #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
63 #define DRIVER_VERSION "29 Apr 2007"
64 #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
65 "Arnaud Patard <arnaud.patard@rtp-net.org>"
66
67 static const char gadget_name[] = "s3c2410_udc";
68 static const char driver_desc[] = DRIVER_DESC;
69
70 static struct s3c2410_udc *the_controller;
71 static struct clk *udc_clock;
72 static struct clk *usb_bus_clock;
73 static void __iomem *base_addr;
74 static u64 rsrc_start;
75 static u64 rsrc_len;
76 static struct dentry *s3c2410_udc_debugfs_root;
77
78 static inline u32 udc_read(u32 reg)
79 {
80 return readb(base_addr + reg);
81 }
82
83 static inline void udc_write(u32 value, u32 reg)
84 {
85 writeb(value, base_addr + reg);
86 }
87
88 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
89 {
90 writeb(value, base + reg);
91 }
92
93 static struct s3c2410_udc_mach_info *udc_info;
94
95 /*************************** DEBUG FUNCTION ***************************/
96 #define DEBUG_NORMAL 1
97 #define DEBUG_VERBOSE 2
98
99 #ifdef CONFIG_USB_S3C2410_DEBUG
100 #define USB_S3C2410_DEBUG_LEVEL 0
101
102 static uint32_t s3c2410_ticks = 0;
103
104 static int dprintk(int level, const char *fmt, ...)
105 {
106 static char printk_buf[1024];
107 static long prevticks;
108 static int invocation;
109 va_list args;
110 int len;
111
112 if (level > USB_S3C2410_DEBUG_LEVEL)
113 return 0;
114
115 if (s3c2410_ticks != prevticks) {
116 prevticks = s3c2410_ticks;
117 invocation = 0;
118 }
119
120 len = scnprintf(printk_buf,
121 sizeof(printk_buf), "%1lu.%02d USB: ",
122 prevticks, invocation++);
123
124 va_start(args, fmt);
125 len = vscnprintf(printk_buf+len,
126 sizeof(printk_buf)-len, fmt, args);
127 va_end(args);
128
129 return printk(KERN_DEBUG "%s", printk_buf);
130 }
131 #else
132 static int dprintk(int level, const char *fmt, ...)
133 {
134 return 0;
135 }
136 #endif
137 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
138 {
139 u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
140 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
141 u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
142 u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
143
144 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
145 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
146 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
147 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
148 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
149 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
150 udc_write(0, S3C2410_UDC_INDEX_REG);
151 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
152 udc_write(1, S3C2410_UDC_INDEX_REG);
153 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
154 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
155 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
156 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
157 udc_write(2, S3C2410_UDC_INDEX_REG);
158 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
159 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
160 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
161 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
162
163 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
164 "PWR_REG : 0x%04X\n"
165 "EP_INT_REG : 0x%04X\n"
166 "USB_INT_REG : 0x%04X\n"
167 "EP_INT_EN_REG : 0x%04X\n"
168 "USB_INT_EN_REG : 0x%04X\n"
169 "EP0_CSR : 0x%04X\n"
170 "EP1_I_CSR1 : 0x%04X\n"
171 "EP1_I_CSR2 : 0x%04X\n"
172 "EP1_O_CSR1 : 0x%04X\n"
173 "EP1_O_CSR2 : 0x%04X\n"
174 "EP2_I_CSR1 : 0x%04X\n"
175 "EP2_I_CSR2 : 0x%04X\n"
176 "EP2_O_CSR1 : 0x%04X\n"
177 "EP2_O_CSR2 : 0x%04X\n",
178 addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
179 ep_int_en_reg, usb_int_en_reg, ep0_csr,
180 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
181 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
182 );
183
184 return 0;
185 }
186
187 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
188 struct file *file)
189 {
190 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
191 }
192
193 static const struct file_operations s3c2410_udc_debugfs_fops = {
194 .open = s3c2410_udc_debugfs_fops_open,
195 .read = seq_read,
196 .llseek = seq_lseek,
197 .release = single_release,
198 .owner = THIS_MODULE,
199 };
200
201 /* io macros */
202
203 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
204 {
205 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
206 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
207 S3C2410_UDC_EP0_CSR_REG);
208 }
209
210 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
211 {
212 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
213 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
214 }
215
216 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
217 {
218 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
219 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
220 }
221
222 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
223 {
224 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
225 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
226 }
227
228 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
229 {
230 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
231 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
232 }
233
234 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
235 {
236 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
237 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
238 }
239
240 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
241 {
242 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
243
244 udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
245 | S3C2410_UDC_EP0_CSR_DE),
246 S3C2410_UDC_EP0_CSR_REG);
247 }
248
249 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
250 {
251 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
252 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
253 | S3C2410_UDC_EP0_CSR_SSE),
254 S3C2410_UDC_EP0_CSR_REG);
255 }
256
257 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
258 {
259 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
260 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
261 | S3C2410_UDC_EP0_CSR_DE),
262 S3C2410_UDC_EP0_CSR_REG);
263 }
264
265 /*------------------------- I/O ----------------------------------*/
266
267 /*
268 * s3c2410_udc_done
269 */
270 static void s3c2410_udc_done(struct s3c2410_ep *ep,
271 struct s3c2410_request *req, int status)
272 {
273 unsigned halted = ep->halted;
274
275 list_del_init(&req->queue);
276
277 if (likely (req->req.status == -EINPROGRESS))
278 req->req.status = status;
279 else
280 status = req->req.status;
281
282 ep->halted = 1;
283 req->req.complete(&ep->ep, &req->req);
284 ep->halted = halted;
285 }
286
287 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
288 struct s3c2410_ep *ep, int status)
289 {
290 /* Sanity check */
291 if (&ep->queue == NULL)
292 return;
293
294 while (!list_empty (&ep->queue)) {
295 struct s3c2410_request *req;
296 req = list_entry (ep->queue.next, struct s3c2410_request,
297 queue);
298 s3c2410_udc_done(ep, req, status);
299 }
300 }
301
302 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
303 {
304 unsigned i;
305
306 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
307 * fifos, and pending transactions mustn't be continued in any case.
308 */
309
310 for (i = 1; i < S3C2410_ENDPOINTS; i++)
311 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
312 }
313
314 static inline int s3c2410_udc_fifo_count_out(void)
315 {
316 int tmp;
317
318 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
319 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
320 return tmp;
321 }
322
323 /*
324 * s3c2410_udc_write_packet
325 */
326 static inline int s3c2410_udc_write_packet(int fifo,
327 struct s3c2410_request *req,
328 unsigned max)
329 {
330 unsigned len = min(req->req.length - req->req.actual, max);
331 u8 *buf = req->req.buf + req->req.actual;
332
333 prefetch(buf);
334
335 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
336 req->req.actual, req->req.length, len, req->req.actual + len);
337
338 req->req.actual += len;
339
340 udelay(5);
341 writesb(base_addr + fifo, buf, len);
342 return len;
343 }
344
345 /*
346 * s3c2410_udc_write_fifo
347 *
348 * return: 0 = still running, 1 = completed, negative = errno
349 */
350 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
351 struct s3c2410_request *req)
352 {
353 unsigned count;
354 int is_last;
355 u32 idx;
356 int fifo_reg;
357 u32 ep_csr;
358
359 idx = ep->bEndpointAddress & 0x7F;
360 switch (idx) {
361 default:
362 idx = 0;
363 case 0:
364 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
365 break;
366 case 1:
367 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
368 break;
369 case 2:
370 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
371 break;
372 case 3:
373 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
374 break;
375 case 4:
376 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
377 break;
378 }
379
380 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
381
382 /* last packet is often short (sometimes a zlp) */
383 if (count != ep->ep.maxpacket)
384 is_last = 1;
385 else if (req->req.length != req->req.actual || req->req.zero)
386 is_last = 0;
387 else
388 is_last = 2;
389
390 /* Only ep0 debug messages are interesting */
391 if (idx == 0)
392 dprintk(DEBUG_NORMAL,
393 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
394 idx, count, req->req.actual, req->req.length,
395 is_last, req->req.zero);
396
397 if (is_last) {
398 /* The order is important. It prevents sending 2 packets
399 * at the same time */
400
401 if (idx == 0) {
402 /* Reset signal => no need to say 'data sent' */
403 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
404 & S3C2410_UDC_USBINT_RESET))
405 s3c2410_udc_set_ep0_de_in(base_addr);
406 ep->dev->ep0state=EP0_IDLE;
407 } else {
408 udc_write(idx, S3C2410_UDC_INDEX_REG);
409 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
410 udc_write(idx, S3C2410_UDC_INDEX_REG);
411 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
412 S3C2410_UDC_IN_CSR1_REG);
413 }
414
415 s3c2410_udc_done(ep, req, 0);
416 is_last = 1;
417 } else {
418 if (idx == 0) {
419 /* Reset signal => no need to say 'data sent' */
420 if (! (udc_read(S3C2410_UDC_USB_INT_REG)
421 & S3C2410_UDC_USBINT_RESET))
422 s3c2410_udc_set_ep0_ipr(base_addr);
423 } else {
424 udc_write(idx, S3C2410_UDC_INDEX_REG);
425 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
426 udc_write(idx, S3C2410_UDC_INDEX_REG);
427 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
428 S3C2410_UDC_IN_CSR1_REG);
429 }
430 }
431
432 return is_last;
433 }
434
435 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
436 struct s3c2410_request *req, unsigned avail)
437 {
438 unsigned len;
439
440 len = min(req->req.length - req->req.actual, avail);
441 req->req.actual += len;
442
443 readsb(fifo + base_addr, buf, len);
444 return len;
445 }
446
447 /*
448 * return: 0 = still running, 1 = queue empty, negative = errno
449 */
450 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
451 struct s3c2410_request *req)
452 {
453 u8 *buf;
454 u32 ep_csr;
455 unsigned bufferspace;
456 int is_last=1;
457 unsigned avail;
458 int fifo_count = 0;
459 u32 idx;
460 int fifo_reg;
461
462 idx = ep->bEndpointAddress & 0x7F;
463
464 switch (idx) {
465 default:
466 idx = 0;
467 case 0:
468 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
469 break;
470 case 1:
471 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
472 break;
473 case 2:
474 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
475 break;
476 case 3:
477 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
478 break;
479 case 4:
480 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
481 break;
482 }
483
484 if (!req->req.length)
485 return 1;
486
487 buf = req->req.buf + req->req.actual;
488 bufferspace = req->req.length - req->req.actual;
489 if (!bufferspace) {
490 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
491 return -1;
492 }
493
494 udc_write(idx, S3C2410_UDC_INDEX_REG);
495
496 fifo_count = s3c2410_udc_fifo_count_out();
497 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
498
499 if (fifo_count > ep->ep.maxpacket)
500 avail = ep->ep.maxpacket;
501 else
502 avail = fifo_count;
503
504 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
505
506 /* checking this with ep0 is not accurate as we already
507 * read a control request
508 **/
509 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
510 is_last = 1;
511 /* overflowed this request? flush extra data */
512 if (fifo_count != avail)
513 req->req.status = -EOVERFLOW;
514 } else {
515 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
516 }
517
518 udc_write(idx, S3C2410_UDC_INDEX_REG);
519 fifo_count = s3c2410_udc_fifo_count_out();
520
521 /* Only ep0 debug messages are interesting */
522 if (idx == 0)
523 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
524 __func__, fifo_count,is_last);
525
526 if (is_last) {
527 if (idx == 0) {
528 s3c2410_udc_set_ep0_de_out(base_addr);
529 ep->dev->ep0state = EP0_IDLE;
530 } else {
531 udc_write(idx, S3C2410_UDC_INDEX_REG);
532 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
533 udc_write(idx, S3C2410_UDC_INDEX_REG);
534 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
535 S3C2410_UDC_OUT_CSR1_REG);
536 }
537
538 s3c2410_udc_done(ep, req, 0);
539 } else {
540 if (idx == 0) {
541 s3c2410_udc_clear_ep0_opr(base_addr);
542 } else {
543 udc_write(idx, S3C2410_UDC_INDEX_REG);
544 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
545 udc_write(idx, S3C2410_UDC_INDEX_REG);
546 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
547 S3C2410_UDC_OUT_CSR1_REG);
548 }
549 }
550
551 return is_last;
552 }
553
554 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
555 {
556 unsigned char *outbuf = (unsigned char*)crq;
557 int bytes_read = 0;
558
559 udc_write(0, S3C2410_UDC_INDEX_REG);
560
561 bytes_read = s3c2410_udc_fifo_count_out();
562
563 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
564
565 if (bytes_read > sizeof(struct usb_ctrlrequest))
566 bytes_read = sizeof(struct usb_ctrlrequest);
567
568 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
569
570 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
571 bytes_read, crq->bRequest, crq->bRequestType,
572 crq->wValue, crq->wIndex, crq->wLength);
573
574 return bytes_read;
575 }
576
577 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
578 struct usb_ctrlrequest *crq)
579 {
580 u16 status = 0;
581 u8 ep_num = crq->wIndex & 0x7F;
582 u8 is_in = crq->wIndex & USB_DIR_IN;
583
584 switch (crq->bRequestType & USB_RECIP_MASK) {
585 case USB_RECIP_INTERFACE:
586 break;
587
588 case USB_RECIP_DEVICE:
589 status = dev->devstatus;
590 break;
591
592 case USB_RECIP_ENDPOINT:
593 if (ep_num > 4 || crq->wLength > 2)
594 return 1;
595
596 if (ep_num == 0) {
597 udc_write(0, S3C2410_UDC_INDEX_REG);
598 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
599 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
600 } else {
601 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
602 if (is_in) {
603 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
604 status = status & S3C2410_UDC_ICSR1_SENDSTL;
605 } else {
606 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
607 status = status & S3C2410_UDC_OCSR1_SENDSTL;
608 }
609 }
610
611 status = status ? 1 : 0;
612 break;
613
614 default:
615 return 1;
616 }
617
618 /* Seems to be needed to get it working. ouch :( */
619 udelay(5);
620 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
621 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
622 s3c2410_udc_set_ep0_de_in(base_addr);
623
624 return 0;
625 }
626 /*------------------------- usb state machine -------------------------------*/
627 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
628
629 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
630 struct s3c2410_ep *ep,
631 struct usb_ctrlrequest *crq,
632 u32 ep0csr)
633 {
634 int len, ret, tmp;
635
636 /* start control request? */
637 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
638 return;
639
640 s3c2410_udc_nuke(dev, ep, -EPROTO);
641
642 len = s3c2410_udc_read_fifo_crq(crq);
643 if (len != sizeof(*crq)) {
644 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
645 " wanted %d bytes got %d. Stalling out...\n",
646 sizeof(*crq), len);
647 s3c2410_udc_set_ep0_ss(base_addr);
648 return;
649 }
650
651 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
652 crq->bRequest, crq->bRequestType, crq->wLength);
653
654 /* cope with automagic for some standard requests. */
655 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
656 == USB_TYPE_STANDARD;
657 dev->req_config = 0;
658 dev->req_pending = 1;
659
660 switch (crq->bRequest) {
661 case USB_REQ_SET_CONFIGURATION:
662 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
663
664 if (crq->bRequestType == USB_RECIP_DEVICE) {
665 dev->req_config = 1;
666 s3c2410_udc_set_ep0_de_out(base_addr);
667 }
668 break;
669
670 case USB_REQ_SET_INTERFACE:
671 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
672
673 if (crq->bRequestType == USB_RECIP_INTERFACE) {
674 dev->req_config = 1;
675 s3c2410_udc_set_ep0_de_out(base_addr);
676 }
677 break;
678
679 case USB_REQ_SET_ADDRESS:
680 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
681
682 if (crq->bRequestType == USB_RECIP_DEVICE) {
683 tmp = crq->wValue & 0x7F;
684 dev->address = tmp;
685 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
686 S3C2410_UDC_FUNC_ADDR_REG);
687 s3c2410_udc_set_ep0_de_out(base_addr);
688 return;
689 }
690 break;
691
692 case USB_REQ_GET_STATUS:
693 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
694 s3c2410_udc_clear_ep0_opr(base_addr);
695
696 if (dev->req_std) {
697 if (!s3c2410_udc_get_status(dev, crq)) {
698 return;
699 }
700 }
701 break;
702
703 case USB_REQ_CLEAR_FEATURE:
704 s3c2410_udc_clear_ep0_opr(base_addr);
705
706 if (crq->bRequestType != USB_RECIP_ENDPOINT)
707 break;
708
709 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
710 break;
711
712 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
713 s3c2410_udc_set_ep0_de_out(base_addr);
714 return;
715
716 case USB_REQ_SET_FEATURE:
717 s3c2410_udc_clear_ep0_opr(base_addr);
718
719 if (crq->bRequestType != USB_RECIP_ENDPOINT)
720 break;
721
722 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
723 break;
724
725 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
726 s3c2410_udc_set_ep0_de_out(base_addr);
727 return;
728
729 default:
730 s3c2410_udc_clear_ep0_opr(base_addr);
731 break;
732 }
733
734 if (crq->bRequestType & USB_DIR_IN)
735 dev->ep0state = EP0_IN_DATA_PHASE;
736 else
737 dev->ep0state = EP0_OUT_DATA_PHASE;
738
739 if (!dev->driver)
740 return;
741
742 /* deliver the request to the gadget driver */
743 ret = dev->driver->setup(&dev->gadget, crq);
744 if (ret < 0) {
745 if (dev->req_config) {
746 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
747 crq->bRequest, ret);
748 return;
749 }
750
751 if (ret == -EOPNOTSUPP)
752 dprintk(DEBUG_NORMAL, "Operation not supported\n");
753 else
754 dprintk(DEBUG_NORMAL,
755 "dev->driver->setup failed. (%d)\n", ret);
756
757 udelay(5);
758 s3c2410_udc_set_ep0_ss(base_addr);
759 s3c2410_udc_set_ep0_de_out(base_addr);
760 dev->ep0state = EP0_IDLE;
761 /* deferred i/o == no response yet */
762 } else if (dev->req_pending) {
763 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
764 dev->req_pending=0;
765 }
766
767 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
768 }
769
770 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
771 {
772 u32 ep0csr;
773 struct s3c2410_ep *ep = &dev->ep[0];
774 struct s3c2410_request *req;
775 struct usb_ctrlrequest crq;
776
777 if (list_empty(&ep->queue))
778 req = NULL;
779 else
780 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
781
782 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
783 * S3C2410_UDC_EP0_CSR_REG when index is zero */
784
785 udc_write(0, S3C2410_UDC_INDEX_REG);
786 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
787
788 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
789 ep0csr, ep0states[dev->ep0state]);
790
791 /* clear stall status */
792 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
793 s3c2410_udc_nuke(dev, ep, -EPIPE);
794 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
795 s3c2410_udc_clear_ep0_sst(base_addr);
796 dev->ep0state = EP0_IDLE;
797 return;
798 }
799
800 /* clear setup end */
801 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
802 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
803 s3c2410_udc_nuke(dev, ep, 0);
804 s3c2410_udc_clear_ep0_se(base_addr);
805 dev->ep0state = EP0_IDLE;
806 }
807
808 switch (dev->ep0state) {
809 case EP0_IDLE:
810 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
811 break;
812
813 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
814 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
815 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
816 s3c2410_udc_write_fifo(ep, req);
817 }
818 break;
819
820 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
821 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
822 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
823 s3c2410_udc_read_fifo(ep,req);
824 }
825 break;
826
827 case EP0_END_XFER:
828 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
829 dev->ep0state = EP0_IDLE;
830 break;
831
832 case EP0_STALL:
833 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
834 dev->ep0state = EP0_IDLE;
835 break;
836 }
837 }
838
839 /*
840 * handle_ep - Manage I/O endpoints
841 */
842
843 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
844 {
845 struct s3c2410_request *req;
846 int is_in = ep->bEndpointAddress & USB_DIR_IN;
847 u32 ep_csr1;
848 u32 idx;
849
850 if (likely (!list_empty(&ep->queue)))
851 req = list_entry(ep->queue.next,
852 struct s3c2410_request, queue);
853 else
854 req = NULL;
855
856 idx = ep->bEndpointAddress & 0x7F;
857
858 if (is_in) {
859 udc_write(idx, S3C2410_UDC_INDEX_REG);
860 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
861 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
862 idx, ep_csr1, req ? 1 : 0);
863
864 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
865 dprintk(DEBUG_VERBOSE, "st\n");
866 udc_write(idx, S3C2410_UDC_INDEX_REG);
867 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
868 S3C2410_UDC_IN_CSR1_REG);
869 return;
870 }
871
872 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
873 s3c2410_udc_write_fifo(ep,req);
874 }
875 } else {
876 udc_write(idx, S3C2410_UDC_INDEX_REG);
877 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
878 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
879
880 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
881 udc_write(idx, S3C2410_UDC_INDEX_REG);
882 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
883 S3C2410_UDC_OUT_CSR1_REG);
884 return;
885 }
886
887 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
888 s3c2410_udc_read_fifo(ep,req);
889 }
890 }
891 }
892
893 #include <mach/regs-irq.h>
894
895 /*
896 * s3c2410_udc_irq - interrupt handler
897 */
898 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
899 {
900 struct s3c2410_udc *dev = _dev;
901 int usb_status;
902 int usbd_status;
903 int pwr_reg;
904 int ep0csr;
905 int i;
906 u32 idx, idx2;
907 unsigned long flags;
908
909 spin_lock_irqsave(&dev->lock, flags);
910
911 /* Driver connected ? */
912 if (!dev->driver) {
913 /* Clear interrupts */
914 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
915 S3C2410_UDC_USB_INT_REG);
916 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
917 S3C2410_UDC_EP_INT_REG);
918 }
919
920 /* Save index */
921 idx = udc_read(S3C2410_UDC_INDEX_REG);
922
923 /* Read status registers */
924 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
925 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
926 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
927
928 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
929 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
930
931 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
932 usb_status, usbd_status, pwr_reg, ep0csr);
933
934 /*
935 * Now, handle interrupts. There's two types :
936 * - Reset, Resume, Suspend coming -> usb_int_reg
937 * - EP -> ep_int_reg
938 */
939
940 /* RESET */
941 if (usb_status & S3C2410_UDC_USBINT_RESET) {
942 /* two kind of reset :
943 * - reset start -> pwr reg = 8
944 * - reset end -> pwr reg = 0
945 **/
946 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
947 ep0csr, pwr_reg);
948
949 dev->gadget.speed = USB_SPEED_UNKNOWN;
950 udc_write(0x00, S3C2410_UDC_INDEX_REG);
951 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
952 S3C2410_UDC_MAXP_REG);
953 dev->address = 0;
954
955 dev->ep0state = EP0_IDLE;
956 dev->gadget.speed = USB_SPEED_FULL;
957
958 /* clear interrupt */
959 udc_write(S3C2410_UDC_USBINT_RESET,
960 S3C2410_UDC_USB_INT_REG);
961
962 udc_write(idx, S3C2410_UDC_INDEX_REG);
963 spin_unlock_irqrestore(&dev->lock, flags);
964 return IRQ_HANDLED;
965 }
966
967 /* RESUME */
968 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
969 dprintk(DEBUG_NORMAL, "USB resume\n");
970
971 /* clear interrupt */
972 udc_write(S3C2410_UDC_USBINT_RESUME,
973 S3C2410_UDC_USB_INT_REG);
974
975 if (dev->gadget.speed != USB_SPEED_UNKNOWN
976 && dev->driver
977 && dev->driver->resume)
978 dev->driver->resume(&dev->gadget);
979 }
980
981 /* SUSPEND */
982 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
983 dprintk(DEBUG_NORMAL, "USB suspend\n");
984
985 /* clear interrupt */
986 udc_write(S3C2410_UDC_USBINT_SUSPEND,
987 S3C2410_UDC_USB_INT_REG);
988
989 if (dev->gadget.speed != USB_SPEED_UNKNOWN
990 && dev->driver
991 && dev->driver->suspend)
992 dev->driver->suspend(&dev->gadget);
993
994 dev->ep0state = EP0_IDLE;
995 }
996
997 /* EP */
998 /* control traffic */
999 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
1000 * generate an interrupt
1001 */
1002 if (usbd_status & S3C2410_UDC_INT_EP0) {
1003 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
1004 /* Clear the interrupt bit by setting it to 1 */
1005 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
1006 s3c2410_udc_handle_ep0(dev);
1007 }
1008
1009 /* endpoint data transfers */
1010 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1011 u32 tmp = 1 << i;
1012 if (usbd_status & tmp) {
1013 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1014
1015 /* Clear the interrupt bit by setting it to 1 */
1016 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1017 s3c2410_udc_handle_ep(&dev->ep[i]);
1018 }
1019 }
1020
1021 /* what else causes this interrupt? a receive! who is it? */
1022 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
1023 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1024 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
1025 udc_write(i, S3C2410_UDC_INDEX_REG);
1026
1027 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
1028 s3c2410_udc_handle_ep(&dev->ep[i]);
1029
1030 /* restore index */
1031 udc_write(idx2, S3C2410_UDC_INDEX_REG);
1032 }
1033 }
1034
1035 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1036
1037 /* Restore old index */
1038 udc_write(idx, S3C2410_UDC_INDEX_REG);
1039
1040 spin_unlock_irqrestore(&dev->lock, flags);
1041
1042 return IRQ_HANDLED;
1043 }
1044 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1045
1046 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1047 {
1048 return container_of(ep, struct s3c2410_ep, ep);
1049 }
1050
1051 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1052 {
1053 return container_of(gadget, struct s3c2410_udc, gadget);
1054 }
1055
1056 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1057 {
1058 return container_of(req, struct s3c2410_request, req);
1059 }
1060
1061 /*
1062 * s3c2410_udc_ep_enable
1063 */
1064 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1065 const struct usb_endpoint_descriptor *desc)
1066 {
1067 struct s3c2410_udc *dev;
1068 struct s3c2410_ep *ep;
1069 u32 max, tmp;
1070 unsigned long flags;
1071 u32 csr1,csr2;
1072 u32 int_en_reg;
1073
1074 ep = to_s3c2410_ep(_ep);
1075
1076 if (!_ep || !desc || ep->desc
1077 || _ep->name == ep0name
1078 || desc->bDescriptorType != USB_DT_ENDPOINT)
1079 return -EINVAL;
1080
1081 dev = ep->dev;
1082 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1083 return -ESHUTDOWN;
1084
1085 max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff;
1086
1087 local_irq_save (flags);
1088 _ep->maxpacket = max & 0x7ff;
1089 ep->desc = desc;
1090 ep->halted = 0;
1091 ep->bEndpointAddress = desc->bEndpointAddress;
1092
1093 /* set max packet */
1094 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1095 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1096
1097 /* set type, direction, address; reset fifo counters */
1098 if (desc->bEndpointAddress & USB_DIR_IN) {
1099 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1100 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1101
1102 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1103 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1104 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1105 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1106 } else {
1107 /* don't flush in fifo or it will cause endpoint interrupt */
1108 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1109 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1110
1111 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1112 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1113 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1114 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1115
1116 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1117 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1118
1119 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1120 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1121 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1122 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1123 }
1124
1125 /* enable irqs */
1126 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1127 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1128
1129 /* print some debug message */
1130 tmp = desc->bEndpointAddress;
1131 dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1132 _ep->name,ep->num, tmp,
1133 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1134
1135 local_irq_restore (flags);
1136 s3c2410_udc_set_halt(_ep, 0);
1137
1138 return 0;
1139 }
1140
1141 /*
1142 * s3c2410_udc_ep_disable
1143 */
1144 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1145 {
1146 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1147 unsigned long flags;
1148 u32 int_en_reg;
1149
1150 if (!_ep || !ep->desc) {
1151 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1152 _ep ? ep->ep.name : NULL);
1153 return -EINVAL;
1154 }
1155
1156 local_irq_save(flags);
1157
1158 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1159
1160 ep->desc = NULL;
1161 ep->halted = 1;
1162
1163 s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1164
1165 /* disable irqs */
1166 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1167 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1168
1169 local_irq_restore(flags);
1170
1171 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1172
1173 return 0;
1174 }
1175
1176 /*
1177 * s3c2410_udc_alloc_request
1178 */
1179 static struct usb_request *
1180 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1181 {
1182 struct s3c2410_request *req;
1183
1184 dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1185
1186 if (!_ep)
1187 return NULL;
1188
1189 req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1190 if (!req)
1191 return NULL;
1192
1193 INIT_LIST_HEAD (&req->queue);
1194 return &req->req;
1195 }
1196
1197 /*
1198 * s3c2410_udc_free_request
1199 */
1200 static void
1201 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1202 {
1203 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1204 struct s3c2410_request *req = to_s3c2410_req(_req);
1205
1206 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1207
1208 if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1209 return;
1210
1211 WARN_ON (!list_empty (&req->queue));
1212 kfree(req);
1213 }
1214
1215 /*
1216 * s3c2410_udc_queue
1217 */
1218 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1219 gfp_t gfp_flags)
1220 {
1221 struct s3c2410_request *req = to_s3c2410_req(_req);
1222 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1223 struct s3c2410_udc *dev;
1224 u32 ep_csr = 0;
1225 int fifo_count = 0;
1226 unsigned long flags;
1227
1228 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1229 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1230 return -EINVAL;
1231 }
1232
1233 dev = ep->dev;
1234 if (unlikely (!dev->driver
1235 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1236 return -ESHUTDOWN;
1237 }
1238
1239 local_irq_save (flags);
1240
1241 if (unlikely(!_req || !_req->complete
1242 || !_req->buf || !list_empty(&req->queue))) {
1243 if (!_req)
1244 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1245 else {
1246 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1247 __func__, !_req->complete,!_req->buf,
1248 !list_empty(&req->queue));
1249 }
1250
1251 local_irq_restore(flags);
1252 return -EINVAL;
1253 }
1254
1255 _req->status = -EINPROGRESS;
1256 _req->actual = 0;
1257
1258 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1259 __func__, ep->bEndpointAddress, _req->length);
1260
1261 if (ep->bEndpointAddress) {
1262 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1263
1264 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1265 ? S3C2410_UDC_IN_CSR1_REG
1266 : S3C2410_UDC_OUT_CSR1_REG);
1267 fifo_count = s3c2410_udc_fifo_count_out();
1268 } else {
1269 udc_write(0, S3C2410_UDC_INDEX_REG);
1270 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1271 fifo_count = s3c2410_udc_fifo_count_out();
1272 }
1273
1274 /* kickstart this i/o queue? */
1275 if (list_empty(&ep->queue) && !ep->halted) {
1276 if (ep->bEndpointAddress == 0 /* ep0 */) {
1277 switch (dev->ep0state) {
1278 case EP0_IN_DATA_PHASE:
1279 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1280 && s3c2410_udc_write_fifo(ep,
1281 req)) {
1282 dev->ep0state = EP0_IDLE;
1283 req = NULL;
1284 }
1285 break;
1286
1287 case EP0_OUT_DATA_PHASE:
1288 if ((!_req->length)
1289 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1290 && s3c2410_udc_read_fifo(ep,
1291 req))) {
1292 dev->ep0state = EP0_IDLE;
1293 req = NULL;
1294 }
1295 break;
1296
1297 default:
1298 local_irq_restore(flags);
1299 return -EL2HLT;
1300 }
1301 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1302 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1303 && s3c2410_udc_write_fifo(ep, req)) {
1304 req = NULL;
1305 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1306 && fifo_count
1307 && s3c2410_udc_read_fifo(ep, req)) {
1308 req = NULL;
1309 }
1310 }
1311
1312 /* pio or dma irq handler advances the queue. */
1313 if (likely (req != 0))
1314 list_add_tail(&req->queue, &ep->queue);
1315
1316 local_irq_restore(flags);
1317
1318 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1319 return 0;
1320 }
1321
1322 /*
1323 * s3c2410_udc_dequeue
1324 */
1325 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1326 {
1327 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1328 struct s3c2410_udc *udc;
1329 int retval = -EINVAL;
1330 unsigned long flags;
1331 struct s3c2410_request *req = NULL;
1332
1333 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1334
1335 if (!the_controller->driver)
1336 return -ESHUTDOWN;
1337
1338 if (!_ep || !_req)
1339 return retval;
1340
1341 udc = to_s3c2410_udc(ep->gadget);
1342
1343 local_irq_save (flags);
1344
1345 list_for_each_entry (req, &ep->queue, queue) {
1346 if (&req->req == _req) {
1347 list_del_init (&req->queue);
1348 _req->status = -ECONNRESET;
1349 retval = 0;
1350 break;
1351 }
1352 }
1353
1354 if (retval == 0) {
1355 dprintk(DEBUG_VERBOSE,
1356 "dequeued req %p from %s, len %d buf %p\n",
1357 req, _ep->name, _req->length, _req->buf);
1358
1359 s3c2410_udc_done(ep, req, -ECONNRESET);
1360 }
1361
1362 local_irq_restore (flags);
1363 return retval;
1364 }
1365
1366 /*
1367 * s3c2410_udc_set_halt
1368 */
1369 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1370 {
1371 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1372 u32 ep_csr = 0;
1373 unsigned long flags;
1374 u32 idx;
1375
1376 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1377 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1378 return -EINVAL;
1379 }
1380
1381 local_irq_save (flags);
1382
1383 idx = ep->bEndpointAddress & 0x7F;
1384
1385 if (idx == 0) {
1386 s3c2410_udc_set_ep0_ss(base_addr);
1387 s3c2410_udc_set_ep0_de_out(base_addr);
1388 } else {
1389 udc_write(idx, S3C2410_UDC_INDEX_REG);
1390 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1391 ? S3C2410_UDC_IN_CSR1_REG
1392 : S3C2410_UDC_OUT_CSR1_REG);
1393
1394 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1395 if (value)
1396 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1397 S3C2410_UDC_IN_CSR1_REG);
1398 else {
1399 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1400 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1401 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1402 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1403 }
1404 } else {
1405 if (value)
1406 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1407 S3C2410_UDC_OUT_CSR1_REG);
1408 else {
1409 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1410 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1411 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1412 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1413 }
1414 }
1415 }
1416
1417 ep->halted = value ? 1 : 0;
1418 local_irq_restore (flags);
1419
1420 return 0;
1421 }
1422
1423 static const struct usb_ep_ops s3c2410_ep_ops = {
1424 .enable = s3c2410_udc_ep_enable,
1425 .disable = s3c2410_udc_ep_disable,
1426
1427 .alloc_request = s3c2410_udc_alloc_request,
1428 .free_request = s3c2410_udc_free_request,
1429
1430 .queue = s3c2410_udc_queue,
1431 .dequeue = s3c2410_udc_dequeue,
1432
1433 .set_halt = s3c2410_udc_set_halt,
1434 };
1435
1436 /*------------------------- usb_gadget_ops ----------------------------------*/
1437
1438 /*
1439 * s3c2410_udc_get_frame
1440 */
1441 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1442 {
1443 int tmp;
1444
1445 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1446
1447 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1448 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1449 return tmp;
1450 }
1451
1452 /*
1453 * s3c2410_udc_wakeup
1454 */
1455 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1456 {
1457 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1458 return 0;
1459 }
1460
1461 /*
1462 * s3c2410_udc_set_selfpowered
1463 */
1464 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1465 {
1466 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1467
1468 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1469
1470 if (value)
1471 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1472 else
1473 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1474
1475 return 0;
1476 }
1477
1478 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1479 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1480
1481 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1482 {
1483 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1484
1485 if (udc_info && (udc_info->udc_command ||
1486 gpio_is_valid(udc_info->pullup_pin))) {
1487
1488 if (is_on)
1489 s3c2410_udc_enable(udc);
1490 else {
1491 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1492 if (udc->driver && udc->driver->disconnect)
1493 udc->driver->disconnect(&udc->gadget);
1494
1495 }
1496 s3c2410_udc_disable(udc);
1497 }
1498 }
1499 else
1500 return -EOPNOTSUPP;
1501
1502 return 0;
1503 }
1504
1505 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1506 {
1507 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1508
1509 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1510
1511 udc->vbus = (is_active != 0);
1512 s3c2410_udc_set_pullup(udc, is_active);
1513 return 0;
1514 }
1515
1516 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1517 {
1518 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1519
1520 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1521
1522 s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1523 return 0;
1524 }
1525
1526 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1527 {
1528 struct s3c2410_udc *dev = _dev;
1529 unsigned int value;
1530
1531 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1532
1533 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1534 if (udc_info->vbus_pin_inverted)
1535 value = !value;
1536
1537 if (value != dev->vbus)
1538 s3c2410_udc_vbus_session(&dev->gadget, value);
1539
1540 return IRQ_HANDLED;
1541 }
1542
1543 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1544 {
1545 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1546
1547 if (udc_info && udc_info->vbus_draw) {
1548 udc_info->vbus_draw(ma);
1549 return 0;
1550 }
1551
1552 return -ENOTSUPP;
1553 }
1554
1555 static int s3c2410_udc_start(struct usb_gadget_driver *driver,
1556 int (*bind)(struct usb_gadget *));
1557 static int s3c2410_udc_stop(struct usb_gadget_driver *driver);
1558
1559 static const struct usb_gadget_ops s3c2410_ops = {
1560 .get_frame = s3c2410_udc_get_frame,
1561 .wakeup = s3c2410_udc_wakeup,
1562 .set_selfpowered = s3c2410_udc_set_selfpowered,
1563 .pullup = s3c2410_udc_pullup,
1564 .vbus_session = s3c2410_udc_vbus_session,
1565 .vbus_draw = s3c2410_vbus_draw,
1566 .start = s3c2410_udc_start,
1567 .stop = s3c2410_udc_stop,
1568 };
1569
1570 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1571 {
1572 if (!udc_info)
1573 return;
1574
1575 if (udc_info->udc_command) {
1576 udc_info->udc_command(cmd);
1577 } else if (gpio_is_valid(udc_info->pullup_pin)) {
1578 int value;
1579
1580 switch (cmd) {
1581 case S3C2410_UDC_P_ENABLE:
1582 value = 1;
1583 break;
1584 case S3C2410_UDC_P_DISABLE:
1585 value = 0;
1586 break;
1587 default:
1588 return;
1589 }
1590 value ^= udc_info->pullup_pin_inverted;
1591
1592 gpio_set_value(udc_info->pullup_pin, value);
1593 }
1594 }
1595
1596 /*------------------------- gadget driver handling---------------------------*/
1597 /*
1598 * s3c2410_udc_disable
1599 */
1600 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1601 {
1602 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1603
1604 /* Disable all interrupts */
1605 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1606 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1607
1608 /* Clear the interrupt registers */
1609 udc_write(S3C2410_UDC_USBINT_RESET
1610 | S3C2410_UDC_USBINT_RESUME
1611 | S3C2410_UDC_USBINT_SUSPEND,
1612 S3C2410_UDC_USB_INT_REG);
1613
1614 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1615
1616 /* Good bye, cruel world */
1617 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1618
1619 /* Set speed to unknown */
1620 dev->gadget.speed = USB_SPEED_UNKNOWN;
1621 }
1622
1623 /*
1624 * s3c2410_udc_reinit
1625 */
1626 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1627 {
1628 u32 i;
1629
1630 /* device/ep0 records init */
1631 INIT_LIST_HEAD (&dev->gadget.ep_list);
1632 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1633 dev->ep0state = EP0_IDLE;
1634
1635 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1636 struct s3c2410_ep *ep = &dev->ep[i];
1637
1638 if (i != 0)
1639 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1640
1641 ep->dev = dev;
1642 ep->desc = NULL;
1643 ep->halted = 0;
1644 INIT_LIST_HEAD (&ep->queue);
1645 }
1646 }
1647
1648 /*
1649 * s3c2410_udc_enable
1650 */
1651 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1652 {
1653 int i;
1654
1655 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1656
1657 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1658 dev->gadget.speed = USB_SPEED_FULL;
1659
1660 /* Set MAXP for all endpoints */
1661 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1662 udc_write(i, S3C2410_UDC_INDEX_REG);
1663 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1664 S3C2410_UDC_MAXP_REG);
1665 }
1666
1667 /* Set default power state */
1668 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1669
1670 /* Enable reset and suspend interrupt interrupts */
1671 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1672 S3C2410_UDC_USB_INT_EN_REG);
1673
1674 /* Enable ep0 interrupt */
1675 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1676
1677 /* time to say "hello, world" */
1678 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1679 }
1680
1681 static int s3c2410_udc_start(struct usb_gadget_driver *driver,
1682 int (*bind)(struct usb_gadget *))
1683 {
1684 struct s3c2410_udc *udc = the_controller;
1685 int retval;
1686
1687 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1688
1689 /* Sanity checks */
1690 if (!udc)
1691 return -ENODEV;
1692
1693 if (udc->driver)
1694 return -EBUSY;
1695
1696 if (!bind || !driver->setup || driver->speed < USB_SPEED_FULL) {
1697 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1698 bind, driver->setup, driver->speed);
1699 return -EINVAL;
1700 }
1701 #if defined(MODULE)
1702 if (!driver->unbind) {
1703 printk(KERN_ERR "Invalid driver: no unbind method\n");
1704 return -EINVAL;
1705 }
1706 #endif
1707
1708 /* Hook the driver */
1709 udc->driver = driver;
1710 udc->gadget.dev.driver = &driver->driver;
1711
1712 /* Bind the driver */
1713 if ((retval = device_add(&udc->gadget.dev)) != 0) {
1714 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1715 goto register_error;
1716 }
1717
1718 dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1719 driver->driver.name);
1720
1721 if ((retval = bind(&udc->gadget)) != 0) {
1722 device_del(&udc->gadget.dev);
1723 goto register_error;
1724 }
1725
1726 /* Enable udc */
1727 s3c2410_udc_enable(udc);
1728
1729 return 0;
1730
1731 register_error:
1732 udc->driver = NULL;
1733 udc->gadget.dev.driver = NULL;
1734 return retval;
1735 }
1736
1737 static int s3c2410_udc_stop(struct usb_gadget_driver *driver)
1738 {
1739 struct s3c2410_udc *udc = the_controller;
1740
1741 if (!udc)
1742 return -ENODEV;
1743
1744 if (!driver || driver != udc->driver || !driver->unbind)
1745 return -EINVAL;
1746
1747 dprintk(DEBUG_NORMAL, "usb_gadget_unregister_driver() '%s'\n",
1748 driver->driver.name);
1749
1750 /* report disconnect */
1751 if (driver->disconnect)
1752 driver->disconnect(&udc->gadget);
1753
1754 driver->unbind(&udc->gadget);
1755
1756 device_del(&udc->gadget.dev);
1757 udc->driver = NULL;
1758
1759 /* Disable udc */
1760 s3c2410_udc_disable(udc);
1761
1762 return 0;
1763 }
1764
1765 /*---------------------------------------------------------------------------*/
1766 static struct s3c2410_udc memory = {
1767 .gadget = {
1768 .ops = &s3c2410_ops,
1769 .ep0 = &memory.ep[0].ep,
1770 .name = gadget_name,
1771 .dev = {
1772 .init_name = "gadget",
1773 },
1774 },
1775
1776 /* control endpoint */
1777 .ep[0] = {
1778 .num = 0,
1779 .ep = {
1780 .name = ep0name,
1781 .ops = &s3c2410_ep_ops,
1782 .maxpacket = EP0_FIFO_SIZE,
1783 },
1784 .dev = &memory,
1785 },
1786
1787 /* first group of endpoints */
1788 .ep[1] = {
1789 .num = 1,
1790 .ep = {
1791 .name = "ep1-bulk",
1792 .ops = &s3c2410_ep_ops,
1793 .maxpacket = EP_FIFO_SIZE,
1794 },
1795 .dev = &memory,
1796 .fifo_size = EP_FIFO_SIZE,
1797 .bEndpointAddress = 1,
1798 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1799 },
1800 .ep[2] = {
1801 .num = 2,
1802 .ep = {
1803 .name = "ep2-bulk",
1804 .ops = &s3c2410_ep_ops,
1805 .maxpacket = EP_FIFO_SIZE,
1806 },
1807 .dev = &memory,
1808 .fifo_size = EP_FIFO_SIZE,
1809 .bEndpointAddress = 2,
1810 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1811 },
1812 .ep[3] = {
1813 .num = 3,
1814 .ep = {
1815 .name = "ep3-bulk",
1816 .ops = &s3c2410_ep_ops,
1817 .maxpacket = EP_FIFO_SIZE,
1818 },
1819 .dev = &memory,
1820 .fifo_size = EP_FIFO_SIZE,
1821 .bEndpointAddress = 3,
1822 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1823 },
1824 .ep[4] = {
1825 .num = 4,
1826 .ep = {
1827 .name = "ep4-bulk",
1828 .ops = &s3c2410_ep_ops,
1829 .maxpacket = EP_FIFO_SIZE,
1830 },
1831 .dev = &memory,
1832 .fifo_size = EP_FIFO_SIZE,
1833 .bEndpointAddress = 4,
1834 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1835 }
1836
1837 };
1838
1839 /*
1840 * probe - binds to the platform device
1841 */
1842 static int s3c2410_udc_probe(struct platform_device *pdev)
1843 {
1844 struct s3c2410_udc *udc = &memory;
1845 struct device *dev = &pdev->dev;
1846 int retval;
1847 int irq;
1848
1849 dev_dbg(dev, "%s()\n", __func__);
1850
1851 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1852 if (IS_ERR(usb_bus_clock)) {
1853 dev_err(dev, "failed to get usb bus clock source\n");
1854 return PTR_ERR(usb_bus_clock);
1855 }
1856
1857 clk_enable(usb_bus_clock);
1858
1859 udc_clock = clk_get(NULL, "usb-device");
1860 if (IS_ERR(udc_clock)) {
1861 dev_err(dev, "failed to get udc clock source\n");
1862 return PTR_ERR(udc_clock);
1863 }
1864
1865 clk_enable(udc_clock);
1866
1867 mdelay(10);
1868
1869 dev_dbg(dev, "got and enabled clocks\n");
1870
1871 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1872 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1873 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1874 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1875 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1876 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1877 }
1878
1879 spin_lock_init (&udc->lock);
1880 udc_info = pdev->dev.platform_data;
1881
1882 rsrc_start = S3C2410_PA_USBDEV;
1883 rsrc_len = S3C24XX_SZ_USBDEV;
1884
1885 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1886 return -EBUSY;
1887
1888 base_addr = ioremap(rsrc_start, rsrc_len);
1889 if (!base_addr) {
1890 retval = -ENOMEM;
1891 goto err_mem;
1892 }
1893
1894 device_initialize(&udc->gadget.dev);
1895 udc->gadget.dev.parent = &pdev->dev;
1896 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1897
1898 the_controller = udc;
1899 platform_set_drvdata(pdev, udc);
1900
1901 s3c2410_udc_disable(udc);
1902 s3c2410_udc_reinit(udc);
1903
1904 /* irq setup after old hardware state is cleaned up */
1905 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1906 IRQF_DISABLED, gadget_name, udc);
1907
1908 if (retval != 0) {
1909 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1910 retval = -EBUSY;
1911 goto err_map;
1912 }
1913
1914 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1915
1916 if (udc_info && udc_info->vbus_pin > 0) {
1917 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1918 if (retval < 0) {
1919 dev_err(dev, "cannot claim vbus pin\n");
1920 goto err_int;
1921 }
1922
1923 irq = gpio_to_irq(udc_info->vbus_pin);
1924 if (irq < 0) {
1925 dev_err(dev, "no irq for gpio vbus pin\n");
1926 goto err_gpio_claim;
1927 }
1928
1929 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1930 IRQF_DISABLED | IRQF_TRIGGER_RISING
1931 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1932 gadget_name, udc);
1933
1934 if (retval != 0) {
1935 dev_err(dev, "can't get vbus irq %d, err %d\n",
1936 irq, retval);
1937 retval = -EBUSY;
1938 goto err_gpio_claim;
1939 }
1940
1941 dev_dbg(dev, "got irq %i\n", irq);
1942 } else {
1943 udc->vbus = 1;
1944 }
1945
1946 if (udc_info && !udc_info->udc_command &&
1947 gpio_is_valid(udc_info->pullup_pin)) {
1948
1949 retval = gpio_request_one(udc_info->pullup_pin,
1950 udc_info->vbus_pin_inverted ?
1951 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1952 "udc pullup");
1953 if (retval)
1954 goto err_vbus_irq;
1955 }
1956
1957 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1958 if (retval)
1959 goto err_add_udc;
1960
1961 if (s3c2410_udc_debugfs_root) {
1962 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1963 s3c2410_udc_debugfs_root,
1964 udc, &s3c2410_udc_debugfs_fops);
1965 if (!udc->regs_info)
1966 dev_warn(dev, "debugfs file creation failed\n");
1967 }
1968
1969 dev_dbg(dev, "probe ok\n");
1970
1971 return 0;
1972
1973 err_add_udc:
1974 if (udc_info && !udc_info->udc_command &&
1975 gpio_is_valid(udc_info->pullup_pin))
1976 gpio_free(udc_info->pullup_pin);
1977 err_vbus_irq:
1978 if (udc_info && udc_info->vbus_pin > 0)
1979 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1980 err_gpio_claim:
1981 if (udc_info && udc_info->vbus_pin > 0)
1982 gpio_free(udc_info->vbus_pin);
1983 err_int:
1984 free_irq(IRQ_USBD, udc);
1985 err_map:
1986 iounmap(base_addr);
1987 err_mem:
1988 release_mem_region(rsrc_start, rsrc_len);
1989
1990 return retval;
1991 }
1992
1993 /*
1994 * s3c2410_udc_remove
1995 */
1996 static int s3c2410_udc_remove(struct platform_device *pdev)
1997 {
1998 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1999 unsigned int irq;
2000
2001 dev_dbg(&pdev->dev, "%s()\n", __func__);
2002
2003 usb_del_gadget_udc(&udc->gadget);
2004 if (udc->driver)
2005 return -EBUSY;
2006
2007 debugfs_remove(udc->regs_info);
2008
2009 if (udc_info && !udc_info->udc_command &&
2010 gpio_is_valid(udc_info->pullup_pin))
2011 gpio_free(udc_info->pullup_pin);
2012
2013 if (udc_info && udc_info->vbus_pin > 0) {
2014 irq = gpio_to_irq(udc_info->vbus_pin);
2015 free_irq(irq, udc);
2016 }
2017
2018 free_irq(IRQ_USBD, udc);
2019
2020 iounmap(base_addr);
2021 release_mem_region(rsrc_start, rsrc_len);
2022
2023 platform_set_drvdata(pdev, NULL);
2024
2025 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
2026 clk_disable(udc_clock);
2027 clk_put(udc_clock);
2028 udc_clock = NULL;
2029 }
2030
2031 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
2032 clk_disable(usb_bus_clock);
2033 clk_put(usb_bus_clock);
2034 usb_bus_clock = NULL;
2035 }
2036
2037 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
2038 return 0;
2039 }
2040
2041 #ifdef CONFIG_PM
2042 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
2043 {
2044 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
2045
2046 return 0;
2047 }
2048
2049 static int s3c2410_udc_resume(struct platform_device *pdev)
2050 {
2051 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
2052
2053 return 0;
2054 }
2055 #else
2056 #define s3c2410_udc_suspend NULL
2057 #define s3c2410_udc_resume NULL
2058 #endif
2059
2060 static const struct platform_device_id s3c_udc_ids[] = {
2061 { "s3c2410-usbgadget", },
2062 { "s3c2440-usbgadget", },
2063 { }
2064 };
2065 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
2066
2067 static struct platform_driver udc_driver_24x0 = {
2068 .driver = {
2069 .name = "s3c24x0-usbgadget",
2070 .owner = THIS_MODULE,
2071 },
2072 .probe = s3c2410_udc_probe,
2073 .remove = s3c2410_udc_remove,
2074 .suspend = s3c2410_udc_suspend,
2075 .resume = s3c2410_udc_resume,
2076 .id_table = s3c_udc_ids,
2077 };
2078
2079 static int __init udc_init(void)
2080 {
2081 int retval;
2082
2083 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2084
2085 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2086 if (IS_ERR(s3c2410_udc_debugfs_root)) {
2087 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2088 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2089 s3c2410_udc_debugfs_root = NULL;
2090 }
2091
2092 retval = platform_driver_register(&udc_driver_24x0);
2093 if (retval)
2094 goto err;
2095
2096 return 0;
2097
2098 err:
2099 debugfs_remove(s3c2410_udc_debugfs_root);
2100 return retval;
2101 }
2102
2103 static void __exit udc_exit(void)
2104 {
2105 platform_driver_unregister(&udc_driver_24x0);
2106 debugfs_remove(s3c2410_udc_debugfs_root);
2107 }
2108
2109 module_init(udc_init);
2110 module_exit(udc_exit);
2111
2112 MODULE_AUTHOR(DRIVER_AUTHOR);
2113 MODULE_DESCRIPTION(DRIVER_DESC);
2114 MODULE_VERSION(DRIVER_VERSION);
2115 MODULE_LICENSE("GPL");
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