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x86: Fix compilation bug in kprobes' twobyte_is_boostable
[linux-btrfs-devel.git] / arch / arm / mach-ep93xx / core.c
blobc60f081e930bb8cea0567ad9675008c1add1a49f
1 /*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/i2c-gpio.h>
35 #include <linux/spi/spi.h>
36
37 #include <mach/hardware.h>
38 #include <mach/fb.h>
39 #include <mach/ep93xx_keypad.h>
40 #include <mach/ep93xx_spi.h>
41
42 #include <asm/mach/map.h>
43 #include <asm/mach/time.h>
44
45 #include <asm/hardware/vic.h>
46
47
48 /*************************************************************************
49 * Static I/O mappings that are needed for all EP93xx platforms
50 *************************************************************************/
51 static struct map_desc ep93xx_io_desc[] __initdata = {
52 {
53 .virtual = EP93XX_AHB_VIRT_BASE,
54 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
55 .length = EP93XX_AHB_SIZE,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = EP93XX_APB_VIRT_BASE,
59 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
60 .length = EP93XX_APB_SIZE,
61 .type = MT_DEVICE,
62 },
63 };
64
65 void __init ep93xx_map_io(void)
66 {
67 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
68 }
69
70
71 /*************************************************************************
72 * Timer handling for EP93xx
73 *************************************************************************
74 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
75 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
76 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
77 * is free-running, and can't generate interrupts.
78 *
79 * The 508 kHz timers are ideal for use for the timer interrupt, as the
80 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
81 * bit timers (timer 1) since we don't need more than 16 bits of reload
82 * value as long as HZ >= 8.
83 *
84 * The higher clock rate of timer 4 makes it a better choice than the
85 * other timers for use in gettimeoffset(), while the fact that it can't
86 * generate interrupts means we don't have to worry about not being able
87 * to use this timer for something else. We also use timer 4 for keeping
88 * track of lost jiffies.
89 */
90 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
91 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
92 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
93 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
94 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
95 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
96 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
97 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
98 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
99 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
100 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
101 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
102 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
103 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
104 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
105 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
106 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
107 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
108 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
109
110 #define EP93XX_TIMER123_CLOCK 508469
111 #define EP93XX_TIMER4_CLOCK 983040
112
113 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
114 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
115
116 static unsigned int last_jiffy_time;
117
118 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
119 {
120 /* Writing any value clears the timer interrupt */
121 __raw_writel(1, EP93XX_TIMER1_CLEAR);
122
123 /* Recover lost jiffies */
124 while ((signed long)
125 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
126 >= TIMER4_TICKS_PER_JIFFY) {
127 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
128 timer_tick();
129 }
130
131 return IRQ_HANDLED;
132 }
133
134 static struct irqaction ep93xx_timer_irq = {
135 .name = "ep93xx timer",
136 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
137 .handler = ep93xx_timer_interrupt,
138 };
139
140 static void __init ep93xx_timer_init(void)
141 {
142 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
143 EP93XX_TIMER123_CONTROL_CLKSEL;
144
145 /* Enable periodic HZ timer. */
146 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
147 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
148 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
149 EP93XX_TIMER1_CONTROL);
150
151 /* Enable lost jiffy timer. */
152 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
153 EP93XX_TIMER4_VALUE_HIGH);
154
155 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
156 }
157
158 static unsigned long ep93xx_gettimeoffset(void)
159 {
160 int offset;
161
162 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
163
164 /* Calculate (1000000 / 983040) * offset. */
165 return offset + (53 * offset / 3072);
166 }
167
168 struct sys_timer ep93xx_timer = {
169 .init = ep93xx_timer_init,
170 .offset = ep93xx_gettimeoffset,
171 };
172
173
174 /*************************************************************************
175 * EP93xx IRQ handling
176 *************************************************************************/
177 void __init ep93xx_init_irq(void)
178 {
179 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
180 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
181 }
182
183
184 /*************************************************************************
185 * EP93xx System Controller Software Locked register handling
186 *************************************************************************/
187
188 /*
189 * syscon_swlock prevents anything else from writing to the syscon
190 * block while a software locked register is being written.
191 */
192 static DEFINE_SPINLOCK(syscon_swlock);
193
194 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
195 {
196 unsigned long flags;
197
198 spin_lock_irqsave(&syscon_swlock, flags);
199
200 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
201 __raw_writel(val, reg);
202
203 spin_unlock_irqrestore(&syscon_swlock, flags);
204 }
205 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
206
207 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
208 {
209 unsigned long flags;
210 unsigned int val;
211
212 spin_lock_irqsave(&syscon_swlock, flags);
213
214 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
215 val &= ~clear_bits;
216 val |= set_bits;
217 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
218 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
219
220 spin_unlock_irqrestore(&syscon_swlock, flags);
221 }
222 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
223
224 /**
225 * ep93xx_chip_revision() - returns the EP93xx chip revision
226 *
227 * See <mach/platform.h> for more information.
228 */
229 unsigned int ep93xx_chip_revision(void)
230 {
231 unsigned int v;
232
233 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
234 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
235 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
236 return v;
237 }
238
239 /*************************************************************************
240 * EP93xx GPIO
241 *************************************************************************/
242 static struct resource ep93xx_gpio_resource[] = {
243 {
244 .start = EP93XX_GPIO_PHYS_BASE,
245 .end = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
246 .flags = IORESOURCE_MEM,
247 },
248 };
249
250 static struct platform_device ep93xx_gpio_device = {
251 .name = "gpio-ep93xx",
252 .id = -1,
253 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
254 .resource = ep93xx_gpio_resource,
255 };
256
257 /*************************************************************************
258 * EP93xx peripheral handling
259 *************************************************************************/
260 #define EP93XX_UART_MCR_OFFSET (0x0100)
261
262 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
263 void __iomem *base, unsigned int mctrl)
264 {
265 unsigned int mcr;
266
267 mcr = 0;
268 if (mctrl & TIOCM_RTS)
269 mcr |= 2;
270 if (mctrl & TIOCM_DTR)
271 mcr |= 1;
272
273 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
274 }
275
276 static struct amba_pl010_data ep93xx_uart_data = {
277 .set_mctrl = ep93xx_uart_set_mctrl,
278 };
279
280 static struct amba_device uart1_device = {
281 .dev = {
282 .init_name = "apb:uart1",
283 .platform_data = &ep93xx_uart_data,
284 },
285 .res = {
286 .start = EP93XX_UART1_PHYS_BASE,
287 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
288 .flags = IORESOURCE_MEM,
289 },
290 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
291 .periphid = 0x00041010,
292 };
293
294 static struct amba_device uart2_device = {
295 .dev = {
296 .init_name = "apb:uart2",
297 .platform_data = &ep93xx_uart_data,
298 },
299 .res = {
300 .start = EP93XX_UART2_PHYS_BASE,
301 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
302 .flags = IORESOURCE_MEM,
303 },
304 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
305 .periphid = 0x00041010,
306 };
307
308 static struct amba_device uart3_device = {
309 .dev = {
310 .init_name = "apb:uart3",
311 .platform_data = &ep93xx_uart_data,
312 },
313 .res = {
314 .start = EP93XX_UART3_PHYS_BASE,
315 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
316 .flags = IORESOURCE_MEM,
317 },
318 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
319 .periphid = 0x00041010,
320 };
321
322
323 static struct resource ep93xx_rtc_resource[] = {
324 {
325 .start = EP93XX_RTC_PHYS_BASE,
326 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
327 .flags = IORESOURCE_MEM,
328 },
329 };
330
331 static struct platform_device ep93xx_rtc_device = {
332 .name = "ep93xx-rtc",
333 .id = -1,
334 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
335 .resource = ep93xx_rtc_resource,
336 };
337
338
339 static struct resource ep93xx_ohci_resources[] = {
340 [0] = {
341 .start = EP93XX_USB_PHYS_BASE,
342 .end = EP93XX_USB_PHYS_BASE + 0x0fff,
343 .flags = IORESOURCE_MEM,
344 },
345 [1] = {
346 .start = IRQ_EP93XX_USB,
347 .end = IRQ_EP93XX_USB,
348 .flags = IORESOURCE_IRQ,
349 },
350 };
351
352
353 static struct platform_device ep93xx_ohci_device = {
354 .name = "ep93xx-ohci",
355 .id = -1,
356 .dev = {
357 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
358 .coherent_dma_mask = DMA_BIT_MASK(32),
359 },
360 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
361 .resource = ep93xx_ohci_resources,
362 };
363
364
365 /*************************************************************************
366 * EP93xx physmap'ed flash
367 *************************************************************************/
368 static struct physmap_flash_data ep93xx_flash_data;
369
370 static struct resource ep93xx_flash_resource = {
371 .flags = IORESOURCE_MEM,
372 };
373
374 static struct platform_device ep93xx_flash = {
375 .name = "physmap-flash",
376 .id = 0,
377 .dev = {
378 .platform_data = &ep93xx_flash_data,
379 },
380 .num_resources = 1,
381 .resource = &ep93xx_flash_resource,
382 };
383
384 /**
385 * ep93xx_register_flash() - Register the external flash device.
386 * @width: bank width in octets
387 * @start: resource start address
388 * @size: resource size
389 */
390 void __init ep93xx_register_flash(unsigned int width,
391 resource_size_t start, resource_size_t size)
392 {
393 ep93xx_flash_data.width = width;
394
395 ep93xx_flash_resource.start = start;
396 ep93xx_flash_resource.end = start + size - 1;
397
398 platform_device_register(&ep93xx_flash);
399 }
400
401
402 /*************************************************************************
403 * EP93xx ethernet peripheral handling
404 *************************************************************************/
405 static struct ep93xx_eth_data ep93xx_eth_data;
406
407 static struct resource ep93xx_eth_resource[] = {
408 {
409 .start = EP93XX_ETHERNET_PHYS_BASE,
410 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
411 .flags = IORESOURCE_MEM,
412 }, {
413 .start = IRQ_EP93XX_ETHERNET,
414 .end = IRQ_EP93XX_ETHERNET,
415 .flags = IORESOURCE_IRQ,
416 }
417 };
418
419 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
420
421 static struct platform_device ep93xx_eth_device = {
422 .name = "ep93xx-eth",
423 .id = -1,
424 .dev = {
425 .platform_data = &ep93xx_eth_data,
426 .coherent_dma_mask = DMA_BIT_MASK(32),
427 .dma_mask = &ep93xx_eth_dma_mask,
428 },
429 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
430 .resource = ep93xx_eth_resource,
431 };
432
433 /**
434 * ep93xx_register_eth - Register the built-in ethernet platform device.
435 * @data: platform specific ethernet configuration (__initdata)
436 * @copy_addr: flag indicating that the MAC address should be copied
437 * from the IndAd registers (as programmed by the bootloader)
438 */
439 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
440 {
441 if (copy_addr)
442 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
443
444 ep93xx_eth_data = *data;
445 platform_device_register(&ep93xx_eth_device);
446 }
447
448
449 /*************************************************************************
450 * EP93xx i2c peripheral handling
451 *************************************************************************/
452 static struct i2c_gpio_platform_data ep93xx_i2c_data;
453
454 static struct platform_device ep93xx_i2c_device = {
455 .name = "i2c-gpio",
456 .id = 0,
457 .dev = {
458 .platform_data = &ep93xx_i2c_data,
459 },
460 };
461
462 /**
463 * ep93xx_register_i2c - Register the i2c platform device.
464 * @data: platform specific i2c-gpio configuration (__initdata)
465 * @devices: platform specific i2c bus device information (__initdata)
466 * @num: the number of devices on the i2c bus
467 */
468 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
469 struct i2c_board_info *devices, int num)
470 {
471 /*
472 * Set the EEPROM interface pin drive type control.
473 * Defines the driver type for the EECLK and EEDAT pins as either
474 * open drain, which will require an external pull-up, or a normal
475 * CMOS driver.
476 */
477 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
478 pr_warning("sda != EEDAT, open drain has no effect\n");
479 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
480 pr_warning("scl != EECLK, open drain has no effect\n");
481
482 __raw_writel((data->sda_is_open_drain << 1) |
483 (data->scl_is_open_drain << 0),
484 EP93XX_GPIO_EEDRIVE);
485
486 ep93xx_i2c_data = *data;
487 i2c_register_board_info(0, devices, num);
488 platform_device_register(&ep93xx_i2c_device);
489 }
490
491 /*************************************************************************
492 * EP93xx SPI peripheral handling
493 *************************************************************************/
494 static struct ep93xx_spi_info ep93xx_spi_master_data;
495
496 static struct resource ep93xx_spi_resources[] = {
497 {
498 .start = EP93XX_SPI_PHYS_BASE,
499 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
500 .flags = IORESOURCE_MEM,
501 },
502 {
503 .start = IRQ_EP93XX_SSP,
504 .end = IRQ_EP93XX_SSP,
505 .flags = IORESOURCE_IRQ,
506 },
507 };
508
509 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
510
511 static struct platform_device ep93xx_spi_device = {
512 .name = "ep93xx-spi",
513 .id = 0,
514 .dev = {
515 .platform_data = &ep93xx_spi_master_data,
516 .coherent_dma_mask = DMA_BIT_MASK(32),
517 .dma_mask = &ep93xx_spi_dma_mask,
518 },
519 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
520 .resource = ep93xx_spi_resources,
521 };
522
523 /**
524 * ep93xx_register_spi() - registers spi platform device
525 * @info: ep93xx board specific spi master info (__initdata)
526 * @devices: SPI devices to register (__initdata)
527 * @num: number of SPI devices to register
528 *
529 * This function registers platform device for the EP93xx SPI controller and
530 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
531 */
532 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
533 struct spi_board_info *devices, int num)
534 {
535 /*
536 * When SPI is used, we need to make sure that I2S is muxed off from
537 * SPI pins.
538 */
539 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
540
541 ep93xx_spi_master_data = *info;
542 spi_register_board_info(devices, num);
543 platform_device_register(&ep93xx_spi_device);
544 }
545
546 /*************************************************************************
547 * EP93xx LEDs
548 *************************************************************************/
549 static struct gpio_led ep93xx_led_pins[] = {
550 {
551 .name = "platform:grled",
552 .gpio = EP93XX_GPIO_LINE_GRLED,
553 }, {
554 .name = "platform:rdled",
555 .gpio = EP93XX_GPIO_LINE_RDLED,
556 },
557 };
558
559 static struct gpio_led_platform_data ep93xx_led_data = {
560 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
561 .leds = ep93xx_led_pins,
562 };
563
564 static struct platform_device ep93xx_leds = {
565 .name = "leds-gpio",
566 .id = -1,
567 .dev = {
568 .platform_data = &ep93xx_led_data,
569 },
570 };
571
572
573 /*************************************************************************
574 * EP93xx pwm peripheral handling
575 *************************************************************************/
576 static struct resource ep93xx_pwm0_resource[] = {
577 {
578 .start = EP93XX_PWM_PHYS_BASE,
579 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
580 .flags = IORESOURCE_MEM,
581 },
582 };
583
584 static struct platform_device ep93xx_pwm0_device = {
585 .name = "ep93xx-pwm",
586 .id = 0,
587 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
588 .resource = ep93xx_pwm0_resource,
589 };
590
591 static struct resource ep93xx_pwm1_resource[] = {
592 {
593 .start = EP93XX_PWM_PHYS_BASE + 0x20,
594 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
595 .flags = IORESOURCE_MEM,
596 },
597 };
598
599 static struct platform_device ep93xx_pwm1_device = {
600 .name = "ep93xx-pwm",
601 .id = 1,
602 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
603 .resource = ep93xx_pwm1_resource,
604 };
605
606 void __init ep93xx_register_pwm(int pwm0, int pwm1)
607 {
608 if (pwm0)
609 platform_device_register(&ep93xx_pwm0_device);
610
611 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
612 if (pwm1)
613 platform_device_register(&ep93xx_pwm1_device);
614 }
615
616 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
617 {
618 int err;
619
620 if (pdev->id == 0) {
621 err = 0;
622 } else if (pdev->id == 1) {
623 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
624 dev_name(&pdev->dev));
625 if (err)
626 return err;
627 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
628 if (err)
629 goto fail;
630
631 /* PWM 1 output on EGPIO[14] */
632 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
633 } else {
634 err = -ENODEV;
635 }
636
637 return err;
638
639 fail:
640 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
641 return err;
642 }
643 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
644
645 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
646 {
647 if (pdev->id == 1) {
648 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
649 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
650
651 /* EGPIO[14] used for GPIO */
652 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
653 }
654 }
655 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
656
657
658 /*************************************************************************
659 * EP93xx video peripheral handling
660 *************************************************************************/
661 static struct ep93xxfb_mach_info ep93xxfb_data;
662
663 static struct resource ep93xx_fb_resource[] = {
664 {
665 .start = EP93XX_RASTER_PHYS_BASE,
666 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
667 .flags = IORESOURCE_MEM,
668 },
669 };
670
671 static struct platform_device ep93xx_fb_device = {
672 .name = "ep93xx-fb",
673 .id = -1,
674 .dev = {
675 .platform_data = &ep93xxfb_data,
676 .coherent_dma_mask = DMA_BIT_MASK(32),
677 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
678 },
679 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
680 .resource = ep93xx_fb_resource,
681 };
682
683 static struct platform_device ep93xx_bl_device = {
684 .name = "ep93xx-bl",
685 .id = -1,
686 };
687
688 /**
689 * ep93xx_register_fb - Register the framebuffer platform device.
690 * @data: platform specific framebuffer configuration (__initdata)
691 */
692 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
693 {
694 ep93xxfb_data = *data;
695 platform_device_register(&ep93xx_fb_device);
696 platform_device_register(&ep93xx_bl_device);
697 }
698
699
700 /*************************************************************************
701 * EP93xx matrix keypad peripheral handling
702 *************************************************************************/
703 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
704
705 static struct resource ep93xx_keypad_resource[] = {
706 {
707 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
708 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
709 .flags = IORESOURCE_MEM,
710 }, {
711 .start = IRQ_EP93XX_KEY,
712 .end = IRQ_EP93XX_KEY,
713 .flags = IORESOURCE_IRQ,
714 },
715 };
716
717 static struct platform_device ep93xx_keypad_device = {
718 .name = "ep93xx-keypad",
719 .id = -1,
720 .dev = {
721 .platform_data = &ep93xx_keypad_data,
722 },
723 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
724 .resource = ep93xx_keypad_resource,
725 };
726
727 /**
728 * ep93xx_register_keypad - Register the keypad platform device.
729 * @data: platform specific keypad configuration (__initdata)
730 */
731 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
732 {
733 ep93xx_keypad_data = *data;
734 platform_device_register(&ep93xx_keypad_device);
735 }
736
737 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
738 {
739 int err;
740 int i;
741
742 for (i = 0; i < 8; i++) {
743 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
744 if (err)
745 goto fail_gpio_c;
746 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
747 if (err)
748 goto fail_gpio_d;
749 }
750
751 /* Enable the keypad controller; GPIO ports C and D used for keypad */
752 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
753 EP93XX_SYSCON_DEVCFG_GONK);
754
755 return 0;
756
757 fail_gpio_d:
758 gpio_free(EP93XX_GPIO_LINE_C(i));
759 fail_gpio_c:
760 for ( ; i >= 0; --i) {
761 gpio_free(EP93XX_GPIO_LINE_C(i));
762 gpio_free(EP93XX_GPIO_LINE_D(i));
763 }
764 return err;
765 }
766 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
767
768 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
769 {
770 int i;
771
772 for (i = 0; i < 8; i++) {
773 gpio_free(EP93XX_GPIO_LINE_C(i));
774 gpio_free(EP93XX_GPIO_LINE_D(i));
775 }
776
777 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
778 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
779 EP93XX_SYSCON_DEVCFG_GONK);
780 }
781 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
782
783 /*************************************************************************
784 * EP93xx I2S audio peripheral handling
785 *************************************************************************/
786 static struct resource ep93xx_i2s_resource[] = {
787 {
788 .start = EP93XX_I2S_PHYS_BASE,
789 .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
790 .flags = IORESOURCE_MEM,
791 },
792 };
793
794 static struct platform_device ep93xx_i2s_device = {
795 .name = "ep93xx-i2s",
796 .id = -1,
797 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
798 .resource = ep93xx_i2s_resource,
799 };
800
801 static struct platform_device ep93xx_pcm_device = {
802 .name = "ep93xx-pcm-audio",
803 .id = -1,
804 };
805
806 void __init ep93xx_register_i2s(void)
807 {
808 platform_device_register(&ep93xx_i2s_device);
809 platform_device_register(&ep93xx_pcm_device);
810 }
811
812 #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
813 EP93XX_SYSCON_DEVCFG_I2SONAC97)
814
815 #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
816 EP93XX_SYSCON_I2SCLKDIV_SPOL)
817
818 int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
819 {
820 unsigned val;
821
822 /* Sanity check */
823 if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
824 return -EINVAL;
825 if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
826 return -EINVAL;
827
828 /* Must have only one of I2SONSSP/I2SONAC97 set */
829 if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
830 (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
831 return -EINVAL;
832
833 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
834 ep93xx_devcfg_set_bits(i2s_pins);
835
836 /*
837 * This is potentially racy with the clock api for i2s_mclk, sclk and
838 * lrclk. Since the i2s driver is the only user of those clocks we
839 * rely on it to prevent parallel use of this function and the
840 * clock api for the i2s clocks.
841 */
842 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
843 val &= ~EP93XX_I2SCLKDIV_MASK;
844 val |= i2s_config;
845 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
846
847 return 0;
848 }
849 EXPORT_SYMBOL(ep93xx_i2s_acquire);
850
851 void ep93xx_i2s_release(void)
852 {
853 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
854 }
855 EXPORT_SYMBOL(ep93xx_i2s_release);
856
857 /*************************************************************************
858 * EP93xx AC97 audio peripheral handling
859 *************************************************************************/
860 static struct resource ep93xx_ac97_resources[] = {
861 {
862 .start = EP93XX_AAC_PHYS_BASE,
863 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
864 .flags = IORESOURCE_MEM,
865 },
866 {
867 .start = IRQ_EP93XX_AACINTR,
868 .end = IRQ_EP93XX_AACINTR,
869 .flags = IORESOURCE_IRQ,
870 },
871 };
872
873 static struct platform_device ep93xx_ac97_device = {
874 .name = "ep93xx-ac97",
875 .id = -1,
876 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
877 .resource = ep93xx_ac97_resources,
878 };
879
880 void __init ep93xx_register_ac97(void)
881 {
882 /*
883 * Make sure that the AC97 pins are not used by I2S.
884 */
885 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
886
887 platform_device_register(&ep93xx_ac97_device);
888 platform_device_register(&ep93xx_pcm_device);
889 }
890
891 void __init ep93xx_init_devices(void)
892 {
893 /* Disallow access to MaverickCrunch initially */
894 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
895
896 /* Get the GPIO working early, other devices need it */
897 platform_device_register(&ep93xx_gpio_device);
898
899 amba_device_register(&uart1_device, &iomem_resource);
900 amba_device_register(&uart2_device, &iomem_resource);
901 amba_device_register(&uart3_device, &iomem_resource);
902
903 platform_device_register(&ep93xx_rtc_device);
904 platform_device_register(&ep93xx_ohci_device);
905 platform_device_register(&ep93xx_leds);
906 }
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